Design Name | WarpSE |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC95144XL-10-TQ100 |
Date | 10-17-2024, 0:50AM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
128/144 (89%) | 417/720 (58%) | 103/144 (72%) | 73/81 (91%) | 254/432 (59%) |
|
|
Signal mapped onto global clock net (GCK1) | C16M |
Signal mapped onto global clock net (GCK2) | C8M |
Signal mapped onto global clock net (GCK3) | FCLK |
Macrocells in high performance mode (MCHP) | 128 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 128 |