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1893b9b835
Warp-SE/cpld/XC95144XL/MXSE.tspec
Zane Kaminski 1893b9b835 Prototype
2022-03-27 23:45:53 -04:00

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TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd3.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd3.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd3.D:666
TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:iobm/IOS_FSM_FFd3.D:666
TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:iobm/IOS_FSM_FFd3.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd2.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd2.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd2.D:666
TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:iobm/IOS_FSM_FFd2.D:666
TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:iobm/IOS_FSM_FFd2.D:666
TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:iobm/IOS_FSM_FFd2.D:666
TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:iobm/IOS_FSM_FFd2.D:666
TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:iobm/IOS_FSM_FFd2.D:666
TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:iobm/IOS_FSM_FFd2.D:666
TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:iobm/IOS_FSM_FFd2.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:IOACT.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:IOBERR.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:IOBERR.D:666
TS_CLK2X_IOB:FROM:IOBERR.Q:TO:IOBERR.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:IOBERR.D:666
TS_CLK2X_IOB:FROM:iobm/RESrf.Q:TO:IOBERR.D:666
TS_CLK2X_IOB:FROM:iobm/RESrr.Q:TO:IOBERR.D:666
TS_CLK2X_IOB:FROM:iobm/BERRrf.Q:TO:IOBERR.D:666
TS_CLK2X_IOB:FROM:iobm/BERRrr.Q:TO:IOBERR.D:666
TS_CLK2X_IOB:FROM:iobm/DTACKrf.Q:TO:IOBERR.D:666
TS_CLK2X_IOB:FROM:iobm/DTACKrr.Q:TO:IOBERR.D:666
TS_CLK2X_IOB:FROM:iobm/ETACK.Q:TO:IOBERR.D:666
TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/Once.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/Once.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/Once.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/Once.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/Once.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/Once.D:400
TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:cnt/RefDone.D:400
TS_CLK_FSB:FROM:RefAck.Q:TO:cnt/RefDone.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefDone.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefDone.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefDone.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefDone.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefDone.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefDone.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefDone.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/RefDone.D:400
TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Once.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Once.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Once.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Once.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Once.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Once.D:400
TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay1.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay1.CE:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:BERR_IOBS.D:400
TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:BERR_IOBS.D:400
TS_CLK_FSB:FROM:iobs/Once.Q:TO:BERR_IOBS.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:BERR_IOBS.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:BERR_IOBS.D:400
TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:BERR_IOBS.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IORW0.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IORW0.D:400
TS_CLK_FSB:FROM:iobs/Once.Q:TO:IORW0.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IORW0.D:400
TS_CLK_FSB:FROM:IORW0.Q:TO:IORW0.D:400
TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:IORW0.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:IORW0.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:IORW0.D:400
TS_CLK_FSB:FROM:cs/nOverlay0.Q:TO:cs/nOverlay0.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cs/nOverlay0.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOL0.D:400
TS_CLK_FSB:FROM:iobs/IOL1.Q:TO:IOL0.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOL0.CE:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOL0.CE:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOU0.D:400
TS_CLK_FSB:FROM:iobs/IOU1.Q:TO:IOU0.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOU0.CE:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOU0.CE:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:TimeoutA.D:400
TS_CLK_FSB:FROM:TimeoutA.Q:TO:TimeoutA.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:TimeoutA.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:TimeoutA.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:TimeoutA.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:TimeoutA.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:TimeoutA.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:TimeoutA.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:TimeoutA.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:TimeoutB.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:TimeoutB.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:cnt/TimeoutBPre.D:400
TS_CLK_FSB:FROM:cnt/TimeoutBPre.Q:TO:cnt/TimeoutBPre.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/TimeoutBPre.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/TimeoutBPre.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/TimeoutBPre.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/TimeoutBPre.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/TimeoutBPre.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/TimeoutBPre.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/TimeoutBPre.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:cnt/TimeoutBPre.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/BERR0r.D:400
TS_CLK_FSB:FROM:TimeoutB.Q:TO:fsb/BERR0r.D:400
TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:fsb/BERR0r.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/BERR1r.D:400
TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:fsb/BERR1r.D:400
TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:fsb/BERR1r.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready0r.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready0r.D:400
TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/Ready0r.D:400
TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/Ready0r.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/Ready1r.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready1r.D:400
TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/Ready1r.D:400
TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/Ready1r.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready1r.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/Ready2r.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/Ready2r.D:400
TS_CLK_FSB:FROM:TimeoutA.Q:TO:fsb/Ready2r.D:400
TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:fsb/Ready2r.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:TimeoutA.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:fsb/VPA.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:Park.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:TimeoutB.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:fsb/VPA.D:400
TS_CLK_FSB:FROM:iobs/Load1.Q:TO:iobs/IOL1.CE:400
TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IORW1.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IORW1.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/IORW1.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IORW1.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IORW1.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/IORW1.D:400
TS_CLK_FSB:FROM:iobs/IORW1.Q:TO:iobs/IORW1.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/IOReady.D:400
TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:iobs/IOReady.D:400
TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/IOReady.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/IOReady.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/IOReady.D:400
TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/IOReady.D:400
TS_CLK_FSB:FROM:iobs/Load1.Q:TO:iobs/IOU1.CE:400
TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:ram/RAMDIS2.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMDIS2.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:TimeoutA.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:fsb/Ready2r.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:nDTACK_FSB_OBUF.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:fsb/Ready1r.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:iobs/IOReady.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:BERR_IOBS.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:fsb/BERR0r.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:fsb/BERR1r.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:Park.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:fsb/Ready0r.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:ram/RAMReady.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:TimeoutB.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:nDTACK_FSB_OBUF.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RASEL.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd1.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd1.D:400
TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RS_FSM_FFd1.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd1.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd1.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd1.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RS_FSM_FFd3.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RS_FSM_FFd3.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RS_FSM_FFd3.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RS_FSM_FFd3.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RS_FSM_FFd3.D:400
TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RS_FSM_FFd3.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RS_FSM_FFd3.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RS_FSM_FFd3.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RS_FSM_FFd3.D:400
TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RS_FSM_FFd3.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/PS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/PS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/PS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/PS_FSM_FFd2.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/PS_FSM_FFd1.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/PS_FSM_FFd1.D:400
TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:iobs/PS_FSM_FFd1.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<5>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<5>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<5>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<5>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<5>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<6>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<6>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<6>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<6>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<6>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<6>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<1>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<2>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<2>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<3>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<3>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<3>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<4>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<4>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<4>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<4>.D:400
TS_CLK_FSB:FROM:iobs/Once.Q:TO:iobs/Load1.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Load1.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:iobs/Load1.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:iobs/Load1.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Load1.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Load1.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/BACTr.D:400
TS_CLK_FSB:FROM:RESr0.Q:TO:RESr1.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<0>.Q:TO:cnt/RefCnt<7>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:cnt/RefCnt<7>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:cnt/RefCnt<7>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<1>.Q:TO:cnt/RefCnt<7>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<2>.Q:TO:cnt/RefCnt<7>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<3>.Q:TO:cnt/RefCnt<7>.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<4>.Q:TO:cnt/RefCnt<7>.D:400
TS_CLK_FSB:FROM:RESr1.Q:TO:RESr2.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:RefAck.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:RefAck.D:400
TS_CLK_FSB:FROM:RESr0.Q:TO:RESDone.CE:400
TS_CLK_FSB:FROM:RESr1.Q:TO:RESDone.CE:400
TS_CLK_FSB:FROM:RESr2.Q:TO:RESDone.CE:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:ALE0S.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:ALE0S.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:IOREQ.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:IOREQ.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:IOREQ.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:IOREQ.D:400
TS_CLK_FSB:FROM:iobs/IOACTr.Q:TO:IOREQ.D:400
TS_CLK_FSB:FROM:iobs/Once.Q:TO:IOREQ.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:IOREQ.D:400
TS_CLK_FSB:FROM:IPL2r0.Q:TO:IPL2r1.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd2.Q:TO:iobs/Clear1.D:400
TS_CLK_FSB:FROM:iobs/PS_FSM_FFd1.Q:TO:iobs/Clear1.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:iobs/Clear1.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMDIS1.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd2.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd3.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:ram/RS_FSM_FFd1.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:cnt/RefDone.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:ram/BACTr.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:fsb/ASrf.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<6>.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<7>.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:cnt/RefCnt<5>.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:ram/Once.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:cs/nOverlay1.Q:TO:ram/RAMReady.D:400
TS_CLK_FSB:FROM:ram/RASEL.Q:TO:nCAS_OBUF.D:400
TS_CLK_FSB:FROM:RESr0.Q:TO:Park.CE:400
TS_CLK_FSB:FROM:RESr1.Q:TO:Park.CE:400
TS_CLK_FSB:FROM:IPL2r0.Q:TO:Park.CE:400
TS_CLK_FSB:FROM:RESr2.Q:TO:Park.CE:400
TS_CLK_FSB:FROM:RESDone.Q:TO:Park.CE:400
TS_CLK_FSB:FROM:IPL2r1.Q:TO:Park.CE:400
TS_CLK_FSB:FROM:iobs/Load1.Q:TO:nADoutLE1_OBUF.D:400
TS_CLK_FSB:FROM:nADoutLE1_OBUF.Q:TO:nADoutLE1_OBUF.D:400
TS_CLK_FSB:FROM:iobs/Clear1.Q:TO:nADoutLE1_OBUF.D:400
TS_CLK2X_IOB:FROM:nVMA_IOBout.Q:TO:nVMA_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:nVMA_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:nVMA_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:nVMA_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:nVMA_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:nVMA_IOBout.D:666
TS_CLK2X_IOB:FROM:IOACT.Q:TO:nVMA_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/VPArf.Q:TO:nVMA_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/VPArr.Q:TO:nVMA_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nAS_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nAS_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nAS_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nLDS_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nLDS_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nLDS_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nUDS_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nUDS_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nUDS_IOBout.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:iobm/IOS_FSM_FFd1.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:iobm/IOS_FSM_FFd1.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:iobm/IOS_FSM_FFd1.D:666
TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<0>.D:666
TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<0>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<0>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<0>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<0>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<0>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<1>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<1>.D:666
TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<1>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<2>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<2>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<2>.D:666
TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<2>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<2>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<2>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<3>.D:666
TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<3>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<3>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<3>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<3>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ES<4>.D:666
TS_CLK2X_IOB:FROM:iobm/Er2.Q:TO:iobm/ES<4>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ES<4>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ES<4>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ES<4>.D:666
TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ES<4>.D:666
TS_CLK2X_IOB:FROM:nVMA_IOBout.Q:TO:iobm/ETACK.D:666
TS_CLK2X_IOB:FROM:iobm/ES<0>.Q:TO:iobm/ETACK.D:666
TS_CLK2X_IOB:FROM:iobm/ES<1>.Q:TO:iobm/ETACK.D:666
TS_CLK2X_IOB:FROM:iobm/ES<2>.Q:TO:iobm/ETACK.D:666
TS_CLK2X_IOB:FROM:iobm/ES<3>.Q:TO:iobm/ETACK.D:666
TS_CLK2X_IOB:FROM:iobm/ES<4>.Q:TO:iobm/ETACK.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:ALE0M.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:ALE0M.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:ALE0M.D:666
TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:ALE0M.D:666
TS_CLK2X_IOB:FROM:iobm/IOREQr.Q:TO:ALE0M.D:666
TS_CLK2X_IOB:FROM:iobm/BGr0.Q:TO:iobm/BGr1.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd1.Q:TO:nDinLE_OBUF.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nDinLE_OBUF.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd2.Q:TO:nDoutOE_OBUF.D:666
TS_CLK2X_IOB:FROM:iobm/IOS_FSM_FFd3.Q:TO:nDoutOE_OBUF.D:666
TS_CLK2X_IOB:FROM:nAoutOE_OBUF.Q:TO:nAoutOE_OBUF.D:666
TS_CLK2X_IOB:FROM:iobm/BGr1.Q:TO:nAoutOE_OBUF.D:666
TS_CLK2X_IOB:FROM:iobm/BGr0.Q:TO:nAoutOE_OBUF.D:666
TS_CLK2X_IOB:FROM:nAS_IOBout.Q:TO:nAoutOE_OBUF.D:666
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