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cr2032_toaster
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Version 1.3

This commit is contained in:
Alexandre Marcoux 2021-12-11 00:15:16 -05:00
parent 96e3634715
commit f1e022f5c2
46 changed files with 1960 additions and 228 deletions
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28
README.md
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@ -1,14 +1,14 @@
<img src="docs/CR2032 Toaster v1.2.png" alt="gerber preview CR2032 Toast v1.2" />
<img src="docs/CR2032 Toaster v1.3.png" alt="gerber preview CR2032 Toast v1.3" />
# CR2032 Toaster
This is intended to slot in vertically into a 1/2AA battery holder seen on many Macintosh computers for the PRAM battery. It will allow the use of the less expensive, easier to find and less leaky CR2032 coin batteries.
This is meant to be used laying flat in the battery holder like so:
<img src="docs/macintosh_se_battery_adapter.jpg" alt="installed 1/2aa battery adapter" style="zoom: 25%; margin: 0;" />
<a rel="Discord Open Retro SCSI #skunkworks" href="https://discord.gg/MHvNY38E"><img src="docs/discordbanner.png" alt="Discord Open Retro SCSI #skunkworks" style="float: left;" /></a>
Join us in #skunkworks on [Discord](https://discord.gg/MHvNY38E) to help make retro solutions available to all.
There's also two extra through holes to solder wires for other uses.
@ -28,5 +28,25 @@ This work is licensed under a <a rel="license" href="http://creativecommons.org/
## Community
For more great retro hardware projects and a great community check out:
[<img src="E:\OneDrive\projects\Mac DB-15 to VGA\docs\tinker_different_sat_rev_600.png" alt="Tinker Different" style="float: left;" />](https://tinkerdifferent.com/)
Join us in #skunkworks on [Discord](https://discord.gg/GKcvtgU7P9) to help make retro solutions available to all.
[<img src="E:\OneDrive\projects\Mac DB-15 to VGA\docs\discordbanner.png" alt="Discord Open Retro SCSI skunkworks" style="float: left;" />](https://discord.gg/GKcvtgU7P9)

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kicad/CR2032 Toaster v1.3.kicad_pcb Normal file
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kicad/CR2032 Toaster v1.3.pro Normal file
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update=9/18/2021 9:15:48 PM
version=1
last_client=kicad
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version=1
RootSch=
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PageLayoutDescrFile=
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RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
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TrackWidth3=0.5
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TrackWidth6=3
TrackWidth7=4
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ViaDrill1=0.4
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ViaDrill2=6.3
dPairWidth1=0.2
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kicad/CR2032 Toaster v1.3.sch Normal file
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EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
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$Comp
L Connector_Generic:Conn_01x01 J1
U 1 1 60D3CFE2
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L Connector_Generic:Conn_01x01 J2
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Wire Wire Line
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0
CR2032 Toaster.pretty/0.5 AA to CR2032 pads.kicad_mod → kicad/CR2032 Toaster.pretty/0.5 AA to CR2032 pads.kicad_mod
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CR2032 Toaster.pretty/6mm PTS.kicad_mod → kicad/CR2032 Toaster.pretty/6mm PTS.kicad_mod
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CR2032 Toaster.pretty/cc_by_nc_sa_front_silk_screen.kicad_mod → kicad/CR2032 Toaster.pretty/cc_by_nc_sa_front_silk_screen.kicad_mod
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kicad/CR2032 Toaster.pretty/cc_by_nc_sa_small_9mm_front_silk_screen.kicad_mod Normal file
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(xy 1.958584 0.313673) (xy 1.994598 0.330078) (xy 2.059262 0.338643) (xy 2.160798 0.342813) (xy 2.177465 0.343219) (xy 2.273444 0.338566) (xy 2.353156 0.322161) (xy 2.376712 0.312581)
(xy 2.435472 0.270030) (xy 2.464125 0.211565) (xy 2.470728 0.136657) (xy 2.453644 0.063723) (xy 2.400428 0.006134) (xy 2.308128 -0.038101) (xy 2.173796 -0.070969) (xy 2.159000 -0.073529)
(xy 2.117736 -0.101459) (xy 2.105014 -0.136257) (xy 2.102880 -0.164650) (xy 2.112940 -0.180183) (xy 2.144683 -0.185487) (xy 2.207597 -0.183196) (xy 2.260878 -0.179513) (xy 2.424546 -0.167802)
(xy 2.424546 -0.232331) (xy 2.421297 -0.269389) (xy 2.404131 -0.290802) (xy 2.361917 -0.303514) (xy 2.295204 -0.313019) (xy 2.154614 -0.317660) (xy 2.047365 -0.292630) (xy 1.974565 -0.238304)
(xy 1.949544 -0.195914) (xy 1.931329 -0.104863) (xy 1.022742 -0.104863) (xy 1.054186 -0.148345) (xy 1.133372 -0.180232) (xy 1.191600 -0.184727) (xy 1.266097 -0.179544) (xy 1.327012 -0.166559)
(xy 1.340791 -0.160824) (xy 1.372141 -0.149649) (xy 1.383962 -0.169338) (xy 1.385455 -0.205215) (xy 1.378378 -0.253475) (xy 1.348530 -0.282506) (xy 1.301899 -0.301085) (xy 1.176437 -0.322716)
(xy 1.057757 -0.307444) (xy 0.953559 -0.260059) (xy 0.871542 -0.185351) (xy 0.819405 -0.088109) (xy 0.804334 0.008429) (xy 0.669637 0.008429) (xy 0.669637 -0.300182) (xy 0.484909 -0.300182)
(xy 0.484346 -0.098136) (xy 0.483782 0.103909) (xy 0.367028 -0.098136) (xy 0.250274 -0.300182) (xy 0.046182 -0.300182) (xy -0.878564 -0.300182) (xy -0.936017 -0.297397) (xy -0.967673 -0.290451)
(xy -0.969818 -0.287780) (xy -1.118797 -0.287780) (xy -1.161305 -0.295812) (xy -1.234789 -0.299528) (xy -1.326677 -0.300182) (xy -1.547091 -0.300182) (xy -1.893063 -0.300182) (xy -1.958197 -0.454422)
(xy -2.007936 -0.541063) (xy -2.058857 -0.623454) (xy 4.387273 -0.623454) (xy 4.387273 0.669637) )(layer F.SilkS) (width 0.010000)
)
(fp_poly (pts (xy -3.331718 -0.222226) (xy -3.258037 -0.199752) (xy -3.205363 -0.168848) (xy -3.186545 -0.136702) (xy -3.204527 -0.111807) (xy -3.234648 -0.091335) (xy -3.282036 -0.078461) (xy -3.323057 -0.102069)
(xy -3.382789 -0.132727) (xy -3.439718 -0.123562) (xy -3.484616 -0.080482) (xy -3.508251 -0.009396) (xy -3.509818 0.017487) (xy -3.492687 0.092907) (xy -3.448689 0.143024) (xy -3.388913 0.161977)
(xy -3.324450 0.143907) (xy -3.302205 0.127186) (xy -3.265644 0.104939) (xy -3.228570 0.118878) (xy -3.221813 0.123683) (xy -3.194140 0.160868) (xy -3.212233 0.198782) (xy -3.276274 0.237734)
(xy -3.292531 0.244811) (xy -3.375395 0.271396) (xy -3.446838 0.270179) (xy -3.528000 0.242302) (xy -3.601723 0.187573) (xy -3.646669 0.107478) (xy -3.661187 0.014030) (xy -3.643625 -0.080758)
(xy -3.592331 -0.164875) (xy -3.585051 -0.172469) (xy -3.535040 -0.210957) (xy -3.474525 -0.228023) (xy -3.413493 -0.230909) (xy -3.331718 -0.222226) )(layer F.SilkS) (width 0.010000)
)
(fp_poly (pts (xy -2.809395 -0.221819) (xy -2.737623 -0.198133) (xy -2.690391 -0.165225) (xy -2.678545 -0.138048) (xy -2.696565 -0.112072) (xy -2.726648 -0.091335) (xy -2.774036 -0.078461) (xy -2.815057 -0.102069)
(xy -2.875497 -0.135445) (xy -2.931001 -0.123068) (xy -2.965872 -0.087226) (xy -2.996426 -0.014074) (xy -2.996862 0.062510) (xy -2.967210 0.123629) (xy -2.965532 0.125351) (xy -2.908809 0.156237)
(xy -2.844577 0.156844) (xy -2.794402 0.127485) (xy -2.758457 0.105711) (xy -2.722302 0.116752) (xy -2.684924 0.147041) (xy -2.688722 0.179620) (xy -2.735040 0.219409) (xy -2.753591 0.231162)
(xy -2.847841 0.270048) (xy -2.943884 0.268068) (xy -3.017318 0.243430) (xy -3.085491 0.200311) (xy -3.124445 0.137703) (xy -3.139629 0.045326) (xy -3.140363 0.011287) (xy -3.133899 -0.066541)
(xy -3.108461 -0.122734) (xy -3.072867 -0.163412) (xy -3.019994 -0.207089) (xy -2.963456 -0.226780) (xy -2.893277 -0.230909) (xy -2.809395 -0.221819) )(layer F.SilkS) (width 0.010000)
)
(fp_poly (pts (xy -1.264426 0.073718) (xy -1.197762 0.083940) (xy -1.165469 0.105604) (xy -1.158006 0.125474) (xy -1.169047 0.175514) (xy -1.215230 0.213288) (xy -1.285697 0.230588) (xy -1.297504 0.230909)
(xy -1.340908 0.226035) (xy -1.358893 0.202207) (xy -1.362363 0.148763) (xy -1.362363 0.066618) (xy -1.264426 0.073718) )(layer F.SilkS) (width 0.010000)
)
(fp_poly (pts (xy -1.283188 -0.180946) (xy -1.275772 -0.180348) (xy -1.216848 -0.170172) (xy -1.192269 -0.148116) (xy -1.189181 -0.127000) (xy -1.199119 -0.094751) (xy -1.236659 -0.078535) (xy -1.275772 -0.073651)
(xy -1.332470 -0.071989) (xy -1.356864 -0.085295) (xy -1.362341 -0.121819) (xy -1.362363 -0.127000) (xy -1.358028 -0.166265) (xy -1.336099 -0.181498) (xy -1.283188 -0.180946) )(layer F.SilkS) (width 0.010000)
)
(fp_poly (pts (xy 2.922071 -0.095757) (xy 2.945606 -0.045667) (xy 2.958730 -0.011545) (xy 2.996095 0.092364) (xy 2.819894 0.092364) (xy 2.855300 -0.011545) (xy 2.878947 -0.072375) (xy 2.899116 -0.109781)
(xy 2.906035 -0.115454) (xy 2.922071 -0.095757) )(layer F.SilkS) (width 0.010000)
)
)

0
CR2032 Toaster.pretty/cc_by_nc_sa_small_front_silk_screen.kicad_mod → kicad/CR2032 Toaster.pretty/cc_by_nc_sa_small_front_silk_screen.kicad_mod
View File

0
CR2032 Toaster.pretty/logo.kicad_mod → kicad/CR2032 Toaster.pretty/logo.kicad_mod
View File

0
CR2032 Toaster.pretty/logo_7_back.kicad_mod → kicad/CR2032 Toaster.pretty/logo_7_back.kicad_mod
View File

0
CR2032 Toaster.pretty/logo_7_back_copper.kicad_mod → kicad/CR2032 Toaster.pretty/logo_7_back_copper.kicad_mod
View File

0
CR2032 Toaster.pretty/logo_7_back_mask.kicad_mod → kicad/CR2032 Toaster.pretty/logo_7_back_mask.kicad_mod
View File

0
CR2032 Toaster.pretty/logo_7_front.kicad_mod → kicad/CR2032 Toaster.pretty/logo_7_front.kicad_mod
View File

0
CR2032 Toaster.pretty/logo_7_front_copper.kicad_mod → kicad/CR2032 Toaster.pretty/logo_7_front_copper.kicad_mod
View File

0
CR2032 Toaster.pretty/logo_7_front_mask.kicad_mod → kicad/CR2032 Toaster.pretty/logo_7_front_mask.kicad_mod
View File

0
CR2032 Toaster.pretty/mac_portable_34pin_to_50pin_scsi.dcm → kicad/CR2032 Toaster.pretty/mac_portable_34pin_to_50pin_scsi.dcm
View File

0
CR2032 Toaster.pretty/mac_portable_34pin_to_50pin_scsi.lib → kicad/CR2032 Toaster.pretty/mac_portable_34pin_to_50pin_scsi.lib
View File

245
kicad/CR2032 Toaster.pro Normal file
View File

@ -0,0 +1,245 @@
update=6/10/2021 8:21:26 PM
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=1
TrackWidth3=2
TrackWidth4=3
TrackWidth5=4
TrackWidth6=5
ViaDiameter1=0.8
ViaDrill1=0.4
ViaDiameter2=6.7
ViaDrill2=6.3
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.05
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

4
kicad/CR2032 Toaster.sch Normal file
View File

@ -0,0 +1,4 @@
EESchema Schematic File Version 2
EELAYER 25 0
EELAYER END
$EndSCHEMATC

0
CR2032 Toaster_v1.0.kicad_pcb → kicad/CR2032 Toaster_v1.0.kicad_pcb
View File

0
CR2032 Toaster_v1.0.pro → kicad/CR2032 Toaster_v1.0.pro
View File

0
CR2032 Toaster_v1.1.kicad_pcb → kicad/CR2032 Toaster_v1.1.kicad_pcb
View File

0
CR2032 Toaster_v1.1.pro → kicad/CR2032 Toaster_v1.1.pro
View File

40
CR2032 Toaster_v1.2-cache.lib → kicad/CR2032 Toaster_v1.2-cache.lib
View File

@ -1,11 +1,28 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# BAT-HLD-001-THM_BAT-HLD-001-THM
# Connector_Generic_Conn_01x01
#
DEF BAT-HLD-001-THM_BAT-HLD-001-THM BT 0 40 N N 1 F N
DEF Connector_Generic_Conn_01x01 J 0 40 Y N 1 F N
F0 "J" 0 100 50 H V C CNN
F1 "Connector_Generic_Conn_01x01" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 5 0 -5 1 1 6 N
S -50 50 50 -50 1 1 10 f
X Pin_1 1 -200 0 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# snapeda_BAT-HLD-001-THM
#
DEF snapeda_BAT-HLD-001-THM BT 0 40 N N 1 F N
F0 "BT" -150 150 50 H V L BNN
F1 "BAT-HLD-001-THM_BAT-HLD-001-THM" -150 -200 50 H V L BNN
F1 "snapeda_BAT-HLD-001-THM" -150 -200 50 H V L BNN
F2 "BAT_BAT-HLD-001-THM" 100 350 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "Manufacturer Recommendations" 100 350 50 H I L BNN "STANDARD"
@ -29,21 +46,4 @@ X ~ P4 -300 0 200 R 40 40 0 0 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_01x01
#
DEF Connector_Generic_Conn_01x01 J 0 40 Y N 1 F N
F0 "J" 0 100 50 H V C CNN
F1 "Connector_Generic_Conn_01x01" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 5 0 -5 1 1 6 N
S -50 50 50 -50 1 1 10 f
X Pin_1 1 -200 0 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library

339
CR2032 Toaster_v1.2.kicad_pcb → kicad/CR2032 Toaster_v1.2.kicad_pcb
View File

@ -2,7 +2,7 @@
(general
(thickness 1.6)
(drawings 20)
(drawings 22)
(tracks 7)
(zones 0)
(modules 6)
@ -145,33 +145,33 @@
(fp_text value BAT-HLD-001-THM (at 6.391 10.389) (layer F.Fab)
(effects (font (size 1.4 1.4) (thickness 0.15)))
)
(fp_line (start -11.8 2.2) (end -11.8 -2) (layer F.CrtYd) (width 0.05))
(fp_line (start 11 9.15) (end -11 9.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.8 -2) (end 11.8 2.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -11 -9.2) (end 11 -9.2) (layer F.CrtYd) (width 0.05))
(fp_line (start 10.55 8) (end 10.55 3.07) (layer F.SilkS) (width 0.127))
(fp_line (start 5.5 8) (end 10.55 8) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 8) (end -5.5 8) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 3.07) (end -10.55 8) (layer F.SilkS) (width 0.127))
(fp_line (start 10.55 -7.5) (end 10.55 -2.97) (layer F.SilkS) (width 0.127))
(fp_line (start 6 -7.5) (end 10.55 -7.5) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 -7.5) (end -6 -7.5) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 -2.97) (end -10.55 -7.5) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 8) (end -10.55 -7.5) (layer F.Fab) (width 0.127))
(fp_line (start -5.5 8) (end -10.55 8) (layer F.Fab) (width 0.127))
(fp_line (start 10.55 8) (end 5.5 8) (layer F.Fab) (width 0.127))
(fp_line (start 10.55 -7.5) (end 10.55 8) (layer F.Fab) (width 0.127))
(fp_line (start 11 3) (end 11 9.2) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.8 2.2) (end 11 3) (layer F.CrtYd) (width 0.05))
(fp_line (start 11 -2.8) (end 11.8 -2) (layer F.CrtYd) (width 0.05))
(fp_line (start 11 -9.2) (end 11 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -11 -2.8) (end -11 -9.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -11.8 -2) (end -11 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -11.8 2.2) (end -11 3) (layer F.CrtYd) (width 0.05))
(fp_line (start -11 9.15) (end -11 3) (layer F.CrtYd) (width 0.05))
(fp_line (start -10.55 -7.5) (end 10.55 -7.5) (layer F.Fab) (width 0.127))
(fp_line (start 10.55 -7.5) (end 10.55 8) (layer F.Fab) (width 0.127))
(fp_line (start 10.55 8) (end 5.5 8) (layer F.Fab) (width 0.127))
(fp_line (start -5.5 8) (end -10.55 8) (layer F.Fab) (width 0.127))
(fp_line (start -10.55 8) (end -10.55 -7.5) (layer F.Fab) (width 0.127))
(fp_line (start -10.55 -2.97) (end -10.55 -7.5) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 -7.5) (end -6 -7.5) (layer F.SilkS) (width 0.127))
(fp_line (start 6 -7.5) (end 10.55 -7.5) (layer F.SilkS) (width 0.127))
(fp_line (start 10.55 -7.5) (end 10.55 -2.97) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 3.07) (end -10.55 8) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 8) (end -5.5 8) (layer F.SilkS) (width 0.127))
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(xy 103.129286 98.16)
)
)
)

0
CR2032 Toaster_v1.2.pro → kicad/CR2032 Toaster_v1.2.pro
View File

2
CR2032 Toaster_v1.2.sch → kicad/CR2032 Toaster_v1.2.sch
View File

@ -14,7 +14,7 @@ Comment3 ""
Comment4 ""
$EndDescr
$Comp
L BAT-HLD-001-THM:BAT-HLD-001-THM BT1
L snapeda:BAT-HLD-001-THM BT1
U 1 1 60D38724
P 5550 3450
F 0 "BT1" H 5550 3717 50 0000 C CNN

0
fp-lib-table → kicad/fp-lib-table
View File

0
snapeda.pretty/BAT-HLD-001-THM.dcm → kicad/snapeda.pretty/BAT-HLD-001-THM.dcm
View File

0
snapeda.pretty/BAT-HLD-001-THM.lib → kicad/snapeda.pretty/BAT-HLD-001-THM.lib
View File

0
snapeda.pretty/BAT-HLD-001-THM.step → kicad/snapeda.pretty/BAT-HLD-001-THM.step
View File

24
kicad/snapeda.pretty/BAT_BAT-HLD-001-THM.kicad_mod Normal file
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@ -0,0 +1,24 @@
(module BAT_BAT-HLD-001-THM (layer F.Cu) (tedit 61B427D1)
(fp_text reference REF** (at -6.055 -10.389) (layer F.SilkS)
(effects (font (size 1.4 1.4) (thickness 0.15)))
)
(fp_text value BAT_BAT-HLD-001-THM (at 6.391 10.389) (layer F.Fab)
(effects (font (size 1.4 1.4) (thickness 0.15)))
)
(fp_line (start -11.8 9.15) (end -11.8 -9.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.8 9.15) (end -11.8 9.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.8 -9.15) (end 11.8 9.15) (layer F.CrtYd) (width 0.05))
(fp_line (start -11.8 -9.15) (end 11.8 -9.15) (layer F.CrtYd) (width 0.05))
(fp_line (start -10.55 8) (end -10.55 -7.5) (layer F.Fab) (width 0.127))
(fp_line (start -5.5 8) (end -10.55 8) (layer F.Fab) (width 0.127))
(fp_line (start 10.55 8) (end 5.5 8) (layer F.Fab) (width 0.127))
(fp_line (start 10.55 -7.5) (end 10.55 8) (layer F.Fab) (width 0.127))
(fp_line (start -10.55 -7.5) (end 10.55 -7.5) (layer F.Fab) (width 0.127))
(fp_arc (start -0.07051 14.756402) (end 0 6) (angle 39.0435) (layer F.Fab) (width 0.127))
(fp_arc (start 0.07051 14.756402) (end -5.5 8) (angle 39.0435) (layer F.Fab) (width 0.127))
(pad N smd circle (at 0 0) (size 17.8 17.8) (layers F.Cu F.Mask))
(pad P1 thru_hole circle (at -10.4 -1.5) (size 2.3 2.3) (drill 1) (layers *.Cu *.Mask))
(pad P2 thru_hole circle (at -10.4 1.6) (size 2.3 2.3) (drill 1) (layers *.Cu *.Mask))
(pad P3 thru_hole circle (at 10.4 1.6) (size 2.3 2.3) (drill 1) (layers *.Cu *.Mask))
(pad P4 thru_hole circle (at 10.4 -1.5) (size 2.3 2.3) (drill 1) (layers *.Cu *.Mask))
)

0
snapeda.pretty/README.MD → kicad/snapeda.pretty/README.MD
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3
kicad/snapeda.pretty/snapeda.dcm Normal file
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@ -0,0 +1,3 @@
EESchema-DOCLIB Version 2.0
#
#End Doc Library

32
kicad/snapeda.pretty/snapeda.lib Normal file
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@ -0,0 +1,32 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# BAT-HLD-001-THM
#
DEF BAT-HLD-001-THM BT 0 40 N N 1 F N
F0 "BT" -150 150 50 H V L BNN
F1 "BAT-HLD-001-THM" -150 -200 50 H V L BNN
F2 "BAT_BAT-HLD-001-THM" 100 350 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "Manufacturer Recommendations" 100 350 50 H I L BNN "STANDARD"
F5 "Linx Technologies" 100 350 50 H I L BNN "MANUFACTURER"
F6 "C" 0 0 50 H I L BNN "PARTREV"
F7 "4.2mm" 100 350 50 H I L BNN "MAXIMUM_PACKAGE_HEIGHT"
DRAW
P 2 0 0 10 -150 75 -100 75 N
P 2 0 0 10 -125 100 -125 50 N
P 2 0 0 6 -50 0 -100 0 N
P 2 0 0 10 -50 0 -50 -100 N
P 2 0 0 10 -50 100 -50 0 N
P 2 0 0 10 50 0 50 -50 N
P 2 0 0 6 50 0 100 0 N
P 2 0 0 10 50 50 50 0 N
X ~ N 300 0 200 L 40 40 0 0 P
X ~ P1 -300 0 200 R 40 40 0 0 P
X ~ P2 -300 0 200 R 40 40 0 0 P
X ~ P3 -300 0 200 R 40 40 0 0 P
X ~ P4 -300 0 200 R 40 40 0 0 P
ENDDRAW
ENDDEF
#
#End Library

3
kicad/sym-lib-table Normal file
View File

@ -0,0 +1,3 @@
(sym_lib_table
(lib (name snapeda)(type Legacy)(uri ${KIPRJMOD}/snapeda.pretty/snapeda.lib)(options "")(descr ""))
)

34
snapeda.pretty/BAT_BAT-HLD-001-THM.kicad_mod
View File

@ -1,34 +0,0 @@
(module BAT_BAT-HLD-001-THM (layer F.Cu) (tedit 60D37F54)
(descr "")
(fp_text reference REF** (at -6.055 -10.389 0) (layer F.SilkS)
(effects (font (size 1.4 1.4) (thickness 0.15)))
)
(fp_text value BAT_BAT-HLD-001-THM (at 6.391 10.389 0) (layer F.Fab)
(effects (font (size 1.4 1.4) (thickness 0.15)))
)
(fp_line (start -10.55 -7.5) (end 10.55 -7.5) (layer F.Fab) (width 0.127))
(fp_line (start 10.55 -7.5) (end 10.55 8.0) (layer F.Fab) (width 0.127))
(fp_line (start 10.55 8.0) (end 5.5 8.0) (layer F.Fab) (width 0.127))
(fp_arc (start -0.0705097376551 14.7564017786) (end 0.0 6.0) (angle 39.0435) (layer F.Fab) (width 0.127))
(fp_arc (start 0.0705097376551 14.7564017786) (end -5.5 8.0) (angle 39.0435) (layer F.Fab) (width 0.127))
(fp_line (start -5.5 8.0) (end -10.55 8.0) (layer F.Fab) (width 0.127))
(fp_line (start -10.55 8.0) (end -10.55 -7.5) (layer F.Fab) (width 0.127))
(fp_line (start -10.55 -2.97) (end -10.55 -7.5) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 -7.5) (end -6.0 -7.5) (layer F.SilkS) (width 0.127))
(fp_line (start 6.0 -7.5) (end 10.55 -7.5) (layer F.SilkS) (width 0.127))
(fp_line (start 10.55 -7.5) (end 10.55 -2.97) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 3.07) (end -10.55 8.0) (layer F.SilkS) (width 0.127))
(fp_line (start -10.55 8.0) (end -5.5 8.0) (layer F.SilkS) (width 0.127))
(fp_line (start 5.5 8.0) (end 10.55 8.0) (layer F.SilkS) (width 0.127))
(fp_line (start 10.55 8.0) (end 10.55 3.07) (layer F.SilkS) (width 0.127))
(fp_line (start -11.8 -9.15) (end 11.8 -9.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.8 -9.15) (end 11.8 9.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 11.8 9.15) (end -11.8 9.15) (layer F.CrtYd) (width 0.05))
(fp_line (start -11.8 9.15) (end -11.8 -9.15) (layer F.CrtYd) (width 0.05))
(pad N smd circle (at 0.0 0.0) (size 17.8 17.8) (layers F.Cu F.Mask))
(pad P1 thru_hole circle (at -10.4 -1.5) (size 2.3 2.3) (drill 1.0) (layers *.Cu *.Mask))
(pad P2 thru_hole circle (at -10.4 1.6) (size 2.3 2.3) (drill 1.0) (layers *.Cu *.Mask))
(pad P3 thru_hole circle (at 10.4 1.6) (size 2.3 2.3) (drill 1.0) (layers *.Cu *.Mask))
(pad P4 thru_hole circle (at 10.4 -1.5) (size 2.3 2.3) (drill 1.0) (layers *.Cu *.Mask))
)

3
sym-lib-table
View File

@ -1,3 +0,0 @@
(sym_lib_table
(lib (name BAT-HLD-001-THM)(type Legacy)(uri ${KIPRJMOD}/snapeda.pretty/BAT-HLD-001-THM.lib)(options "")(descr ""))
)