macsehw/hardware/fpga/bbu/Makefile
Andrew Makousky 6678c4b2ab Commit BBU work-in-progress.
For comparative simulation, I'm also assembling the logic of the earlier
Macintosh 128K, and possibly also Macintosh Plus, in Verilog, and
planning on doing MLB board-level simulations too.
2020-11-25 01:05:48 -06:00

20 lines
449 B
Makefile

TARGETS = bbu.vvp test_stdlogic.vvp test_mac128pal.vvp
all: $(TARGETS)
.SUFFIXES: .v .vvp
.v.vvp:
iverilog -Wanachronisms -Wimplicit -Wportbind -Wselect-range \
-Winfloop -Wsensitivity-entire-vector \
-Wsensitivity-entire-array \
-o $@ $<
bbu.vvp: bbu.v common.vh
test_stdlogic.vvp: test_stdlogic.v stdlogic.v common.vh
test_mac128pal.vvp: test_mac128pal.v test_stdlogic.v stdlogic.v \
mac128pal.v common.vh
clean:
rm -f $(TARGETS)