mirror of
https://github.com/elliotnunn/NetBoot.git
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303 lines
6.2 KiB
C
303 lines
6.2 KiB
C
/* cpu.c qnice cpu-description file */
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/* (c) in 2016 by Volker Barthelmann */
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#include "vasm.h"
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char *cpu_copyright="vasm qnice cpu backend 0.1 (c) in 2016 Volker Barthelmann";
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char *cpuname="qnice";
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mnemonic mnemonics[]={
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#include "opcodes.h"
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};
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int mnemonic_cnt=sizeof(mnemonics)/sizeof(mnemonics[0]);
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int bitsperbyte=8;
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int bytespertaddr=4;
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static char *skip_reg(char *s,int *reg)
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{
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int r=-1;
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if(*s!='r'&&*s!='R'){
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cpu_error(1);
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return s;
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}
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s++;
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if(*s<'0'||*s>'9'){
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cpu_error(1);
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return s;
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}
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r=*s++-'0';
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if(*s>='0'&&*s<='5')
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r=10*r+*s++-'0';
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*reg=r;
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return s;
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}
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int parse_operand(char *p,int len,operand *op,int requires)
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{
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op->type=-1;
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p=skip(p);
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if(requires==OP_REL){
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char *s=p;
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op->type=OP_REL;
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op->offset=parse_expr(&s);
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simplify_expr(op->offset);
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if(s==p)
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return 0;
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else
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return 1;
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}
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if(requires==OP_CC){
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static const char ccodes[]="1xcznvim";
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int i;
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op->type=OP_CC;
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if((p[0]=='!'&&len!=2)||(p[0]!='!'&&len!=1))
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return 0;
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if(*p=='!'){
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op->cc=8;
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p++;
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}else
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op->cc=0;
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for(i=0;i<sizeof(ccodes);i++){
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if(*p==ccodes[i]||tolower(*p)==ccodes[i])
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break;
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}
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if(i>=sizeof(ccodes))
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return 0;
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op->cc|=i;
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return 1;
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}
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if((p[0]=='r'||p[0]=='R')&&p[1]>='0'&&p[1]<='9'&&len==2){
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op->type=OP_REG;
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op->reg=p[1]-'0';
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}else if((p[0]=='r'||p[0]=='R')&&p[1]=='1'&&p[2]>='0'&&p[2]<='5'&&len==3){
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op->type=OP_REG;
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op->reg=(p[1]-'0')*10+p[2]-'0';
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}else if(*p=='@'){
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p=skip(p+1);
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if(*p=='-'&&p[1]=='-'){
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p=skip(p+2);
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p=skip_reg(p,&op->reg);
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p=skip(p);
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op->type=OP_PREDEC;
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}else{
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p=skip_reg(p,&op->reg);
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p=skip(p);
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if(*p=='+'&&p[1]=='+'){
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p=skip(p+2);
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op->type=OP_POSTINC;
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}else{
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op->type=OP_REGIND;
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}
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}
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}else{
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if(*p=='#'){
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op->reg=1;
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p=skip(p+1);
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}else
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op->reg=0;
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op->offset=parse_expr(&p);
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op->type=OP_ABS;
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}
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if(requires==op->type)
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return 1;
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if(requires==OP_GEN&&op->type>=OP_REG&&op->type<=OP_ABS)
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return 1;
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if(requires==OP_DGEN&&op->type>=OP_REG&&op->type<OP_ABS)
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return 1;
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return 0;
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}
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static taddr reloffset(expr *tree,section *sec,taddr pc)
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{
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symbol *sym;
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int btype;
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taddr val;
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simplify_expr(tree);
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if(tree->type==NUM){
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/* should we do it like this?? */
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val=tree->c.val;
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}else{
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btype=find_base(tree,&sym,sec,pc);
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if(btype!=BASE_OK||!LOCREF(sym)||sym->sec!=sec)
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general_error(38);
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else{
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eval_expr(tree,&val,sec,pc);
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val=(val-pc-4)/2;
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}
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}
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return val;
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}
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static taddr absoffset(expr *tree,section *sec,taddr pc,rlist **relocs,int mode,int roffset,int size)
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{
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taddr val;
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if(!eval_expr(tree,&val,sec,pc)){
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taddr addend=val;
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symbol *base;
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if(find_base(tree,&base,sec,pc)!=BASE_OK){
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general_error(38);
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return val;
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}
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add_nreloc_masked(relocs,base,addend,REL_ABS,size,roffset,mode?0x1FFFE:0xFFFF);
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return val;
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}
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if(mode!=0)
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val=(val>>1)&0xFFFF;
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else if(size==16)
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val&=0xffff;
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else
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val&=((1<<size)-1);
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return val;
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}
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static int translate(instruction *p,section *sec,taddr pc)
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{
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int c=p->code;
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return c;
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}
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/* Convert an instruction into a DATA atom including relocations,
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if necessary. */
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dblock *eval_instruction(instruction *p,section *sec,taddr pc)
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{
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dblock *db=new_dblock();
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int opcode,c,osize;
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unsigned int code,addr1,addr2,aflag=0;
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char *d;
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taddr val;
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rlist *relocs=0;
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c=translate(p,sec,pc);
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db->size=osize=instruction_size(p,sec,pc);
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db->data=mymalloc(db->size);
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opcode=mnemonics[c].ext.opcode;
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code=opcode<<12;
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if(p->op[0]){
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if(p->op[0]->type==OP_ABS){
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code|=15<<8;
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code|=(OP_POSTINC-1)<<6;
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addr1=absoffset(p->op[0]->offset,sec,pc,&relocs,p->op[0]->reg,16,16);
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aflag=1;
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}else if(p->op[0]->type==OP_REL){
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code|=15<<8;
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code|=(OP_POSTINC-1)<<6;
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addr1=reloffset(p->op[0]->offset,sec,pc);
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aflag=1;
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}else{
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code|=p->op[0]->reg<<8;
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code|=(p->op[0]->type-1)<<6;
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}
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}
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if(mnemonics[c].ext.encoding==0){
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if(p->op[1]){
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if(p->op[1]->type==OP_ABS){
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code|=15<<2;
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code|=(OP_POSTINC-1)<<0;
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addr2=absoffset(p->op[1]->offset,sec,pc,&relocs,p->op[1]->reg,16,16);
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aflag|=2;
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}else if(p->op[1]->type==OP_REL){
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/* case should not exist */
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code|=15<<2;
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code|=(OP_POSTINC-1)<<0;
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addr2=reloffset(p->op[1]->offset,sec,pc);
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}else{
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code|=p->op[1]->reg<<2;
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code|=(p->op[1]->type-1)<<0;
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}
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}
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}else{
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code|=(mnemonics[c].ext.encoding-1)<<4;
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code|=p->op[1]->cc<<0;
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}
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d=db->data;
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*d++=code;
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*d++=code>>8;
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if(aflag&1){
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*d++=addr1;
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*d++=addr1>>8;
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}
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if(aflag&2){
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*d++=addr2;
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*d++=addr2>>8;
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}
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db->relocs=relocs;
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return db;
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}
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/* Create a dblock (with relocs, if necessary) for size bits of data. */
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dblock *eval_data(operand *op,size_t bitsize,section *sec,taddr pc)
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{
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dblock *new=new_dblock();
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taddr val;
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new->size=(bitsize+7)/8;
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new->data=mymalloc(new->size);
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if(op->type!=OP_ABS)
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ierror(0);
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if(bitsize!=8&&bitsize!=16&&bitsize!=32)
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cpu_error(4);
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val=absoffset(op->offset,sec,pc,&new->relocs,op->reg,0,bitsize);
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if(bitsize==32){
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new->data[3]=val>>24;
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new->data[2]=val>>16;
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new->data[1]=val>>8;
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new->data[0]=val;
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}else if(bitsize==16){
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new->data[1]=val>>8;
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new->data[0]=val;
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}else
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new->data[0]=val;
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return new;
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}
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/* Calculate the size of the current instruction; must be identical
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to the data created by eval_instruction. */
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size_t instruction_size(instruction *p,section *sec,taddr pc)
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{
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int sz=2;
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//int c=translate(p,sec,pc),add=0;
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if(p->op[0]&&(p->op[0]->type==OP_ABS||p->op[0]->type==OP_REL))
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sz+=2;
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if(p->op[1]&&(p->op[1]->type==OP_ABS||p->op[1]->type==OP_REL))
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sz+=2;
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return sz;
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}
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operand *new_operand()
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{
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operand *new=mymalloc(sizeof(*new));
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new->type=-1;
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return new;
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}
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/* return true, if initialization was successfull */
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int init_cpu()
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{
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return 1;
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}
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/* return true, if the passed argument is understood */
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int cpu_args(char *p)
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{
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return 0;
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}
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/* parse cpu-specific directives; return pointer to end of
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cpu-specific text */
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char *parse_cpu_special(char *s)
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{
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return s;
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}
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