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This makes the code pretty easily portable to other architectures if someone wants to make a more modern SIMM programmer. I also was pretty careful to split responsibilities of the different components and give the existing components better names. I'm pretty happy with the organization of the code now. As part of this change I have also heavily optimized the code. In particular, the read and write cycle routines are very important to the overall performance of the programmer. In these routines I had to make some tradeoffs of code performance versus prettiness, but the overall result is much faster programming. Some of these performance changes are the result of what I discovered when I upgraded my AVR compiler. I discovered that it is smarter at looking at 32-bit variables when I use a union instead of bitwise operations. I also shaved off more CPU cycles by carefully making a few small tweaks. I added a bypass for the "program only some chips" mask, because it was adding unnecessary CPU cycles for a feature that is rarely used. I removed the verification feature from the write routine, because we can always verify the data after the write chunk is complete, which is more efficient. I also added assumptions about the initial/final state of the CS/OE/WE pins, which allowed me to remove more valuable CPU cycles from the read/write cycle routines. There are also a few enormous performance optimizations I should have done a long time ago: 1) The code was only handling one received byte per main loop iteration. Reading every byte available cut nearly a minute off of the 8 MB programming time. 2) The code wasn't taking advantage of the faster programming command available in the chips used on the 8 MB SIMM. The end result of all of these optimizations is I have programming time of the 8 MB SIMM down to 3:31 (it used to be 8:43). Another minor issue I fixed: the Micron SIMM chip identification wasn't working properly. It was outputting the manufacturer ID again instead of the device ID.
171 lines
4.0 KiB
C
171 lines
4.0 KiB
C
/*
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* spi.c
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*
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* Created on: Nov 14, 2020
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* Author: Doug
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*/
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#include "../spi.h"
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#include "gpio_hw.h"
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#include <stddef.h>
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#include <avr/io.h>
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/// Keep a struct of available dividers, calculate something at runtime.
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typedef struct SPIDividerInfo
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{
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/// The divider
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uint8_t divider;
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/// Bit 0 = SPR0, Bit 1 = SPR1, Bit 2 = SPI2X (in SPSR)
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uint8_t configBits;
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} SPIDividerInfo;
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/// List of possible SPI dividers. Must be in ascending order.
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static const SPIDividerInfo dividers[] = {
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{2, 0b100},
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{4, 0b000},
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{8, 0b101},
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{16, 0b001},
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{32, 0b110},
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{64, 0b010},
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{128, 0b011}
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};
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/// The lone SPI controller available on this AVR
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static SPIController controller =
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{
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.sckPin = {GPIOB, 1},
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.mosiPin = {GPIOB, 2},
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.misoPin = {GPIOB, 3}
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};
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/** Gets the SPI hardware controller at the specified index
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*
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* @param index The index of the controller. Only 0 is valid on this AVR.
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* @return The SPI controller, or NULL if an invalid index is supplied
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*/
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SPIController *SPI_Controller(uint8_t index)
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{
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// The AVR only has one SPI controller
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return (index == 0) ? &controller : NULL;
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}
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/** Initializes the supplied SPI controller
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*
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* @param c The controller
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*/
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void SPI_InitController(SPIController *c)
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{
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GPIO_SetDirection(c->sckPin, true);
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GPIO_SetDirection(c->mosiPin, true);
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GPIO_SetDirection(c->misoPin, false);
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// Don't do anything with the rest of the registers.
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// SPI_RequestController will handle it.
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}
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/** Initializes the supplied SPI device
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*
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* @param spi The device
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* @param maxClock The maximum clock rate supported by the device in Hz
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* @param mode The SPI mode (see the SPI_MODE_*, SPI_CPHA, and SPI_CPOL defines)
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* @return True on success, false on failure
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*/
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bool SPI_InitDevice(SPIDevice *spi, uint32_t maxClock, uint8_t mode)
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{
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GPIO_SetDirection(spi->csPin, true);
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SPI_Deassert(spi);
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// Calculate which SPI clock divider to use
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int8_t dividerIndex = -1;
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for (uint8_t i = 0; dividerIndex < 0 && i < sizeof(dividers)/sizeof(dividers[0]); i++)
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{
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if (F_CPU / (uint32_t)dividers[i].divider <= maxClock)
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{
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dividerIndex = (int8_t)i;
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}
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}
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// Fill in the SPI config registers according to the requested clock
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if (dividerIndex >= 0)
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{
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uint8_t dividerBits = dividers[dividerIndex].configBits;
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spi->private.spcr =
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(0 << SPIE) | // No SPI interrupts
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(1 << SPE) | // Enable SPI
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(0 << DORD) | // MSB first
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(1 << MSTR) | // Master mode
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(((mode & SPI_CPOL) ? 1 : 0) << CPOL) |
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(((mode & SPI_CPHA) ? 1 : 0) << CPHA) |
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((dividerBits & 3) << SPR0);
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// The only writable bit in SPSR is the SPI2X bit.
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spi->private.spsr =
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((dividerBits >> 2) << SPI2X);
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return true;
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}
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else
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{
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// This SPI device requires a clock slower than what we can divide down to
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return true;
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}
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}
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/** Allows an SPI device to request control of the bus.
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*
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* @param spi The SPI device
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*/
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void SPI_RequestBus(SPIDevice *spi)
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{
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(void)spi;
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// Set up the controller with the correct speed/mode config for this device
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SPCR = spi->private.spcr;
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SPSR = spi->private.spsr;
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}
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/** Allows an SPI device to relinquish control of the bus.
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*
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* @param spi The SPI device
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*/
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void SPI_ReleaseBus(SPIDevice *spi)
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{
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(void)spi;
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}
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/** Asserts an SPI device's chip select pin
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*
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* @param spi The SPI device
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*/
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void SPI_Assert(SPIDevice *spi)
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{
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GPIO_SetOff(spi->csPin);
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}
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/** Deasserts an SPI device's chip select pin
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*
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* @param spi The SPI device
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*/
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void SPI_Deassert(SPIDevice *spi)
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{
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GPIO_SetOn(spi->csPin);
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}
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/** Transfers a single byte to/from an SPI device
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*
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* @param spi The SPI device
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* @param b The byte to send
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* @return The byte that was simultaneously received
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*/
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uint8_t SPI_RWByte(SPIDevice *spi, uint8_t b)
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{
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// Since there's only one controller on this AVR, we don't actually care
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// about the SPI device pointer here
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(void)spi;
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// Write the byte, wait for the write to complete, read back the result
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SPDR = b;
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while (!(SPSR & (1 << SPIF)));
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return SPDR;
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}
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