Build updated MainCode image (matches Mac OS ROM 9.6.1+)

This commit is contained in:
Elliot Nunn 2017-09-20 19:58:54 +08:00
parent 283a0c5ba8
commit 1c43f478a3
113 changed files with 4076 additions and 12134 deletions

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

View File

@ -22,8 +22,8 @@ BackLightDir = {DriverDir}BackLight:
#include {SonyDir}Sony.make
#include {SerialDir}Serial.make
#include {SerialDMADir}SerialDMA.make
##include {SerialDir}Serial.make
##include {SerialDMADir}SerialDMA.make
#include {NewAgeDir}NewAge.make

View File

@ -674,7 +674,7 @@ btQType EQU 21 ; B*Tree Manager
; Device Control Entry Definition
;dCtlEntrySize used to be only 40 bytes!
dCtlEntrySize EQU $34 ; length of a DCE [52 bytes]
dCtlEntrySize EQU $38 ; length of a DCE [52 bytes]
dCtlDriver EQU 0 ; driver [handle]
dCtlFlags EQU 4 ; flags [word]
dCtlQueue EQU 6 ; queue header

View File

@ -53,7 +53,7 @@ resetCmd EQU $00 ; Command for Bus Reset
kbdAddr EQU $02 ; keyboard type device
mouseAddr EQU $03 ; mouse type device
numFDBAdr EQU 16 ; number of avaiblae FDB address
moveTime EQU 50 ; number of times to move device
moveTime EQU 10 ; number of times to move device
IF IopADB THEN

View File

@ -90,6 +90,8 @@ denom ds.w 1 ; Private: fraction of the errors to use next time
spread ds.w 1 ; Private: Number of samples to spread errors over
newData ds.b 1 ; Private: set when deltas are new
ds.b 1 ; align
ds.b 4 ; new
CrsrDevSize EQU *
ENDR

View File

@ -231,41 +231,110 @@ DockingGlobals EQU $1FF8 ; pointer to docking globals <H12>
;_______________________________________________________________________
; Processor Info Record
;
; Used to pass Processor information from the NanoKernel to user mode
; software.
; Configuration Info Record
; Used to pass Configuration information from the Boot Program to the
; NanoKernel for data structure and address mapping initialization.
;_______________________________________________________________________
ProcessorInfoPtr equ $5FFFEFD8 ; logical address of ProcessorInfo record
ProcessorInfoVer equ $5FFFEFDC ; version number of ProcessorInfo record
ProcessorInfoLen equ $5FFFEFDE ; length of ProcessorInfo record
NKConfigurationInfo record 0,increment
ROMByteCheckSums ds.l 8 ; 000 ; ROM Checksums - one word for each of 8 byte lanes
ROMCheckSum64 ds.l 2 ; 020 ; ROM Checksum - 64 bit sum of doublewords
ProcessorInfo record 0,increment
ProcessorVersionReg ds.l 1 ; contents of the PVR special purpose register
CpuClockRateHz ds.l 1 ; CPU Clock frequency
BusClockRateHz ds.l 1 ; Bus Clock frequency
DecClockRateHz ds.l 1 ; Decrementer Clock frequency
PageSize ds.l 1 ; number of bytes in a memory page
DataCacheTotalSize ds.l 1 ; number of bytes in the Data Cache
InstCacheTotalSize ds.l 1 ; number of bytes in the Instruction Cache
CoherencyBlockSize ds.w 1 ; number of bytes in a Coherency Block
ReservationGranuleSize ds.w 1 ; number of bytes in a Reservation Granule
CombinedCaches ds.w 1 ; 1 <- combined or no cache, 0 <- split cache
InstCacheLineSize ds.w 1 ; number of bytes in a Line of the Instruction Cache
DataCacheLineSize ds.w 1 ; number of bytes in a Line of the Data Cache
DataCacheBlockSizeTouch ds.w 1 ; number of bytes in a Block for DCBT DCBTST
InstCacheBlockSize ds.w 1 ; number of bytes in a Block of the Instruction Cache
DataCacheBlockSize ds.w 1 ; number of bytes in a Block of the Data Cache
InstCacheAssociativity ds.w 1 ; Associativity of the Instruction Cache
DataCacheAssociativity ds.w 1 ; Associativity of the Data Cache
ROMImageBaseOffset ds.l 1 ; 028 ; Offset of Base of total ROM image
ROMImageSize ds.l 1 ; 02c ; Number of bytes in ROM image
ROMImageVersion ds.l 1 ; 030 ; ROM Version number for entire ROM
TransCacheTotalSize ds.w 1 ; number of entries in the Translation Cache
TransCacheAssociativity ds.w 1 ; Associativity of the Translation Cache
align 32 ; pad to nice cache block alignment
Size equ *-ProcessorInfo
Mac68KROMOffset ds.l 1 ; 034 ; Offset of base of Macintosh 68K ROM
Mac68KROMSize ds.l 1 ; 038 ; Number of bytes in Macintosh 68K ROM
ExceptionTableOffset ds.l 1 ; 03c ; Offset of base of PowerPC Exception Table Code
ExceptionTableSize ds.l 1 ; 040 ; Number of bytes in PowerPC Exception Table Code
HWInitCodeOffset ds.l 1 ; 044 ; Offset of base of Hardware Init Code (field moved!)
HWInitCodeSize ds.l 1 ; 048 ; Number of bytes in Hardware Init Code
KernelCodeOffset ds.l 1 ; 04c ; Offset of base of NanoKernel Code
KernelCodeSize ds.l 1 ; 050 ; Number of bytes in NanoKernel Code
EmulatorCodeOffset ds.l 1 ; 054 ; Offset of base of Emulator Code
EmulatorCodeSize ds.l 1 ; 058 ; Number of bytes in Emulator Code
OpcodeTableOffset ds.l 1 ; 05c ; Offset of base of Opcode Table
OpcodeTableSize ds.l 1 ; 060 ; Number of bytes in Opcode Table
BootstrapVersion ds.b 16 ; 064 ; Bootstrap loader version info
BootVersionOffset ds.l 1 ; 074 ; offset within EmulatorData of BootstrapVersion
ECBOffset ds.l 1 ; 078 ; offset within EmulatorData of ECB
IplValueOffset ds.l 1 ; 07c ; offset within EmulatorData of IplValue
EmulatorEntryOffset ds.l 1 ; 080 ; offset within Emulator Code of entry point
KernelTrapTableOffset ds.l 1 ; 084 ; offset within Emulator Code of KernelTrapTable
TestIntMaskInit ds.l 1 ; 088 ; initial value for test interrupt mask
ClearIntMaskInit ds.l 1 ; 08c ; initial value for clear interrupt mask
PostIntMaskInit ds.l 1 ; 090 ; initial value for post interrupt mask
LA_InterruptCtl ds.l 1 ; 094 ; logical address of Interrupt Control I/O page
InterruptHandlerKind ds.b 1 ; 098 ; kind of handler to use
ds.b 3 ; 099 ; filler
LA_InfoRecord ds.l 1 ; 09c ; logical address of InfoRecord page
LA_KernelData ds.l 1 ; 0a0 ; logical address of KernelData page
LA_EmulatorData ds.l 1 ; 0a4 ; logical address of EmulatorData page
LA_DispatchTable ds.l 1 ; 0a8 ; logical address of Dispatch Table
LA_EmulatorCode ds.l 1 ; 0ac ; logical address of Emulator Code
MacLowMemInitOffset ds.l 1 ; 0b0 ; offset to list of LowMem addr/data values
PageAttributeInit ds.l 1 ; 0b4 ; default WIMG/PP settings for PTE creation
PageMapInitSize ds.l 1 ; 0b8 ; size of page mapping info
PageMapInitOffset ds.l 1 ; 0bc ; offset to page mapping info (from base of ConfigInfo)
PageMapIRPOffset ds.l 1 ; 0c0 ; offset of InfoRecord map info (from base of PageMap)
PageMapKDPOffset ds.l 1 ; 0c4 ; offset of KernelData map info (from base of PageMap)
PageMapEDPOffset ds.l 1 ; 0c8 ; offset of EmulatorData map info (from base of PageMap)
SegMaps
SegMap32SupInit ds.l 32 ; 0cc ; 32 bit mode Segment Map Supervisor space
SegMap32UsrInit ds.l 32 ; 14c ; 32 bit mode Segment Map User space
SegMap32CPUInit ds.l 32 ; 1cc ; 32 bit mode Segment Map CPU space
SegMap32OvlInit ds.l 32 ; 24c ; 32 bit mode Segment Map Overlay mode
BATRangeInit ds.l 32 ; 2cc ; BAT mapping ranges
BatMap32SupInit ds.l 1 ; 34c ; 32 bit mode BAT Map Supervisor space
BatMap32UsrInit ds.l 1 ; 350 ; 32 bit mode BAT Map User space
BatMap32CPUInit ds.l 1 ; 354 ; 32 bit mode BAT Map CPU space
BatMap32OvlInit ds.l 1 ; 358 ; 32 bit mode BAT Map Overlay mode
SharedMemoryAddr ds.l 1 ; 35c ; physical address of Mac/Smurf shared message mem
PA_RelocatedLowMemInit ds.l 1 ; 360 ; physical address of RelocatedLowMem
OpenFWBundleOffset ds.l 1 ; 364 ; Offset of base of OpenFirmware PEF Bundle
OpenFWBundleSize ds.l 1 ; 368 ; Number of bytes in OpenFirmware PEF Bundle
LA_OpenFirmware ds.l 1 ; 36c ; logical address of Open Firmware
PA_OpenFirmware ds.l 1 ; 370 ; physical address of Open Firmware
LA_HardwarePriv ds.l 1 ; 374 ; logical address of HardwarePriv callback
; Used to stop here, plus 8 bytes for cache block alignment (0x380 bytes).
; Now there be more!
Debug ds.w 1 ; 378 ; > 256 required for screen log
DebugThreshold equ 257
org $388
DebugFlags ds.l 1 ; 388 ; bit 1<< 1 required for screen log
NanodbgrFlagShift equ 0
NanodbgrFlagBit equ 31 - NanodbgrFlagShift
LogFlagShift equ 1
LogFlagBit equ 31 - LogFlagShift
org $100
Size equ *
endr
;_______________________________________________________________________
; System Info Record
;
@ -273,70 +342,112 @@ Size equ *-ProcessorInfo
; software.
;_______________________________________________________________________
NKSystemInfoPtr equ $5FFFEFF0 ; logical address of NKSystemInfo record
NKSystemInfoVer equ $5FFFEFF4 ; version number of NKSystemInfo record
NKSystemInfoLen equ $5FFFEFF6 ; length of NKSystemInfo record
NKSystemInfoPtr equ $68FFEFF0 ; logical address of NKSystemInfo record
NKSystemInfoVer equ $68FFEFF4 ; version number of NKSystemInfo record
NKSystemInfoLen equ $68FFEFF6 ; length of NKSystemInfo record
NKSystemInfo record 0,increment
PhysicalMemorySize ds.l 1 ; Number of bytes in Physical RAM
UsableMemorySize ds.l 1 ; Number of bytes in Usable RAM
LogicalMemorySize ds.l 1 ; Number of bytes in Logical RAM
HashTableSize ds.l 1 ; Number of bytes in Memory Hash Table
PhysicalMemorySize ds.l 1 ; 000, irp+dc0 ; Number of bytes in Physical RAM
UsableMemorySize ds.l 1 ; 004, irp+dc4 ; Number of bytes in Usable RAM
LogicalMemorySize ds.l 1 ; 008, irp+dc8 ; Number of bytes in Logical RAM
HashTableSize ds.l 1 ; 00c, irp+dcc ; Number of bytes in Memory Hash Table
L2DataCacheTotalSize ds.l 1 ; number of bytes in the L2 Data Cache
L2InstCacheTotalSize ds.l 1 ; number of bytes in the L2 Instruction Cache
L2CombinedCaches ds.w 1 ; 1 <- combined or no cache, 0 <- split cache
L2InstCacheBlockSize ds.w 1 ; number of bytes in a Block of the L2 Instruction Cache
L2DataCacheBlockSize ds.w 1 ; number of bytes in a Block of the L2 Data Cache
L2InstCacheAssociativity ds.w 1 ; Associativity of the L2 Instruction Cache
L2DataCacheAssociativity ds.w 1 ; Associativity of the L2 Data Cache
ds.b 2 ; unused
L2DataCacheTotalSize ds.l 1 ; 010, irp+dd0 ; number of bytes in the L2 Data Cache
L2InstCacheTotalSize ds.l 1 ; 014, irp+dd4 ; number of bytes in the L2 Instruction Cache
L2CombinedCaches ds.w 1 ; 018, irp+dd8 ; 1 <- combined or no cache, 0 <- split cache
L2InstCacheBlockSize ds.w 1 ; 01a, irp+dda ; number of bytes in a Block of the L2 Instruction Cache
L2DataCacheBlockSize ds.w 1 ; 01c, irp+ddc ; number of bytes in a Block of the L2 Data Cache
L2InstCacheAssociativity ds.w 1 ; 01e, irp+dde ; Associativity of the L2 Instruction Cache
L2DataCacheAssociativity ds.w 1 ; 020, irp+de0 ; Associativity of the L2 Data Cache
ds.b 2 ; 022, irp+de2 ; unused
ds.b 2 ; unused
FlashManufacturerCode ds.b 1 ; Flash ROM Manufacturer code
FlashDeviceCode ds.b 1 ; Flash ROM Device code
FlashStart ds.l 1 ; Starting address of Flash ROM
FlashSize ds.l 1 ; Number of bytes in Flash ROM
ds.b 2 ; 024, irp+de4 ; unused
FlashManufacturerCode ds.b 1 ; 026, irp+de6 ; Flash ROM Manufacturer code
FlashDeviceCode ds.b 1 ; 027, irp+de7 ; Flash ROM Device code
FlashStart ds.l 1 ; 028, irp+de8 ; Starting address of Flash ROM
FlashSize ds.l 1 ; 02c, irp+dec ; Number of bytes in Flash ROM
align 16
Bank0Start ds.l 1 ; Starting address of RAM bank 0
Bank0Size ds.l 1 ; Number of bytes in RAM bank 0
Bank1Start ds.l 1 ; Starting address of RAM bank 1
Bank1Size ds.l 1 ; Number of bytes in RAM bank 1
Bank2Start ds.l 1 ; Starting address of RAM bank 2
Bank2Size ds.l 1 ; Number of bytes in RAM bank 2
Bank3Start ds.l 1 ; Starting address of RAM bank 3
Bank3Size ds.l 1 ; Number of bytes in RAM bank 3
Bank4Start ds.l 1 ; Starting address of RAM bank 4
Bank4Size ds.l 1 ; Number of bytes in RAM bank 4
Bank5Start ds.l 1 ; Starting address of RAM bank 5
Bank5Size ds.l 1 ; Number of bytes in RAM bank 5
Bank6Start ds.l 1 ; Starting address of RAM bank 6
Bank6Size ds.l 1 ; Number of bytes in RAM bank 6
Bank7Start ds.l 1 ; Starting address of RAM bank 7
Bank7Size ds.l 1 ; Number of bytes in RAM bank 7
Bank8Start ds.l 1 ; Starting address of RAM bank 8
Bank8Size ds.l 1 ; Number of bytes in RAM bank 8
Bank9Start ds.l 1 ; Starting address of RAM bank 9
Bank9Size ds.l 1 ; Number of bytes in RAM bank 9
Bank10Start ds.l 1 ; Starting address of RAM bank 10
Bank10Size ds.l 1 ; Number of bytes in RAM bank 10
Bank11Start ds.l 1 ; Starting address of RAM bank 11
Bank11Size ds.l 1 ; Number of bytes in RAM bank 11
Bank12Start ds.l 1 ; Starting address of RAM bank 12
Bank12Size ds.l 1 ; Number of bytes in RAM bank 12
Bank13Start ds.l 1 ; Starting address of RAM bank 13
Bank13Size ds.l 1 ; Number of bytes in RAM bank 13
Bank14Start ds.l 1 ; Starting address of RAM bank 14
Bank14Size ds.l 1 ; Number of bytes in RAM bank 14
Bank15Start ds.l 1 ; Starting address of RAM bank 15
Bank15Size ds.l 1 ; Number of bytes in RAM bank 15
align 32 ; pad to nice cache block alignment
MaxBanks equ 16 ; 16 banks, 0É15
Size equ *-SystemInfo
Bank0Start ds.l 1 ; 030, irp+df0 ; Starting address of RAM bank 0
Bank0Size ds.l 1 ; 034, irp+df4 ; Number of bytes in RAM bank 0
Bank1Start ds.l 1 ; 038, irp+df8 ; Starting address of RAM bank 1
Bank1Size ds.l 1 ; 03c, irp+dfc ; Number of bytes in RAM bank 1
Bank2Start ds.l 1 ; 040, irp+e00 ; Starting address of RAM bank 2
Bank2Size ds.l 1 ; 044, irp+e04 ; Number of bytes in RAM bank 2
Bank3Start ds.l 1 ; 048, irp+e08 ; Starting address of RAM bank 3
Bank3Size ds.l 1 ; 04c, irp+e0c ; Number of bytes in RAM bank 3
Bank4Start ds.l 1 ; 050, irp+e10 ; Starting address of RAM bank 4
Bank4Size ds.l 1 ; 054, irp+e14 ; Number of bytes in RAM bank 4
Bank5Start ds.l 1 ; 058, irp+e18 ; Starting address of RAM bank 5
Bank5Size ds.l 1 ; 05c, irp+e1c ; Number of bytes in RAM bank 5
Bank6Start ds.l 1 ; 060, irp+e20 ; Starting address of RAM bank 6
Bank6Size ds.l 1 ; 064, irp+e24 ; Number of bytes in RAM bank 6
Bank7Start ds.l 1 ; 068, irp+e28 ; Starting address of RAM bank 7
Bank7Size ds.l 1 ; 06c, irp+e2c ; Number of bytes in RAM bank 7
Bank8Start ds.l 1 ; 070, irp+e30 ; Starting address of RAM bank 8
Bank8Size ds.l 1 ; 074, irp+e34 ; Number of bytes in RAM bank 8
Bank9Start ds.l 1 ; 078, irp+e38 ; Starting address of RAM bank 9
Bank9Size ds.l 1 ; 07c, irp+e3c ; Number of bytes in RAM bank 9
Bank10Start ds.l 1 ; 080, irp+e40 ; Starting address of RAM bank 10
Bank10Size ds.l 1 ; 084, irp+e44 ; Number of bytes in RAM bank 10
Bank11Start ds.l 1 ; 088, irp+e48 ; Starting address of RAM bank 11
Bank11Size ds.l 1 ; 08c, irp+e4c ; Number of bytes in RAM bank 11
Bank12Start ds.l 1 ; 090, irp+e50 ; Starting address of RAM bank 12
Bank12Size ds.l 1 ; 094, irp+e54 ; Number of bytes in RAM bank 12
Bank13Start ds.l 1 ; 098, irp+e58 ; Starting address of RAM bank 13
Bank13Size ds.l 1 ; 09c, irp+e5c ; Number of bytes in RAM bank 13
Bank14Start ds.l 1 ; 0a0, irp+e60 ; Starting address of RAM bank 14
Bank14Size ds.l 1 ; 0a4, irp+e64 ; Number of bytes in RAM bank 14
Bank15Start ds.l 1 ; 0a8, irp+e68 ; Starting address of RAM bank 15
Bank15Size ds.l 1 ; 0ac, irp+e6c ; Number of bytes in RAM bank 15
Bank16Start ds.l 1 ; 0b0, irp+e70 ; Starting address of RAM bank 16
Bank16Size ds.l 1 ; 0b4, irp+e74 ; Number of bytes in RAM bank 16
Bank17Start ds.l 1 ; 0b8, irp+e78 ; Starting address of RAM bank 17
Bank17Size ds.l 1 ; 0bc, irp+e7c ; Number of bytes in RAM bank 17
Bank18Start ds.l 1 ; 0c0, irp+e80 ; Starting address of RAM bank 18
Bank18Size ds.l 1 ; 0c4, irp+e84 ; Number of bytes in RAM bank 18
Bank19Start ds.l 1 ; 0c8, irp+e88 ; Starting address of RAM bank 19
Bank19Size ds.l 1 ; 0cc, irp+e8c ; Number of bytes in RAM bank 19
Bank20Start ds.l 1 ; 0d0, irp+e90 ; Starting address of RAM bank 20
Bank20Size ds.l 1 ; 0d4, irp+e94 ; Number of bytes in RAM bank 20
Bank21Start ds.l 1 ; 0d8, irp+e98 ; Starting address of RAM bank 21
Bank21Size ds.l 1 ; 0dc, irp+e9c ; Number of bytes in RAM bank 21
Bank22Start ds.l 1 ; 0e0, irp+ea0 ; Starting address of RAM bank 22
Bank22Size ds.l 1 ; 0e4, irp+ea4 ; Number of bytes in RAM bank 22
Bank23Start ds.l 1 ; 0e8, irp+ea8 ; Starting address of RAM bank 23
Bank23Size ds.l 1 ; 0ec, irp+eac ; Number of bytes in RAM bank 23
Bank24Start ds.l 1 ; 0f0, irp+eb0 ; Starting address of RAM bank 24
Bank24Size ds.l 1 ; 0f4, irp+eb4 ; Number of bytes in RAM bank 24
Bank25Start ds.l 1 ; 0f8, irp+eb8 ; Starting address of RAM bank 25
Bank25Size ds.l 1 ; 0fc, irp+ebc ; Number of bytes in RAM bank 25
EndOfBanks
MaxBanks equ 26 ; Pads out to old struct len (cache block), more to come...
; Interrupt Support Data
IntCntrBaseAddr ds.l 1 ; 100, irp+ec0 ; Interrupt Controller Base Address (variable is used since this is a PCI Dev and address is relocatable)
IntPendingReg ds.l 2 ; 104, irp+ec4 ; Data of current interrupts pending register
; These fields were added to report information about tightly-coupled L2 caches.
; The inline L2 information should be used in situations where there is a CPU
; card L2 cache that can coexist with a motherboard L2.
InlineL2DSize ds.l 1 ; 10c, irp+ecc ; Size of in-line L2 Dcache
InlineL2ISize ds.l 1 ; 110, irp+ed0 ; Size of in-line L2 Icache
InlineL2Combined ds.w 1 ; 114, irp+ed4 ; 1 <- combined or no cache, 0 <- split cache
InlineL2IBlockSize ds.w 1 ; 116, irp+ed6 ; Block size of in-line I L2 cache
InlineL2DBlockSize ds.w 1 ; 118, irp+ed8 ; Block size of in-line D L2 cache
InlineL2IAssoc ds.w 1 ; 11a, irp+eda ; Associativity of L2 I
InlineL2DAssoc ds.w 1 ; 11c, irp+edc ; Associativity of L2 D
ds.w 1 ; 11e, irp+ede ; pad
; More Interrupt Support Data
IntsCompleted ds.l 2 ; 120, irp+ee0 ; completed interrupts
ds.b $18
Size equ *
endr
;_______________________________________________________________________
; Diagnostic Info Record
;
@ -344,19 +455,52 @@ Size equ *-SystemInfo
; the NanoKernel, and from the NanoKernel to user mode software.
;_______________________________________________________________________
nkDiagInfoPtr equ $5FFFEFE8 ; logical address of DiagnosticInfo record
nkDiagInfoVer equ $5FFFEFEC ; version number of DiagnosticInfo record
nkDiagInfoLen equ $5FFFEFEE ; length of DiagnosticInfo record
NKDiagInfoPtr equ $68FFEFE8 ; logical address of DiagnosticInfo record
NKDiagInfoVer equ $68FFEFEC ; version number of DiagnosticInfo record
NKDiagInfoLen equ $68FFEFEE ; length of DiagnosticInfo record
nkDiagInfo record 0,increment
ds.b 236 ; it WILL all fit in 256 bytes
DiagPOSTResult2 ds.l 1 ; POST results
DiagPOSTResult1 ds.l 1 ; POST results
DiagEmoRestart ds.l 1 ; Burn in restart flag
DiagWarmStartHigh ds.l 1 ; First long of native warm start (WLSC) <SM44>
DiagWarmStartLow ds.l 1 ; Second long of native warm start (SamB) <SM44>
align 32 ; pad to nice cache block alignment
Size equ *-nkDiagInfo
NKDiagInfo record 0,increment
BankMBFailOffset ds.l 1 ; 000 ; Mother Board RAM failure code
BankAFailOffset ds.l 1 ; 004 ; Bank A RAM failure code
BankBFailOffset ds.l 1 ; 008 ; Bank B RAM failure code
BankCFailOffset ds.l 1 ; 00c ; Bank C RAM failure code
BankDFailOffset ds.l 1 ; 010 ; Bank D RAM failure code
BankEFailOffset ds.l 1 ; 014 ; Bank E RAM failure code
BankFFailOffset ds.l 1 ; 018 ; Bank F RAM failure code
BankGFailOffset ds.l 1 ; 01c ; Bank G RAM failure code
BankHFailOffset ds.l 1 ; 020 ; Bank H RAM failure code
CacheFailOffset ds.l 1 ; 024 ; cache failure code
LongBootParamOffset ds.l 1 ; 028 ; on longBoot this is where the params will be
POSTTraceOffset ds.l 1 ; 02c ; this tells us what route the POST took
POSTOldWarmOffset ds.l 1 ; 030 ; logged address of old warmstart flag
POSTOldLongOffset ds.l 1 ; 034 ; logged address of old long boot flag
POSTOldGlobbOffset ds.l 1 ; 038 ; logged address of old Diagnostic Info Record
POSTOldParamOffset ds.l 1 ; 03c ; the params from the old diag globb
POSTStartRTCUOffset ds.l 1 ; 040 ; PPC Real Time Clock Upper at start of POST
POSTStartRTCLOffset ds.l 1 ; 044 ; PPC Real Time Clock Lower at start of POST
POSTEndRTCUOffset ds.l 1 ; 048 ; PPC Real Time Clock Upper at end of POST
POSTEndRTCLOffset ds.l 1 ; 04c ; PPC Real Time Clock Lower at end of POST
POSTTestTypeOffset ds.l 1 ; 050 ; when long RAM tests fail test type which failed is put here
POSTError2Offset ds.l 1 ; 054 ; result codes from tests
POSTError3Offset ds.l 1 ; 058 ; result codes from tests
POSTError4Offset ds.l 1 ; 05c ; result codes from tests
RegistersStore ds.b 140 ; 060 ; store all 60x registers here, still fit into 256 bytes size.
; Everything BEFORE here is new (hence the funny-sized register store)
DiagPOSTResult2 ds.l 1 ; 0ec ; POST results
DiagPOSTResult1 ds.l 1 ; 0f0 ; POST results
DiagLongBootSig ds.l 1 ; 0f4 ; Burn in restart flag
DiagWarmStartHigh ds.l 1 ; 0f8 ; First long of native warm start (WLSC) <SM44>
DiagWarmStartLow ds.l 1 ; 0fc ; Second long of native warm start (SamB) <SM44>
Size equ *
endr
@ -368,30 +512,278 @@ Size equ *-nkDiagInfo
; software.
;_______________________________________________________________________
nkNanoKernelInfoPtr equ $5FFFEFE0 ; logical address of NanoKernelInfo record
nkNanoKernelInfoVer equ $5FFFEFE4 ; version number of NanoKernelInfo record
nkNanoKernelInfoLen equ $5FFFEFE6 ; length of NanoKernelInfo record
NKNanoKernelInfoPtr equ $68FFEFE0 ; logical address of NanoKernelInfo record
NKNanoKernelInfoVer equ $68FFEFE4 ; version number of NanoKernelInfo record
NKNanoKernelInfoLen equ $68FFEFE6 ; length of NanoKernelInfo record
nkNanoKernelInfo record 0,increment
ExceptionCauseCounts ds.l 32 ; counters per exception cause
NanoKernelCallCounts ds.l 16 ; counters per NanoKernel call
ExternalIntCount ds.l 1 ; count of External Interrupts
MisalignmentCount ds.l 1 ; count of Misalignment Interrupts
FPUReloadCount ds.l 1 ; count of FPU reloads on demand
DecrementerIntCount ds.l 1 ; count of Decrementer Interrupts
QuietWriteCount ds.l 1 ; count of Writes to Quiet Read-Only memory
HashTableCreateCount ds.l 1 ; count of Hash Table Entry creations
HashTableDeleteCount ds.l 1 ; count of Hash Table Entry deletions
HashTableOverflowCount ds.l 1 ; count of Hash Table Entry overflows
EmulatedUnimpInstCount ds.l 1 ; count of Emulated unimplemented instructions
NCBPtrCacheMissCount ds.l 1 ; count of NCB Pointer cache misses
ExceptionPropagateCount ds.l 1 ; count of Exceptions propagated to system
ExceptionForcedCount ds.l 1 ; count of Exceptions forced to system
align 8 ; align for 64 bit time base counters
SysContextCpuTime ds.l 2 ; CPU Time used by System Context
AltContextCpuTime ds.l 2 ; CPU Time used by Alternate Context
align 32 ; pad to nice cache block alignment
Size equ *-nkNanoKernelInfo
NKNanoKernelInfo record 0,increment
ExceptionCauseCounts ds.l 32 ; 000, kdp+dc0 ; counters per exception cause
NanoKernelCallCounts ds.l 16 ; 080, kdp+e40 ; counters per NanoKernel call
ExternalIntCount ds.l 1 ; 0c0, kdp+e80 ; count of External Interrupts
MisalignmentCount ds.l 1 ; 0c4, kdp+e84 ; count of Misalignment Interrupts
FPUReloadCount ds.l 1 ; 0c8, kdp+e88 ; count of FPU reloads on demand
DecrementerIntCount ds.l 1 ; 0cc, kdp+e8c ; count of Decrementer Interrupts
QuietWriteCount ds.l 1 ; 0d0, kdp+e90 ; count of Writes to Quiet Read-Only memory
HashTableCreateCount ds.l 1 ; 0d4, kdp+e94 ; count of Hash Table Entry creations
HashTableDeleteCount ds.l 1 ; 0d8, kdp+e98 ; count of Hash Table Entry deletions
HashTableOverflowCount ds.l 1 ; 0dc, kdp+e9c ; count of Hash Table Entry overflows
EmulatedUnimpInstCount ds.l 1 ; 0e0, kdp+ea0 ; count of Emulated unimplemented instructions
NCBPtrCacheMissCount ds.l 1 ; 0e4, kdp+ea4 ; count of NCB Pointer cache misses
ExceptionPropagateCount ds.l 1 ; 0e8, kdp+ea8 ; count of Exceptions propagated to system
ExceptionForcedCount ds.l 1 ; 0ec, kdp+eac ; count of Exceptions forced to system
SysContextCpuTime ds.l 2 ; 0f0, kdp+eb0 ; CPU Time used by System Context
AltContextCpuTime ds.l 2 ; 0f8, kdp+eb4 ; CPU Time used by Alternate Context
; This stuff is new (starts at 0x100)
blueProcessID ds.l 1 ; 100, kdp+ec0 ; ID of the blue process.
blueTaskID ds.l 1 ; 104, kdp+ec4 ; ID of the blue task.
pageQueueID ds.l 1 ; 108, kdp+ec8 ; ID of the page fault queue.
TaskCount ds.l 1 ; 10c, kdp+ecc ; Number of tasks.
FreePoolExtendCount ds.l 1 ; 110, kdp+ed0 ; Number of pages given to the nanokernel.
;rsrv1 ds.l 3 ; 114, kdp+ed4 ; reserved???
; My additions
org $11c
ConfigFlags ds.l 1 ; 11c, kdp+edc ; includes ScreenConsole ... TODO put flag equs here
NanodbgrFlagShift equ 1
NanodbgrFlagBit equ 31 - NanodbgrFlagShift
LogFlagShift equ 3
LogFlagBit equ 31 - LogFlagShift
; bit 31 always set on replacement, bit 27 set on replacement with ROM 2.7f3 or later
org $128
VMDispatchCountTblPtr ds.l 1 ; 128, kdp+ee8
ds.l 1
ds.l 1
MPDispatchCountTblPtr ds.l 1 ; 134, kdp+ef4 ; ???????
AddrSpcSetCtr ds.l 1 ; 138, kdp+ef8 ; incremented by SetAddrSpcRegisters
IDCtr ds.l 1 ; 13c, kdp+efc
ds.b $20
Size equ *
endr
;_______________________________________________________________________
; Processor Info Record
;
; Used to pass Processor information from the NanoKernel to user mode
; software.
;_______________________________________________________________________
ProcessorInfoPtr equ $68FFEFD8 ; logical address of ProcessorInfo record
ProcessorInfoVer equ $68FFEFDC ; version number of ProcessorInfo record
ProcessorInfoLen equ $68FFEFDE ; length of ProcessorInfo record
ProcessorInfo record 0,increment
ProcessorVersionReg ds.l 1 ; 000, kdp+f20 ; contents of the PVR special purpose register
CpuClockRateHz ds.l 1 ; 004, kdp+f24 ; CPU Clock frequency
BusClockRateHz ds.l 1 ; 008, kdp+f28 ; Bus Clock frequency
DecClockRateHz ds.l 1 ; 00c, kdp+f2c ; Decrementer Clock frequency
Ovr
PageSize ds.l 1 ; 010, kdp+f30 ; number of bytes in a memory page
DataCacheTotalSize ds.l 1 ; 014, kdp+f34 ; number of bytes in the Data Cache
InstCacheTotalSize ds.l 1 ; 018, kdp+f38 ; number of bytes in the Instruction Cache
CoherencyBlockSize ds.w 1 ; 01c, kdp+f3c ; number of bytes in a Coherency Block
ReservationGranuleSize ds.w 1 ; 01e, kdp+f3e ; number of bytes in a Reservation Granule
CombinedCaches ds.w 1 ; 020, kdp+f40 ; 1 <- combined or no cache, 0 <- split cache
InstCacheLineSize ds.w 1 ; 022, kdp+f42 ; number of bytes in a Line of the Instruction Cache
DataCacheLineSize ds.w 1 ; 024, kdp+f44 ; number of bytes in a Line of the Data Cache
DataCacheBlockSizeTouch ds.w 1 ; 026, kdp+f46 ; number of bytes in a Block for DCBT DCBTST
InstCacheBlockSize ds.w 1 ; 028, kdp+f48 ; number of bytes in a Block of the Instruction Cache
DataCacheBlockSize ds.w 1 ; 02a, kdp+f4a ; number of bytes in a Block of the Data Cache
InstCacheAssociativity ds.w 1 ; 02c, kdp+f4c ; Associativity of the Instruction Cache
DataCacheAssociativity ds.w 1 ; 02e, kdp+f4e ; Associativity of the Data Cache
TransCacheTotalSize ds.w 1 ; 030, kdp+f50 ; number of entries in the Translation Cache
TransCacheAssociativity ds.w 1 ; 032, kdp+f52 ; Associativity of the Translation Cache
OvrEnd
; These fields were added to report information about back-side L2 caches
ProcessorL2DSize ds.l 1 ; 034, kdp+f54 ; Size of back-side L2 Dcache
ProcessorL2ISize ds.l 1 ; 038, kdp+f58 ; Size of back-side L2 Icache
ProcessorL2Combined ds.w 1 ; 03c, kdp+f5c ; 1 <- combined or no cache, 0 <- split cache
ProcessorL2IBlockSize ds.w 1 ; 03e, kdp+f5e ; Block size of back-side I L2 cache
ProcessorL2DBlockSize ds.w 1 ; 040, kdp+f60 ; Block size of back-side D L2 cache
ProcessorL2IAssoc ds.w 1 ; 042, kdp+f62 ; Associativity of L2 I
ProcessorL2DAssoc ds.w 1 ; 044, kdp+f64 ; Associativity of L2 D
filler1 ds.w 1 ; 046, kdp+f66 ; align to long
; ProcessorFlags - Definitions for the processor flags field. These are bit positions,
; as in 1 << hasVMX, and not masks.
hasL2CR equ 0
hasPLRUL1 equ 1
hasTAU equ 2
hasVMX equ 3
unknownFlag equ 4
hasExtraBATs equ 5
ProcessorFlags ds.l 1 ; 048, kdp+f68 ; flags to specify processor features
align 5 ; pad to nice cache block alignment
org $05e
SetToZero ds.w 1 ; 05e, kdp+f7e ; by same code that sets below
CpuClockRateHzCopy ds.l 1 ; 060, kdp+f80 ; copies by Init.s
BusClockRateHzCopy ds.l 1 ; 064, kdp+f84 ; copies by Init.s
DecClockRateHzCopy ds.l 1 ; 068, kdp+f88 ; copies by Init.s
ds.b $34
Size equ *
endr
;_______________________________________________________________________
; Hardware Info Record
;
; Used to pass hardware information from the NanoKernel to user mode
; software.
;_______________________________________________________________________
NKHWInfoPtr equ $68FFEFD0 ; logical address of HWInfo record
NKHWInfoVer equ $68FFEFD4 ; version number of HWInfo record
NKHWInfoLen equ $68FFEFD6 ; length of HWInfo record
NKHWInfo record 0,increment
MacROM_Base ds.l 1 ; 000, irp+f00 ; base address (physical) of Mac ROM
DeviceTreeBase ds.l 1 ; 004, irp+f04 ; base address of the copied device tree properties
UniversalInfoTableBase ds.l 1 ; 008, irp+f08 ; base address of the Universal Info Table
ConfigInfoTableBase ds.l 1 ; 00c, irp+f0c ; base address of the Config Info Table
VectorLookupTable ds.l 1 ; 010, irp+f10 ; base address of the interrupt vector lookup table (short *)
VectorMaskTable ds.l 1 ; 014, irp+f14 ; base address of the interrupt vector mask table (long *)
OpenPICBaseAddr ds.l 1 ; 018, irp+f18 ; OpenPIC base address
ISAMaster8259 ds.l 1 ; 01c, irp+f1c ; ISA Master 8259 ports (char *)
ISASlave8259 ds.l 1 ; 020, irp+f20 ; ISA Slave 8259 ports (char *)
InterruptAck8259 ds.l 1 ; 024, irp+f24 ; address to read to ack 8259 interrupt (long *)
; interrupt pending bits (actively changing)
PendingInts ds.l 2 ; 028, irp+f28 ; 64 bits of pending interrupts
; some Mac I/O device base addresses
ADB_Base ds.l 1 ; 030, irp+f30 ; base address of ADB
SCSI_DMA_Base ds.l 1 ; 034, irp+f34 ; base address of SCSI DMA registers
; RTAS related stuff
RTAS_PrivDataArea ds.l 1 ; 038, irp+f38 ; RTAS private data area
MacOS_NVRAM_Offset ds.l 1 ; 03c, irp+f3c ; offset into nvram to MacOS data
RTAS_NVRAM_Fetch ds.l 1 ; 040, irp+f40 ; token for RTAS NVRAM fetch
RTAS_NVRAM_Store ds.l 1 ; 044, irp+f44 ; token for RTAS NVRAM store
RTAS_Get_Clock ds.l 1 ; 048, irp+f48 ; token for RTAS clock get
RTAS_Set_Clock ds.l 1 ; 04c, irp+f4c ; token for RTAS clock set
RTAS_Restart ds.l 1 ; 050, irp+f50 ; token for RTAS Restart
RTAS_Shutdown ds.l 1 ; 054, irp+f54 ; token for RTAS Shutdown
RTAS_Restart_At ds.l 1 ; 058, irp+f58 ; token for RTAS system startup at specified time
RTAS_EventScan ds.l 1 ; 05c, irp+f5c ; token for RTAS event scan
RTAS_Check_Exception ds.l 1 ; 060, irp+f60 ; token for RTAS check exception
RTAS_Read_PCI_Config ds.l 1 ; 064, irp+f64 ; token for RTAS read PCI config
RTAS_Write_PCI_Config ds.l 1 ; 068, irp+f68 ; token for RTAS write PCI config
; SIO interrupt source numbers for the MPIC
SIOIntVect ds.w 1 ; 06c, irp+f6c ; SIO (8259 cascade vector) vector number
SIOIntBit ds.w 1 ; 06e, irp+f6e ; SIO (8259 cascade vector) bit number
Signature ds.l 1 ; 070, irp+f70 ; signature for this record ('Hnfo')
; more interrupt source numbers
SpuriousIntVect ds.w 1 ; 074, irp+f74 ; spurious vector number
CPU_ID ds.w 1 ; 076, irp+f76 ; the ID of this CPU (universal-tables-related)
SCCAIntVect ds.w 1 ; 078, irp+f78 ; SCC A (non-DMA) vector number
SCCBIntVect ds.w 1 ; 07a, irp+f7a ; SCC B (non-DMA) vector number
SCSIIntVect ds.w 1 ; 07c, irp+f7c ; SCSI vector number
SCSIDMAIntVect ds.w 1 ; 07e, irp+f7e ; SCSI DMA vector number
VIAIntVect ds.w 1 ; 080, irp+f80 ; VIA vector number
VIAIntBit ds.w 1 ; 082, irp+f82 ; VIA bit number
ADBIntVect ds.w 1 ; 084, irp+f84 ; vector number
NMIIntVect ds.w 1 ; 086, irp+f86 ; NMI vector number
NMIIntBit ds.w 1 ; 088, irp+f88 ; NMI bit number
; current (actively changing) interrupt handling variables
ISAPendingInt ds.w 1 ; 08a, irp+f8a ; currently pending ISA/8259 interrupt
CompletedInts ds.b 8 ; 08c, irp+f8c ; completed interrupts
nkHWInfoFlagSlowMESH equ 1 ; set if fast MESH doesn't work on this box
nkHWInfoFlagAsynchMESH equ 2 ; set if Synchronous MESH doesn't work on this box
nkHWInfoFlagNoCopySWTLB equ 4 ; set if the software TLB walk code for 603 should NOT be copied
HardwareInfoFlags ds.l 1 ; 094, irp+f94 ; 32 bits of flags (see enum above)
RTAS_Get_PowerOn_Time ds.l 1 ; 098, irp+f98 ; token for RTAS getting time for system startup
ds.b $24
Size equ *
endr
;_______________________________________________________________________
; Processor State Record
;
; Used to save the state of the processor across sleep.
;_______________________________________________________________________
NKProcessorStatePtr equ $68FFEFC8 ; logical address of ProcessorState record
NKProcessorStateVer equ $68FFEFCC ; version number of ProcessorState record
NKProcessorStateLen equ $68FFEFCE ; length of ProcessorState record
NKProcessorState record 0,increment
saveDBAT0u ds.l 1 ; 000 ; place to store DBAT0U
saveDBAT0l ds.l 1 ; 004 ; place to store DBAT0L
saveDBAT1u ds.l 1 ; 008 ; place to store DBAT1U
saveDBAT1l ds.l 1 ; 00c ; place to store DBAT1L
saveDBAT2u ds.l 1 ; 010 ; place to store DBAT2U
saveDBAT2l ds.l 1 ; 014 ; place to store DBAT2L
saveDBAT3u ds.l 1 ; 018 ; place to store DBAT3U
saveDBAT3l ds.l 1 ; 01c ; place to store DBAT3L
saveIBAT0u ds.l 1 ; 020 ; place to store IBAT0U
saveIBAT0l ds.l 1 ; 024 ; place to store IBAT0L
saveIBAT1u ds.l 1 ; 028 ; place to store IBAT1U
saveIBAT1l ds.l 1 ; 02c ; place to store IBAT1L
saveIBAT2u ds.l 1 ; 030 ; place to store IBAT2U
saveIBAT2l ds.l 1 ; 034 ; place to store IBAT2L
saveIBAT3u ds.l 1 ; 038 ; place to store IBAT3U
saveIBAT3l ds.l 1 ; 03c ; place to store IBAT3L
saveSPRG0 ds.l 1 ; 040 ; place to store SPRG0
saveSPRG1 ds.l 1 ; 044 ; place to store SPRG1
saveSPRG2 ds.l 1 ; 048 ; place to store SPRG2
saveSPRG3 ds.l 1 ; 04c ; place to store SPRG3
saveL2CR ds.l 1 ; 050 ; place to store Arthur's L2CR
saveSRR0 ds.l 1 ; 054 ; place to store SRR0
saveSRR1 ds.l 1 ; 058 ; place to store SRR1
saveTBU ds.l 1 ; 05c ; place to store TBU
saveTBL ds.l 1 ; 060 ; place to store TBL
saveHID0 ds.l 1 ; 064 ; place to store HID0
saveDEC ds.l 1 ; 068 ; place to store DEC
saveMSR ds.l 1 ; 06c ; place to store MSR
saveSDR1 ds.l 1 ; 070 ; place to store SDR1
; saveKernelDataPtr needs to always be right after saveReturnAddr
; because of how the code works. DO NOT CHANGE THIS ORDERING!
saveReturnAddr ds.l 1 ; 074 ; place to store the addr to jump to.
saveKernelDataPtr ds.l 1 ; 078 ; place to store the KernelDataPtr
saveContextPtr ds.l 1 ; 07c ; place to store the ContextPtr
Size equ *
endr

View File

@ -104,7 +104,7 @@ kPreventFileFromBeingClosedMask equ 16
kAllOverrideAttributesMask equ kOverrideNextMapMask + \
kDontCountOrIndexDuplicatesMask + \
kTwoDeepMask + \
kPreventFileFromBeingClosedMask
kPreventFileFromBeingClosedMask + 32 + 64 + 128
kAllButOverrideAttributesMask equ 255 - kAllOverrideAttributesMask
selectMakeOverrideMap equ 4

View File

@ -436,11 +436,13 @@ emExpansionBusGlobals ds.l 1 ; Pointer to Expansion Bus Manager Globals
jSWModemSoundVector ds.l 1 ; Vector to control routine for software modem sound
ds.b 270
; NOTE: When adding new fields here, be sure to update the high-level language header files as well
; (currently {CInternal}ExpandMemPriv.h is the one)
; Be sure to update the Reality sources when you change this file (and the version number)
emCurVersion EQU $0133 ; version
emCurVersion EQU $016b ; version
emRecSize equ * ; size for this version
size equ *

View File

@ -118,13 +118,13 @@ InitVec&TVec proc export ; initialize the vector table vector
Endif
; fill in the unused "holes" with the address of UNIMPLEMENTED
; fill in the unused "holes" with the address of BADTRAP
If (&thisCVect - &lastCVect) > 4 Then
import UNIMPLEMENTED
import BADTRAP
dcb.l (&thisCVect - &lastCVect - 4)/4 ,UNIMPLEMENTED-BASEOFROM+ROMBASE
dcb.l (&thisCVect - &lastCVect - 4)/4 ,BADTRAP-BASEOFROM+ROMBASE
Endif

View File

@ -109,6 +109,7 @@ ContinueComp ds.l 1 ; vector to power message continue procedure <SM5>
deferredPDM ds.l 1 ; pointer to PDM deferred task to post alert <SM5>
prevPollStack ds.l 1 ; keep address of any other poll stack <SM6>
SpareComp3 ds.l 1 ; spare vector #3 <SM5>
ds.b $178-$64 ; new
EgretGlobSize EQU *
ENDR
@ -273,7 +274,8 @@ EnDisPDM equ $21 ; Enable/Disable PowerDown Message <T2>
RdWrIIC equ $22 ; Read or Write IIC (I sqared C) <SM3>[rbm]<3>
WakeUpMode equ $23 ; Enable/Disable WakeUpMode <P1>
TimerTickle equ $24 ; ShutDown Timer Tickle <P1>
MaxPseudoCmd equ TimerTickle ; largest possible pseudo command number <P1>
; more commands apparently added
MaxPseudoCmd equ $2A ; largest possible pseudo command number <P1>
;
;__________________________________________________________________________________________________

View File

@ -285,7 +285,7 @@
Exit 1
End
"{Sources}Tools:Make" -w {MOpts} {Targets} -f "{MakeFile}" > "{MakeOut}" || Exit
Make -w {MOpts} {Targets} -f "{MakeFile}" > "{MakeOut}" || Exit
If {EchoCmds}
Set Echo 1

View File

@ -13,6 +13,12 @@
#
# Change History (most recent first):
#
# 1/29/17 HQX Add conditionals for "Custer" (Mirrored Drive Door G4 ROM v10.2.1)
# resources, change TNTPlus to hasPCI.
# 1/9/17 HQX Add Classic flag
# 12/28/16 HQX Finally realise how this works. Patch to emulate the missing
# "ParseFeatures" command. Added NewWorld and TNTPlus flags.
#
# <SM25> 12/13/93 PN Roll in KAOs and Horror changes to support Malcom and AJ
# machines
# <SM24> 11/10/93 fau Update from SuperMunggio <SMG2-3>.
@ -64,7 +70,28 @@
#
#
Set AvailableFeatures "hasROMGibbly ¶
Set cdg5Features "¶
Vanilla ¶
LatestHack ¶
hasPCI ¶
BlueBox ¶
NewWorld ¶
CusterBacklightParcel ¶
CusterUSBShimKeyboard ¶
cdg5HappyMac ¶
NKDebugShim ¶
NKShowLog ¶
ExtraNKLogging ¶
DebugAlways ¶
SkipTbxiValidation ¶
TbxiPatchG4Version ¶
TbxiDisableAppleKiwi ¶
Wedge ¶
"
Set AvailableFeatures "{cdg5Features} ¶
hasBCScreen ¶
hasROMGibbly ¶
hasManEject ¶
hasCacheTypeCPU ¶
forPDMProto ¶
@ -197,12 +224,25 @@ Set AvailableFeatures "hasROMGibbly
useROMFonts "
If "` ParseFeatures -a "{AvailableFeatures}" -f ": ROM {1}" `" =~ /': ROM '(Å)¨1/
Set Defines "{¨1}"
Else
Exit 1
End
# # ParseFeatures is lost to the ages...
# If "` ParseFeatures -a "{AvailableFeatures}" -f ": ROM {1}" `" =~ /': ROM '(Å)¨1/
# Set Defines "{¨1}"
# Else
# Exit 1
# End
# Set Defines "-d "
# This block of code replaces it...
For Feature in {AvailableFeatures}
Set Defines "{Defines} -d {Feature}=`Evaluate " {1} " =~ /Å {Feature} Å/`"
End
# Ugh!
Set Defines "`Echo {Defines} | StreamEdit -e '¥,° Replace /=1/ "=TRUE" -c °' -e '¥,° Replace /=0/ "=FALSE" -c °'`"
For Override in {2}
If "{Override}" =~ /(Å)¨1=(Å)¨2/
@ -214,9 +254,9 @@ Set AvailableFeatures "hasROMGibbly
End
If {Value} =~ /true/
Set Value TRUE
Set Value 1 #TRUE # to allow overrides to work right!
Else If {Value} =~ /false/
Set Value FALSE
Set Value 0 #FALSE
End
If "{Defines}" =~ /(Å)¨3{Name}=[Â ¶t]+(Å)¨4/

View File

@ -54,30 +54,23 @@ MainCodeLibs =
"{MiscDir}GoNativeROMLib.o" ¶
"{LibDir}SlotMgr.lib" ¶
"{LibDir}SCSI.lib" ¶
"{LibDir}SCSI4pt3.lib" ¶
"{LibDir}HFS.lib" ¶
"{LibDir}PPC.lib" ¶
"{LibDir}ADBMgr.lib" ¶
"{LibDir}TimeMgr.lib" ¶
"{LibDir}Toolbox.lib" ¶
"{LibDir}CommToolboxPatch.Lib" ¶
"{LibDir}MemoryMgr.lib" ¶
"{LibDir}AliasMgr.lib" ¶
"{LibDir}ComponentMgr.lib" ¶
"{LibDir}DataAccessMgr.lib" ¶
"{LibDir}EditionMgr.lib" ¶
"{LibDir}ExpansionBusMgr.lib" ¶
"{LibDir}HelpMgr.lib" ¶
"{LibDir}SoundMgr.lib" ¶
"{LibDir}Gestalt.lib" ¶
"{LibDir}IconUtils.lib" ¶
"{LibDir}NotificationMgr.lib" ¶
"{LibDir}PictUtilities.lib" ¶
"{LibDir}ToolboxEventMgr.lib" ¶
"{LibDir}ControlMgr.lib" ¶
"{LibDir}DisplayMgr.lib" ¶
"{LibDir}WindowMgr.lib" ¶
"{LibDir}MenuMgr.lib" ¶
"{LibDir}ATAMgr.lib" ¶
"{ObjDir}DeviceMgr.a.o" ¶
# ¶
# DispatchHelper and DialogMgr.lib need to be colocated ¶
# ¶
@ -89,15 +82,8 @@ MainCodeLibs =
"{LibDir}ResourceMgr.lib" ¶
"{LibDir}ScriptMgr.lib" ¶
"{LibDir}CQD.lib" ¶
"{LibDir}TextServicesMgr.lib" ¶
"{LibDir}FontMgr.lib" ¶
"{LibDir}RomInterface.Lib" ¶
"{LibDir}RomStandardLib.lib" ¶
"{LibDir}StartTest.lib" ¶
"{LibDir}VideoDriver.lib" ¶
"{ObjDir}WallyWorld.a.o" ¶
"{ObjDir}FPEmulation.a.o" ¶
"{LibDir}Beep.lib" ¶
"{LibDir}Lastly.lib" ¶
# ¶
# Keep DispTable at end ¶
# ¶
@ -118,7 +104,7 @@ MainCodeLibs =
#
# Vectorization
#
"{LibDir}MainCode.Lib" Ä {MainCodeLibs} "{ObjDir}VectorTablePatch.a.o"
"{LibDir}MainCode.Lib" Ä {MainCodeLibs} "{ObjDir}VectorTablePatch.a.o" "{ToolDir}Vectorize"
"{ToolDir}Vectorize" -w -v "{ObjDir}VectorTablePatch.a.o" -log "{TextDir}MainCode.Sym" {StdVOpts} -o "{Targ}" {MainCodeLibs}
"{ObjDir}VectorTablePatch.a.o" Ä "{Sources}Make:VectorTable.a" "{IntAIncludes}VectorTablePatch.a"

View File

@ -162,26 +162,21 @@ IntAIncludes = {Sources}Internal:Asm:
IntCIncludes = {Sources}Internal:C:
IntPInterfaces = {Sources}Internal:Pascal:
IntRIncludes = {Sources}Internal:Rez:
Libraries = {Sources}Libs:Libraries:
CLibraries = {Sources}Libs:CLibraries:
PLibraries = {Sources}Libs:PLibraries:
MAOpts = -d TRUE=1 -d FALSE=0 -d Alignment=8 -d CPU=20 -d ROMRelease=$D4C1 -wb -d SubRelease=3 -blksize 62
MCOpts = -d TRUE=1 -d FALSE=0 -d Alignment=8 -d CPU=20 -d ROMRelease=$D4C1 -b3 -mbg full -mc68020 -blksize 62 -opt full
MAOpts = -d TRUE=1 -d FALSE=0 -d Alignment=8 -d CPU=20 -d ROMRelease=$45F6 -wb -d SubRelease=1 -blksize 62
MCOpts = -d TRUE=1 -d FALSE=0 -d Alignment=8 -d CPU=20 -d ROMRelease=$45F6 -b3 -mbg full -mc68020 -blksize 62 -opt full
MPOpts = -mbg full -mc68020
RomBase = $40800000
RomBase = $FFC00000
Features = hasRISCV0ResMgrPatches ¶
hasDoubleByte ¶
hasAMIC ¶
SupportNativeComponents ¶
Script_Char_Extra ¶
hasPenFraction ¶
hasFullKerning ¶
hasGlyphState ¶
hasNewHeapMgr ¶
hasPDMMaceEnet ¶
hasAppleTalkInROM ¶
hasMixedMode ¶
@ -189,9 +184,7 @@ Features = hasRISCV0ResMgrPatches
hasSCSIDiskModeFeature ¶
hasSysSevenResources ¶
hasDataAccessPACK ¶
hasYMCA ¶
hasCPUIDRegister ¶
hasHMC ¶
has2MegROMOrMore ¶
hasVideoIn ¶
hasAsyncSCSI ¶
@ -208,7 +201,6 @@ Features = hasRISCV0ResMgrPatches
forLocalizability ¶
has040MMU ¶
hasADBKeyLayouts ¶
hasASC ¶
hasAliasMgr ¶
hasApple2Fonts ¶
hasAppleEventMgr ¶
@ -216,49 +208,25 @@ Features = hasRISCV0ResMgrPatches
hasBattery ¶
hasCommToolbox ¶
hasCQD ¶
hasDAFB ¶
hasDJMEMC ¶
hasDataAccessMgr ¶
hasDisplayMgr ¶
hasDisplayMgrWindows ¶
hasEDisk ¶
hasEclipseVIA2 ¶
hasEditionMgr ¶
hasEgret ¶
hasExtendedCharacterSet ¶
hasFMC ¶
hasGDU ¶
hasGlue ¶
hasGrandCentral ¶
hasIdle ¶
hasIopScc ¶
hasIopSwim ¶
hasJaws ¶
hasMDU ¶
hasMMU ¶
hasMSC ¶
hasMac2VIA2 ¶
hasNetBoot ¶
hasNiagra ¶
hasOrwell ¶
hasOss ¶
hasPratt ¶
hasProtectedPRAM ¶
hasSCSI96 ¶
hasSWIM2 ¶
hasSwim3 ¶
hasSlotMgr ¶
hasSonora ¶
hasSplineFonts ¶
hasVDAC ¶
hasVIAClock ¶
hasVISA2 ¶
hasVISADecoder ¶
hasWaimeaVIA2 ¶
isUniversal ¶
hasPwrControls ¶
hasPwrMgrClock ¶
hasRBV ¶
hasSplineFonts ¶
hasVIAClock ¶
hasWaimeaVIA2 ¶
@ -267,6 +235,8 @@ Features = hasRISCV0ResMgrPatches
onHafMac ¶
onMac32 ¶
onNuMac ¶
hasBCScreen ¶
hasMMU ¶
ForROM
@ -340,9 +310,6 @@ FeatureSet
Set CIncludes "{CIncludes}"
Set PInterfaces "{PInterfaces}"
Set RIncludes "{RIncludes}"
Set Libraries "{Libraries}"
Set CLibraries "{CLibraries}"
Set PLibraries "{PLibraries}"
Set StdAOpts "{MAOpts} {FeatureSet} -i {IntAIncludes} {AOpts} -i {ObjDir}"
Set StdCOpts "{MCOpts} {FeatureSet} -i {IntCIncludes} {COpts}"
Set StdCPOpts "{MCPOpts} {FeatureSet} -i {IntCIncludes} {COpts}"
@ -381,10 +348,10 @@ Clean
#include {ToolSrcDir}Tools.make
#include {MakeDir}MainCode.make
#include {DeclDir}DeclData.make
#include {DriverDir}Drivers.make
#include {ResourceDir}Resources.make
#include {MakeDir}MainCode.make
##include {DeclDir}DeclData.make
##include {ResourceDir}Resources.make

File diff suppressed because it is too large Load Diff

Binary file not shown.

View File

@ -182,7 +182,7 @@ Debugging equ 0 ; disable debugging checks
;______________________________________________________________________
;
; Routine: CountADBs
; Routine: CountADBs 2b380
; Arguments: None
; Output: D0.W Number of ADB entries
; Function: This routine counts the number of entries in the ADB
@ -210,7 +210,7 @@ FirstCount
;______________________________________________________________________
;
; Routine: GetIndADB
; Routine: GetIndADB 2b39a
; Arguments: DO.W Index from 1 to the value returned by CountADBs
; A0 Pointer to buffer in which DeviceType, OrigAddr,
; ServiceAddr, DataAddr are returned (10 bytes)
@ -245,7 +245,7 @@ LoadBuf MOVE.B FDBDevTy(A1), (A0)+ ; Return DeviceType
Title 'KbdADB - ADB Manager - GetADBInfo / SetADBInfo / FindFDBInfo'
;______________________________________________________________________
;
; Routine: GetADBInfo
; Routine: GetADBInfo 2b3c6
; Arguments: DO.B ADBAddr
; A0 Pointer to buffer in which DeviceType, OrigAddr,
; ServiceAddr, DataAddr are returned (10 bytes)
@ -261,7 +261,7 @@ GetADBInfoTrap
;______________________________________________________________________
;
; Routine: SetADBInfo
; Routine: SetADBInfo 2b3cc
; Arguments: DO.B ADBAddr
; A0 Pointer to buffer containing ServiceAddr and
; DataAddr (8 bytes)
@ -282,7 +282,7 @@ DoneSet RTS
;______________________________________________________________________
;
; Routine: FindFDBInfo
; Routine: FindFDBInfo 2b3da
; Arguments: DO.B FDBAddr
; Output: D0.L 0 if found, -1 if not
; A1 Real address of FDB record if found.
@ -317,7 +317,7 @@ DoneFind
Title 'KbdADB - ADB Manager - ADBOp'
;_______________________________________________________________________
;
; Routine: ADBOp
; Routine: ADBOp 2b3fc
; Inputs: A0.L - pointer to ADBOpBlock paramater block
; D0.B - ADB command/address byte to send
;
@ -379,7 +379,7 @@ ADBOpTrap ; a0-a1/d1-d2 saved by OsTrap dispatch
Title 'KbdADB - ADB Manager - RunADBRequest'
;_______________________________________________________________________
;
; Routine: RunADBRequest
; Routine: RunADBRequest 2b44c
; Inputs: A3 - pointer to ADBBase
;
; Outputs: D2 - length of transmit buffer data
@ -424,7 +424,7 @@ RunADBRequest
Title 'KbdADB - ADB Manager - ExplicitRequestDone'
;_______________________________________________________________________
;
; Routine: ExplicitRequestDone
; Routine: ExplicitRequestDone 2b47e
; Inputs: D2 - length of receive buffer data
; D3 - command byte / SRQ flag (bit 31)
; A2 - pointer to buffer containing receive data
@ -482,7 +482,7 @@ ExplicitRequestDone
Title 'KbdADB - ADB Manager - ImplicitRequestDone'
;_______________________________________________________________________
;
; Routine: ImplicitRequestDone
; Routine: ImplicitRequestDone 2b4b4
; Inputs: D2 - length of receive buffer data
; D3 - command byte / SRQ flag (bit 31)
; A2 - pointer to buffer containing receive data
@ -524,7 +524,7 @@ ImplicitRequestDone
Title 'KbdADB - ADB Manager - RequestDone'
;_______________________________________________________________________
;
; Routine: RequestDone
; Routine: RequestDone 2b4d4
; Inputs: D2 - length of receive buffer data
; D3 - command byte / SRQ flag (bit 31)
; A0 - pointer to buffer to pass to completion routine
@ -559,37 +559,74 @@ RequestDone move.l a0,-(sp) ; copy buffer address to A0 save area on stack
TestFor SupportsIdle
BEQ.S @notsupported
_IdleUpdate ; this is activity, stay at full speed
MoveA.L (PmgrBase), A1
CmpI.L #sleepConst, PmgrRec.SleepSaveFlag(A1)
BEQ.B @definitelyNot
BTst.B #$2, $129(A1)
BEQ.B @nearEnd
@definitelyNot
Move.L (A7), D3
Move.B D3, D0
LsR.B #$4, D0
Bsr FindFDBInfo
Move.B $1(A1), D0
MoveA.L $4(A7), A1
Move.L (A1), D3
CmpI.B #$2, D0
BNE.B @noTesting
BTst.L #$17, D3
BNE.B @idleDone
Bra.B @nearEnd
@noTesting
MoveA.L (PmgrBase), A1
CmpI.L #sleepConst, PmgrRec.SleepSaveFlag(A1)
BEQ.B @idleDone
CmpI.B #$3, D0
BNE.B @idleDone
@nearEnd
Move.L D0, -(A7)
Move.L #$10001, D0
_PowerDispatch
Move.L (A7)+, D0
@idleDone
@notsupported
movem.l (sp)+,d0/a0/a1/a2 ; setup cmd, buffer, handler, data
; (13).start
TestFor SupportsIdle
beq.s @continue
move.l d0,-(sp) ; save d0 temporarily on the stack <t10> ag
move.l #((UsrActivity<<16)|\ ; set for user activity <K2>
(IdleUpdateDisp<<0)),d0 ; idle update selector <K2>
_PowerDispatch ; call power manager
move.l (sp)+,d0 ; restore d0 <t10> ag
@continue
move.l a1,d1 ; test to see if handler address is valid
beq.s @noHandler ; if not, don't call it
BTST #fDBInit,FDBFlag(A3) ; is ADB initialization in progress?
BNE.S @JustDoIt ; -> yes, calling the handler now is allowed
MOVE.L D0,D2
AND #$F,D2
CMP.B #$C,D2
BNE @justDoIt
; jump thru the ProductInfo table to check if a keyswitch is in the secure position <H4>
MOVEA.L UnivInfoPtr,A1 ; point to the ProductInfo table <H4>
ADDA.L ProductInfo.ADBDebugUtilPtr(A1),A1 ; and get the address of its ADB table <H4>
MOVE.L 4*adbKeySwSecure(A1),D2 ; get the offset to the keyswitch code <H4>
BEQ.S @JustDoIt ; -> no keyswitch check, so just call the handler <H4>
BEQ.S @MaybeDoIt ; -> no keyswitch check, so just call the handler <H4>
MOVEM.L D0/D1/A0/A2,-(SP) ; <H4>
ADDA.L D2,A1 ; calculate the routine's address <H4>
JSR (A1) ; and call it <H4>
MOVEM.L (SP)+,D0/D1/A0/A2 ; <H4>
BEQ.S @noHandler ; -> the keyswitch is secure, so don't call the handler
@MaybeDoIt BTST.B #3,$240A
BEQ.S @JustDoIt
MOVE.L PmgrBase,A1
CMP.L #sleepConst,PmgrRec.SleepSaveFlag(A1)
BEQ.S @noHandler
BTST.B #2,PmgrRec.PmgrFlags2(A1)
BNE.B @noHandler
@JustDoIt MOVEA.L D1,A1 ; get the handler's address <H4>
jsr (a1) ; call the handler
@ -602,7 +639,7 @@ RequestDone move.l a0,-(sp) ; copy buffer address to A0 save area on stack
Title 'KbdADB - ADB Manager - Initialization'
;______________________________________________________________________
;
; ADBReInit - ReInitialize the Front Desk Bus
; ADBReInit 2b5aa - ReInitialize the Front Desk Bus
;
;______________________________________________________________________
@ -638,7 +675,7 @@ iLocalData EQU iDeviceTy
;______________________________________________________________________
;
; ADBProc - this routine lives in the JADBProc vector and is called
; ADBProc 2b5d0 - this routine lives in the JADBProc vector and is called
; by ADBReInit before and after initialization
;
;______________________________________________________________________
@ -695,6 +732,7 @@ ADBProc
;______________________________________________________________________
PostInit ; <SM3> rb
; 2b610
WITH ExpandMemRec,KybdDriverData ; <SM3> rb
_CountADBs ; Get the number of ADB devices
@ -728,14 +766,14 @@ PostInit ; <SM3> rb
ENDWITH ; <SM3> rb
;______________________________________________________________________
;
; InitADBDrvr - this routine bring in all appropriate 'ADBS' resources and
; InitADBDrvr 2b64c - this routine bring in all appropriate 'ADBS' resources and
; execute the initialization routines.
;
;______________________________________________________________________
InitADBDrvr _CountADBs ; get the number of valid ADB entries
Move D0,D3 ; save it in D3
BEQ.S DoneSrv ; If none, nothing to do
BEQ DoneSrv ; If none, nothing to do
MoveQ #1,D4 ; start at first entry
Link A6,#iLocalData ; reserve stack frame
FSrvLoop
@ -759,9 +797,7 @@ FSrvLoop
_DetachResource ; detach it
Move.L D1,A0 ; put handle in A0
Move.L (A0),D0 ; dereference handle
_StripAddress ; make it a 24-bit address
Move.L D0,A0 ; put it in A0
Move.L (A0),A0 ; dereference handle
Move.B iADBAddr(A6),D0 ; put ADB Address in D0
Move.B iDeviceTy(A6),D1 ; put device type in D1
JSR (A0) ; execute the service routine
@ -777,7 +813,7 @@ DoneSrv
;_______________________________________________________________________
;
; InitADB - Initialize state variables
; InitADB 2b69c - Initialize state variables
;
;_______________________________________________________________________
@ -796,6 +832,50 @@ InitADB MOVE.L #FDBDSize,D0 ; get local data area length
LEA FDBTask,A0 ; setup the FDB VBL task
MOVE.L A0,JKybdTask ; lomem vector
BTst.B #$2, ($2408)
BEQ.B @dontHitExpandMem
import IOPR_ADB
Lea.L IOPR_ADB, A0
Move.L A0, ([ExpandMem],$294)
@dontHitExpandMem
Move.L UnivROMFlags, D0
AndI.L #$E, D0
BEQ.B @escape
CmpI.L #$A, D0
BEQ.B @escape
CmpI.L #$C, D0
BEQ.B @second
CmpI.L #$8, D0
BEQ.B @fourth
CmpI.L #$2, D0
BNE.B @third
@first Lea.L ($FFFDB592).L, A0
Lea.L @first(A0.L), A0
Bra.B @done
@second Lea.L ($FFFDB5A2).L, A0
Lea.L @second(A0.L), A0
Bra.B @done
@third Lea.L ($FFFDB5CE).L, A0
Lea.L @third(A0.L), A0
Bra.B @done
@fourth Lea.L ($FFFDB5DE).L, A0
Lea.L @fourth(A0.L), A0
@done MoveA.L (UnivInfoPtr), A1
SubA.L A1, A0
Move.L A0, $48(A1)
@escape
; jump thru the ProductInfo table to call the hardware-dependent initialization code
MOVEA.L UnivInfoPtr,A0 ; point to the ProductInfo table <H4>
@ -838,7 +918,7 @@ ReInit ori.w #HiIntMask,sr ; mask out interrupts
;_______________________________________________________________________
;
; InitDevT - Initialize the Device Table
; InitDevT 2b7a0 - Initialize the Device Table
;
; NOTE: everything after BusReset below is part of an ADB completion
; routine, and thus is run at interrupt level 1. No calls
@ -853,17 +933,19 @@ InitDevT bsr BusReset ; reset all devices on the bus
@PollNext move.b d0,InitAddr(a3) ; save device address
bsr TalkR3 ; issue a Talk R3 command (asynchronously)
move.b InitAddr(a3),d0 ; restore poll address
tst.b (a0)+ ; test reply length, see if device returned data
tst.b (a0) ; test reply length, see if device returned data
beq.s @NoDevice ; no, nothing to install
; there is a response from the device in the address, so update the
; device table according to the device
@whoaGoBack
moveq.l #0,d1 ; zero extend for indexing
move.b DevTOffset(a3),d1 ; get offset to devicetable
move.b 1(a0),FDBDevTy(a3,d1.w) ; copy device handler ID into table
move.b 2(a0),FDBDevTy(a3,d1.w) ; copy device handler ID into table
move.b d0,FDBOAddr(a3,d1.w); save device address
move.b d0,FDBAddr(a3,d1.w) ; save device address
move.b d0,FDBOAddr(a3,d1.w); save device address
cmpi.b #KbdAddr,d0 ; is it a keyboard type device?
bne.s @notKbd ; no, branch
@ -878,10 +960,29 @@ InitDevT bsr BusReset ; reset all devices on the bus
move.w HasDev(a3),d2 ; get value in HasDev
bset.l d0,d2 ; remember which address has device
move.w d2,HasDev(A3) ; save it
Bra @skipNewNoDeviceCode
@NoDevice
BTst.B #$2, ($2408)
BEQ.B @skipNewNoDeviceCode
Tst.L ([$2B6],$29C)
BEQ.B @skipNewNoDeviceCode
MoveM.L D0/A0-A3, -(A7)
MoveA.L ([$2B6],$29C), A1
MoveA.L A0, A2
AndI #$FF, D0
OrI #$200, D0
Jsr (A1)
MoveM.L (A7)+, D0/A0-A3
Tst.B (A0)
BNE.B @whoaGoBack
@skipNewNoDeviceCode
addq.b #1,d0 ; advance device address
cmpi.b #NumFDBAdr,d0 ; has it polled all addresses yet?
bne.s @PollNext ; no, go to poll next device
bne @PollNext ; no, go to poll next device
; ChgAddr - check the device address to identify multiple devices on
; the same address
@ -922,7 +1023,7 @@ ChgNext
; to the old address by issuing a Listen R3.
Move.B InitAddr(A3),D0 ; get address
BSR.s TalkR3 ; issue a Talk R3 command <1.6>
BSR TalkR3 ; issue a Talk R3 command <1.6>
; MovBack - A Talk R3 has just been issued, a timeout in S1 indicates no
; more device in original address, we want to move the device back to
@ -931,21 +1032,40 @@ ChgNext
tst.b (a0) ; did the device return data
beq.S @1 ; no, branch
; no timeout indication,
BSR.S CopyEntry ; copy entry into device table
@whoaGoBack
BSR CopyEntry ; copy entry into device table
Move.B FDBByte1(A3),FDBDevTy(A3,D1.W) ; get new handle ID into table
BRA.S ChgNext ; go to change next device
; there is timeout indication
@1
BTst.B #$2, ($2408)
BEQ.B @skipNewTimeoutCode
Move.B $16F(A3), D0
Tst.L ([$2B6],$29C)
BEQ.B @skipNewTimeoutCode
MoveM.L D0/A1-A2, -(A7)
MoveA.L ([$2B6],$29C), A1
MoveA.L A0, A2
AndI #$FF, D0
OrI #$300, D0
Jsr (A1)
MoveM.L (A7)+, D0/A1-A2
Tst.B (A0)
BNE.B @whoaGoBack
@skipNewTimeoutCode
Move.B InitAddr(A3),D1 ; get address to change back to
Move.B NewAddr(A3),D0 ; get address to talk to
bsr.s ListenR3 ; send a listen R3 command <1.6>
bsr ListenR3 ; send a listen R3 command <1.6>
; CKNewAdr - check the new address by issuing a Talk R3, to see if
; there is still any device left. If yes, add entry into device
; table, but if not, just go to change next device address
Move.B NewAddr(A3),D0 ; get address
BSR.S TalkR3 ; issue a talk R3 <1.6>
BSR TalkR3 ; issue a talk R3 <1.6>
; AddEntry - a Talk R3 command has just been issed to the new address,
; if there is no timeout in S1, one or more device is still in that
@ -964,7 +1084,7 @@ ExitEntry
;_______________________________________________________________________
;
; CopyEntry - copy the device entry from the original address to the
; CopyEntry 2b8ea - copy the device entry from the original address to the
; new address, a Talk R3 had just been issued
;
; Called by: MoveBack and AddEntry
@ -1003,7 +1123,7 @@ CopyEntry
;_______________________________________________________________________
;
; BusReset - issue a Reset command
; BusReset 2b930 - issue a Reset command
;
; On entry, (SP) has completion routine address <1.6>
;
@ -1017,7 +1137,7 @@ BusReset moveq.l #0,d0 ; address zero
;_______________________________________________________________________
;
; Talk R3 - issue a Talk R3 command
; Talk R3 2b938 - issue a Talk R3 command
;
; On entry, D0 has device address
; (SP) has completion routine address <1.6>
@ -1031,7 +1151,7 @@ TalkR3 moveq.l #talkCmd+3,d1 ; talk command, register 3
;_______________________________________________________________________
;
; ListenR3 - issue a listen R3 command
; ListenR3 2b93e - issue a listen R3 command
;
; On entry, D0 has device address to send the command
; D1 has new device address to change to
@ -1058,7 +1178,7 @@ MakeAsyncRequest
;_______________________________________________________________________
;
; GNextAddr - get next address to change
; GNextAddr 2b964 - get next address to change
;
;_______________________________________________________________________
@ -1081,7 +1201,7 @@ GNextAddr MoveQ #0,D0
;_______________________________________________________________________
;
; GEmptyAddr - get empty address space
; GEmptyAddr 2b986 - get empty address space
;
; on return:
; D0 = empty address or
@ -1100,7 +1220,7 @@ GEmptyAddr MoveQ #0,D1
;_______________________________________________________________________
;
; FDBTask - FDB VBL Task
; FDBTask 2b998 - FDB VBL Task
;
;_______________________________________________________________________
@ -1119,7 +1239,7 @@ KbdDRTS RTS
;______________________________________________________________________
;
; DefaultDev - check mouse and keyboard in the device table, if they
; DefaultDev 2b9ac - check mouse and keyboard in the device table, if they
; are not there, set them up as default device anyway.
;
;______________________________________________________________________
@ -1143,7 +1263,7 @@ ChkMouse moveq #1,d0 ; post processing <H6>
;______________________________________________________________________
;
; Routine: flushkbds
; Routine: flushkbds 2b9de
; Arguments: none
; Output: none
; Function: this routine finds all kbd devices, and sends a flush command to them
@ -1167,6 +1287,7 @@ waitForKeys equ (4+4) ; add 100% margin
@type cmp.b #kbdAddr,origADBAddr(a0); is this a keyboard
bne.s @next ; not a keyboard, next device
bsr.s sendFlush ; send a flush command to kbd
bsr.s newAdbFunc
bra.s @next ; next device
@done movea.l #waitForKeys,a0 ; wait for keys
@ -1176,9 +1297,34 @@ waitForKeys equ (4+4) ; add 100% margin
movem.l (sp)+,@saved ; restore registers
rts
;______________________________________________________________________
;
; Routine: sendFlush
; Routine: newAdbFunc 2ba12
; Arguments: a0
; Output: none
; Function:
; Note:
;______________________________________________________________________
newAdbFunc
@saved reg d0/d1/a0
movem.l @saved,-(sp)
move.l 6(a0),a0
addq.l #4,a0
clr.l (a0)+
clr.l (a0)
bsr RSetKmap
movem.l (sp)+,@saved ; restore registers
rts
;______________________________________________________________________
;
; Routine: sendFlush 2ba2a
; Arguments: d0.b adb id
; Output: none
; Function: this routine sends a "flush" command to the adb device at d0.b
@ -1225,7 +1371,7 @@ CompleteFlush
Title 'KbdADB - ADB KeyBoard Driver'
;______________________________________________________________________
;
; Routine: KbdDrvr
; Routine: KbdDrvr 2ba72
; Arguments: D0.B ADB Command
; A0 ADB Buffer address
; A1 ADB Completion Routine Address (= KbdServ)
@ -1288,7 +1434,7 @@ KbdDrvr
;______________________________________________________________________
;
; Routine: KeyIn
; Routine: KeyIn 2ba9e
; Arguments: D0.B Raw Keycode
; D3.L Device Type, Orig Addr, ADB Addr, Unused
; A2 Private data area
@ -1373,7 +1519,7 @@ NextWord
;______________________________________________________________________
;
; Routine: PostIt
; Routine: PostIt 2bb2c
; Arguments: D0.W ASCII Code
; D3.W ADB Address in high byte and raw keycode in low byte
; Output: None
@ -1415,7 +1561,7 @@ PostKeyUp
;______________________________________________________________________
;
; FoundEx
; FoundEx 2bb64
; An exception exists for this particular keystroke. Process it appropriately.
;______________________________________________________________________
FoundEx
@ -1491,7 +1637,7 @@ FoundEx
;______________________________________________________________________
;
; Routine: KbdListen
; Routine: KbdListen 2bbee
; Arguments: D0.B ADB Command
; D1.L DeviceType, OrigAddr, ADBAddr, Unused (byte order)
; A0 ADB Buffer Address
@ -1553,7 +1699,7 @@ KbdListen
;______________________________________________________________________
;
; Routine: KbdBufFree
; Routine: KbdBufFree 2bc36
; Arguments: D0.B ADB Command
; D1.L DeviceType, OrigAddr, ADBAddr, Unused (byte order)
; A0 ADB Buffer Address
@ -1573,7 +1719,7 @@ KbdBufFree
;______________________________________________________________________
;
; KbdInstall - allocate memory for keyboard information and put in ADB record,
; KbdInstall 2bc3c - allocate memory for keyboard information and put in ADB record,
; loading resources as necessary.
;
;______________________________________________________________________
@ -1606,6 +1752,13 @@ FirstInstall
MOVE.L D0, A0
MOVE.L (A0), KCHRPtr(A2) ; Dereference and put away
MOVE.L A1, -(SP)
MOVE.L ExpandMem, A1
TST.L ExpandMemRec.emKeyCache(A1)
BNE.S @no
MOVE.L (A0), ExpandMemRec.emKeyCache(A1)
@no MOVE.L (SP)+, A1
SUBQ.L #4, SP ; Make room for result
MOVE.L #'KMAP', -(SP) ; ResType = KCHR
CLR.W -(SP) ; theID = 0
@ -1718,6 +1871,7 @@ kchrTableNoLink equ kchrTable-return ; kchrTable offset before link <SM10> r
endr
KeyTrans
; 2bcb8
;------------------------------------------------------------------------------
with ktFrame,SMgrRecord
; if SMgr not initialized or no itlk, skip
@ -1909,7 +2063,7 @@ KeyTrans
; Macintosh keyboard mapping hook, which relies on the new KeyTrans trap.
; -----------------------------------------------------------------------------
KeyHook PROC
KeyHook PROC EXPORT
with ExpandMemRec
bra.s SkipHeader ; skip the header.

0
OS/Beep/Beep.make Normal file
View File

View File

@ -129,7 +129,7 @@ Clock PROC EXPORT
IF NOT BlackBirdDebug THEN
;_______________________________________________________________________ <1.3>
;
; Routine: OneSecInt
; Routine: OneSecInt 8180
;
; Arguments: A1 (input) -- Address of VIA1
;
@ -151,7 +151,7 @@ Clock PROC EXPORT
;_______________________________________________________________________
OneSecInt MOVE.B #1<<ifCA2,VIFR(A1) ; clear the interrupt <1.4>
ADDQ.L #1,Time ; count the second
NOP
BCLR #5,AlarmState ; flag GNEFilter to flash if enabled
TST.B SPVolCtl ; bit 7 is alarm enable
@ -210,7 +210,7 @@ OneSecInt MOVEA.l A1, A0 ;
;________________________________________________________________________________________
;
; Routine: PramIO
; Routine: PramIO 81a8
;
; Inputs: A0 - pointer to table of base addresses
; A1 - pointer to ProductInfo record for this machine
@ -239,7 +239,7 @@ PramIO MOVEM.L D0-D2/A0-A2,-(SP) ; <H2>
;________________________________________________________________________________________
;
; Routine: ReadXPRAM, WriteXPRAM
; Routine: ReadXPRAM 81c2, WriteXPRAM 81cc
;
; Inputs: A0 - pointer to caller's buffer
; D0 - [number of bytes to transfer][starting PRAM address]
@ -277,7 +277,7 @@ rwXCommon BTST.B #hwCbClock-8,HWCfgFlags ; do we have a new clock chip (256 PRAM
;________________________________________________________________________________________ <H2>
;
; Routine: ValidatePRAM
; Routine: ValidatePRAM 81f8
;
; Inputs: A6 - return address
; A0 - pointer to table of base addresses
@ -322,14 +322,16 @@ ValidatePRAM
(8<<0),D3 ; starting at PRAM address 8 <H2>
BSR PramIO ; write out the last 4 bytes of original PRAM <H2>
LEA @other,A3
MOVE.L #(1<<31)|\ ; write
(1<<16)|\ ; 1 byte
(16<<0),D3 ; starting at PRAM address 16
BSR PramIO
@CheckXPRAM LEA @XPRAMSig,A3 ; <H2>
MOVE.L 12(SP),D3 ; are the extended PRAM signature bytes valid? <H2>
CMP.L (A3),D3 ; <H2>
BEQ.S @Done ; -> yes, we're done <H2>
MOVE.L #(1<<31)|\ ; write <H2>
(4<<16)|\ ; 4 bytes <H2>
(12<<0),D3 ; starting at PRAM address 12 <H2>
BSR PramIO ; write out the correct extended PRAM signature bytes <H2>
MOVEA.L SP,A3 ; point to our stack buffer <H2>
MOVEQ #(256-32)/4-1,D3 ; and zero each byte <H2>
@ -337,8 +339,11 @@ ValidatePRAM
DBRA D3,@ClearBuf ; <H2>
BIGLEA PRAMInitTbl,A2 ; point to the table of default extended PRAM values <H2>
BIGLEA *+$373c,A3
SUB.L A2,A3
MOVE.L A3,D3
SUB.L #1,D3
LEA $76-32(SP),A3 ; and where they'll go in the buffer <H2>
MOVEQ #$89-$76,D3 ; copy them into the buffer <H2>
@CopyXDefs MOVE.B (A2)+,(A3)+ ; <H2>
DBRA D3,@CopyXDefs ; <H2>
@ -348,11 +353,19 @@ ValidatePRAM
(32<<0),D3 ; starting at PRAM address 32 <H2>
BSR PramIO ; <H2>
LEA @XPRAMSig,A3
MOVE.L #(1<<31)|\ ; write
(4<<16)|\ ; 4 bytes
(12<<0),D3 ; starting at PRAM address 12
BSR PramIO
@Done
LEA 256(SP),SP ; clean up the stack <H2>
MOVEM.L (SP)+,D0-D3/A0-A3 ; restore regs from StartINIT <SM5> <8.6>
RTS ; <H2>
@other DC.W $A800
@XPRAMSig DC.L 'NuMc' ; extended PRAM validity bytes (slot-based machines) <H2>

View File

@ -100,7 +100,7 @@ _FixDiv OPWORD $A84D
CrsrDev PROC
EXPORT InitCrsrDev,CrsrDevDispatch
IMPORT CrsrVBLTask
IMPORT CrsrVBLTask,vDrawCursor,vEraseCursor
WITH CrsrDevGlobals, CrsrDevRec, CrsrDevSegment, CrsrDataRec
WITH ADBDeviceEntry, ADBVars, ExpandMemRec
@ -108,7 +108,7 @@ CrsrDev PROC
_______________________________________________________________________
;
; Routine: CrsrDevDispatch (trap # $AADB)
; Routine: CrsrDevDispatch 82b0 (trap # $AADB)
;
; Inputs: d0.w - selector
; 4(sp) - last parameter
@ -177,7 +177,7 @@ paramBase equ * ; ptr to base of parameters
;====================================================================
;
; Routine: CrsrDevMoveTrap
; Routine: CrsrDevMoveTrap 82ec
;
; Inputs: 8(a6).l - delta Y
; 12(a6).l - delta X
@ -207,7 +207,7 @@ CrsrDevMoveTrap
;====================================================================
;
; Routine: CrsrDevMoveToTrap
; Routine: CrsrDevMoveToTrap 8306
;
; Inputs: 8(a6).l - V
; 12(a6).l - H
@ -248,7 +248,7 @@ CrsrDevMoveToTrap
;====================================================================
;
; Routine: CrsrDevFlushTrap
; Routine: CrsrDevFlushTrap 8334
;
; Inputs: 8(a6).l - pointer to CrsrDevRec for this device
;
@ -282,7 +282,7 @@ CrsrDevFlushTrap
;====================================================================
;
; Routine: CrsrDevButtonsTrap
; Routine: CrsrDevButtonsTrap 8360
;
; Inputs: 8(a6).w - new button states (1 = down, 0 = up)
; 10(a6).l - pointer to CrsrDevRec for this device
@ -312,7 +312,7 @@ CrsrDevButtonsTrap
;====================================================================
;
; Routine: CrsrDevButtonDownTrap
; Routine: CrsrDevButtonDownTrap 8376
;
; Inputs: 8(a6).l - pointer to CrsrDevRec for this device
;
@ -335,7 +335,7 @@ CrsrDevButtonDownTrap
;====================================================================
;
; Routine: CrsrDevButtonUpTrap
; Routine: CrsrDevButtonUpTrap 8388
;
; Inputs: 8(a6).l - pointer to CrsrDevRec for this device
;
@ -358,7 +358,7 @@ CrsrDevButtonUpTrap
;====================================================================
;
; Routine: CrsrDevButtonOpTrap
; Routine: CrsrDevButtonOpTrap 839a
;
; Inputs: 8(a6).l - Operation specific data
; 12(a6).w - Operation code
@ -388,7 +388,7 @@ CrsrDevButtonOpTrap
;====================================================================
;
; Routine: CrsrDevSetButtonsTrap
; Routine: CrsrDevSetButtonsTrap 83ba
;
; Inputs: 8(a6).w - # buttons for this device
; 10(a6).l - pointer to CrsrDevRec for this device
@ -413,7 +413,7 @@ CrsrDevSetButtonsTrap
;====================================================================
;
; Routine: CrsrDevSetAccelTrap
; Routine: CrsrDevSetAccelTrap 83ce
;
; Inputs: 8(a6).l - acceleration (Fixed)
; 12(a6).l - pointer to CrsrDevRec for this device
@ -440,7 +440,7 @@ CrsrDevSetAccelTrap
;====================================================================
;
; Routine: CrsrDevDoubleTimeTrap
; Routine: CrsrDevDoubleTimeTrap 83e4
;
; Inputs: 8(a6).l - duration (ticks)
; 12(a6).l - pointer to CrsrDevRec for this device
@ -468,7 +468,7 @@ CrsrDevDoubleTimeTrap
;====================================================================
;
; Routine: CrsrDevSetUnitsPerInchTrap
; Routine: CrsrDevSetUnitsPerInchTrap 83f8
;
; Inputs: 8(a6).l - resolution (fixed)
; 12(a6).l - pointer to CrsrDevRec for this device
@ -500,7 +500,7 @@ CrsrDevSetUnitsPerInchTrap
;====================================================================
;
; Routine: CrsrDevNextDeviceTrap
; Routine: CrsrDevNextDeviceTrap 8414
;
; Inputs: 8(a6).l - VAR ptr to CrsrDevRec
;
@ -539,7 +539,7 @@ CrsrDevNextDeviceTrap
;====================================================================
;
; Routine: CrsrDevNewDeviceTrap
; Routine: CrsrDevNewDeviceTrap 843c
;
; Inputs: 8(a6).l - VAR pointer to CrsrDevRec
;
@ -566,7 +566,7 @@ CrsrDevNewDeviceTrap
;====================================================================
;
; Routine: CrsrDevDisposeDevTrap
; Routine: CrsrDevDisposeDevTrap 8450
;
; Inputs: 8(a6).l - pointer to CrsrDevRec for this device
;
@ -594,7 +594,7 @@ CrsrDevDisposeDevTrap
;_______________________________________________________________________
;
; Routine: CrsrDevHandleADB
; Routine: CrsrDevHandleADB 8462
;
; Inputs: a0 - pointer to mouse data
; a2 - pointer to CrsrDevRec for this device
@ -741,7 +741,7 @@ CrsrDevHandleADB
;_______________________________________________________________________
;
; Routine: CrsrDevMove
; Routine: CrsrDevMove 854e
;
; Inputs: d0.l - delta X
; d1.l - delta Y
@ -843,7 +843,7 @@ CrsrDevMove
;_______________________________________________________________________
;
; Routine: CrsrDevButtons
; Routine: CrsrDevButtons 85ee
;
; Inputs: d0.b - new button states (1 = down, 0 = up)
; a2 - pointer to CrsrDevRec for this device
@ -934,20 +934,20 @@ doDouble
;---------------------------------------------------------
doClickLock
tst.b buttonData(a2,d3.w) ; is this the 1st time?
tst.b buttonData(a2,d2.w) ; is this the 1st time?
bne.s @secondHit ; no, skip
btst.b d3,buttons(a2) ; are we down?
beq.s @firstUp ; no, skip
bsr.s CrsrDevButtonDown ; yes, generate button down event
bra.s @done
@firstUp st.b buttonData(a2,d3.w) ; first up, mark it
@firstUp st.b buttonData(a2,d2.w) ; first up, mark it
bra.s @done
@secondHit btst.b d3,buttons(a2) ; are we up (2nd time)?
bne.s @done ; no, do nothing...
bsr.s CrsrDevButtonUp ; yes, post up event
clr.b buttonData(a2,d3.w) ; mark that we're really up
clr.b buttonData(a2,d2.w) ; mark that we're really up
@done rts
@ -963,13 +963,13 @@ doAppleScript
;---------------------------------------------------------
doCustom
pea buttonData(a2) ; push our custom routine address
move.l buttonData(a2,d2.w),-(sp) ; push our custom routine address
rts ; and call it.
;_______________________________________________________________________
;
; Routine: CrsrDevButtonDown
; Routine: CrsrDevButtonDown 86a4
;
; Inputs: a2 - pointer to CrsrDevRec for this device
;
@ -1009,7 +1009,7 @@ CrsrDevButtonDown
;_______________________________________________________________________
;
; Routine: CrsrDevButtonUp
; Routine: CrsrDevButtonUp 86e4
;
; Inputs: a2 - pointer to CrsrDevRec for this device
;
@ -1051,7 +1051,7 @@ CrsrDevButtonUp
;_______________________________________________________________________
;
; Routine: CrsrDevSetAccel
; Routine: CrsrDevSetAccel 8720
;
; Inputs: a2 - pointer to CrsrDevRec for device we want to set
; d0 - acceleration to set (0-1, fixed point)
@ -1102,7 +1102,21 @@ CrsrDevSetAccel
; first find the two tables which enclose the desired acceleration
;----------------------------------------------
@foundIt move.l acceleration(a2),d3 ; get new acceleration in d3
@foundIt Move.B $85(A2), D3
BEQ.B @endofthing
Clr -(SP)
Move.L #'accl', -(A7)
Move #$FFFF, (ROMMapInsert)
_CountResources
Move (SP)+, D3
Move.L #'USB*', D4
Bsr FindResource
BEQ.B @endofthing
MoveQ.L #$0, D4
Bsr FindResource
@endofthing
move.l acceleration(a2),d3 ; get new acceleration in d3
move.w (a0)+,d2 ; get # of acceleration tables in resource
move.l a0,a1 ; keep ptr to 'low' accel table in a1
@ -1316,7 +1330,7 @@ CrsrDevSetAccel
;------------------------------------------------
;
; Routine: FindResource
; Routine: FindResource 8906
;
; Inputs: d3 - # of 'accl' resources to search
; d4 - 'accl' resource tag we're looking for
@ -1353,7 +1367,7 @@ FindResource
;------------------------------------------------
;
; Routine: Interpolate
; Routine: Interpolate 892e
;
; Inputs: 18(sp) - x1
; 14(sp) - y1
@ -1437,7 +1451,7 @@ Interpolate
;_______________________________________________________________________
;
; Routine: CrsrDevHandleVBL
; Routine: CrsrDevHandleVBL 8992
;
; Inputs: -
;
@ -1456,6 +1470,9 @@ CrsrDevHandleVBL
movea.l ExpandMem,a3 ; get ptr to expandmem rec
movea.l emCursorGlobals(a3),a3 ; get cursory global ptr
tst.l a3
beq @exit
move.l firstCrsrDev(a3),d0 ; get ptr to 1st CrsrDevRec
beq @exit ; if not even 1 device, just exit
move.l d0,a2 ; ptr in a2
@ -1664,7 +1681,7 @@ CrsrDevHandleVBL
;_______________________________________________________________________ <H15>
;
; Routine: DrawCursor
; Routine: DrawCursor 8b38
;
; Inputs: a3 - ptr to CrsrDevGlobals
;
@ -1691,6 +1708,7 @@ DrawCursor movea.l firstCrsrData(a3),a4 ; get ptr to main CrsrDataRec <H15>
bne.s @exit ; yesÉ exit
lea CrsrPin,a0 ; it's ok to update cursor, get bounding rect
move.l d0,-(sp)
BSR.L CrsrVBLTask ; pin and draw the cursor
move.l Mouse,d0 ; has cursor been pinned?
@ -1730,7 +1748,7 @@ DrawCursor movea.l firstCrsrData(a3),a4 ; get ptr to main CrsrDataRec <H15>
;_______________________________________________________________________
;
; Routine: CrsrDevNewDevice
; Routine: CrsrDevNewDevice 8bb8
;
; Inputs: ...
;
@ -1827,7 +1845,7 @@ CrsrDevNewDevice
;_______________________________________________________________________
;
; Routine: CrsrDevDisposeDev
; Routine: CrsrDevDisposeDev 8c6e
;
; Inputs: a2 - pointer to CrsrDevRec for device we want to remove
;
@ -1850,6 +1868,7 @@ CrsrDevDisposeDev
@loop cmpa.l a1,a2 ; is this the linked list element we want?
beq.s @gotIt ; yes, handle it
move.l a1,d1 ; no, prev := next
beq.s @exit
move.l nextCrsrDev(a1),d0 ; get next->nextCrsrDev
beq.s @exit ; exit if NIL (we never found it)
move.l d0,a1 ; next := next->nextCrsrDev
@ -1859,8 +1878,10 @@ CrsrDevDisposeDev
tst.l d1 ; was it the first one?
beq.s @firstOne ; yes, handle special case
move.l a2,d0
move.l d1,a2
move.l a1,nextCrsrDev(a2) ; else, delete our element from middle of list
move.l d0,a2
bra.s @dispose
@firstOne move.l a1,firstCrsrDev(a0)
@ -1879,7 +1900,7 @@ CrsrDevDisposeDev
;_______________________________________________________________________
;
; Routine: CrsrDevReInit
; Routine: CrsrDevReInit 8cae
;
; Inputs: d0 - 0 = pre-init, 1=post-init
;
@ -1912,6 +1933,7 @@ CrsrDevReInit ; <H14>
movem.l d0-d3/a0-a3,-(sp)
link a6,#adbPBSize ; Make a stack frame for our param block
tst d0
bne.s @PostInit ; Skip if post-processing
;---------------------
@ -2106,7 +2128,7 @@ CrsrDevReInit ; <H14>
;_______________________________________________________________________
;
; Routine: syncADBTalk
; Routine: syncADBTalk 8e7c
;
; Inputs: d0 - address/command byte
; a0 - ptr to receive buffer
@ -2120,7 +2142,9 @@ CrsrDevReInit ; <H14>
;_______________________________________________________________________
syncADBTalk
@restart
move.l a0,-(sp) ; save ptr to our buffer
move.l d0,-(sp)
clr.w -(sp) ; our 'sync' flag
move.l sp,a1 ; keep pointer to globals for later
@ -2129,18 +2153,23 @@ syncADBTalk
move.l a0,-(sp) ; push pointer to our reply buffer
move.l sp,a0
_ADBOp
bmi.s @weird
@spin tst.b (a1) ; have we completed?
beq.s @spin ; no, keep waiting
lea 14(sp),sp ; dump locals
lea 18(sp),sp ; dump locals
move.l (sp)+,a0 ; restore a0
rts
@weird lea.l $e(sp),sp
move.l (sp)+,d0
move.l (sp)+,a0
bra.s @restart
;_______________________________________________________________________
;
; Routine: syncADBListen
; Routine: syncADBListen 8ea8
;
; Inputs: d0 - address/command byte
; a0 - ptr to transmit buffer
@ -2154,6 +2183,8 @@ syncADBTalk
;_______________________________________________________________________
syncADBListen
@restart
movem.l d0/a0,-(sp)
clr.w -(sp) ; our 'sync' flag
move.l sp,a1 ; keep pointer to data area for later
move.l sp,-(sp) ; push pointer to data area
@ -2161,17 +2192,21 @@ syncADBListen
move.l a0,-(sp) ; push ptr to data to send
move.l sp,a0
_ADBOp
bmi.s @weird
@spin tst.b (a1) ; have we completed?
beq.s @spin ; no, keep waiting
lea 14(sp),sp ; dump locals
lea 22(sp),sp ; dump locals
rts
@weird lea.l $e(sp),sp
movem.l (sp)+,d0/a0
bra.s @restart
;_______________________________________________________________________
;
; Routine: syncComp
; Routine: syncComp 8ed2
;
; Inputs: d0 - ADB command byte
; a0 - ptr to data (pascal string)
@ -2192,7 +2227,7 @@ syncComp st.b (a2) ; set our complete flag
;_______________________________________________________________________
;
; Routine: InitCrsrDev
; Routine: InitCrsrDev 8ed6
;
; Inputs: -
;
@ -2246,7 +2281,7 @@ InitCrsrDev
;______________________________________________________________________________ <H15>
;
; Routine: SetCrsrDelay
; Routine: SetCrsrDelay 8f22
;
; Inputs: a1 contains the ptr to the cursor gDevice being setup
;
@ -2278,7 +2313,7 @@ SetCrsrDelay
;______________________________________________________________________________ <H15>
;
; Routine: SetCrsrDelCore
; Routine: SetCrsrDelCore 8f3c
;
; Inputs: a1 contains the ptr to the cursor gDevice being setup
;
@ -2296,6 +2331,22 @@ SetCrsrDelCore
rts ; just a hook for now
NewCrsrFunction
; 8f3e
Move.L (DeviceList), D0
@loop BEQ.B @done
MoveA.L D0, A0
CmpA.L D1, A0
BNE.B @moredone
MoveA.L (A0), A0
Move.L $1E(A0), D0
Bra.B @loop
@done SubA.L A0, A0
@moredone Move.L A0, D1
Rts
;_____________________________________________________________________________________________ <H15>
; VDrawCursor - default DrawCursor routine
;
@ -2304,23 +2355,10 @@ SetCrsrDelCore
; the routine InitCrsrVects.
;
EXPORT VDrawCursor
IMPORT BLITCURSOR ;from ccrsrcore.a
VDrawCursor
MOVE.B #1,CRSRBUSY ;MARK CHANGE IN PROGRESS
TST CRSRSTATE
BMI.S DoneSho ;QUIT IF STILL HIDDEN
CLR CRSRSTATE ;DON'T LET CRSRSTATE GET > 0
TST.B CRSRVIS ;IS CURSOR ALREADY VISIBLE?
BNE.S DoneSho ;YES, DON'T TRY TO REDRAW
TST.B CrsrObscure ;Skip if obscured
BNE.S DoneSho
VDrawCursor PROC EXPORT
BSR.L BLITCURSOR ;Do the real work: put pixels up
DoneSho CLR.B CRSRBUSY ;CHANGE COMPLETE
RTS
IMPORT QD_DRAWCURSOR
BRA.L QD_DRAWCURSOR
;______________________________________________________________________________________________ <H15>
@ -2331,16 +2369,9 @@ DoneSho CLR.B CRSRBUSY ;CHANGE COMPLETE
; the routine InitCrsrVects.
;
EXPORT VEraseCursor
IMPORT UNBLITCURSOR ;from ccrsrcore.a
VEraseCursor
MOVE.B #1,CRSRBUSY ;MARK CHANGE IN PROGRESS
TST.B CRSRVIS ;IS CURSOR VISIBLE?
BEQ.S DoneHid ;NO, DON'T TRY TO REMOVE IT
BSR.L UNBLITCURSOR ;Zap Pixels
VEraseCursor PROC EXPORT
DoneHid CLR.B CRSRBUSY ;CHANGE COMPLETE
RTS
IMPORT QD_ERASECURSOR
BRA.L QD_ERASECURSOR
END

View File

@ -208,7 +208,7 @@ ErrCudaInit equ $0030 ; TEMPORARY definition of error equate defined in STEQ
WITH EgretGlobals,EgretPB,RespHeader
eject ; { With
;________________________________________________________________________________________________
; Routine: CudaDispatch
; Routine: CudaDispatch 8f90
;
; Function: This is the Cuda manager trap routine. It waits for Cuda to be idle, sends
; the first byte of the command packet. If Cuda didn't abort, then it sets up
@ -271,6 +271,48 @@ CudaDispatch
bra @done
@CudaRestart
CmpI #$10C, (A0)
BEQ.B @L4
CmpI #$107, (A0)
BNE.B @endChicanery
Tst.B $64(A2)
BEQ @endChicanery
@L4 CmpI #$100, $2(A0)
BLT.B @L5
Move #$FFCE, $E(A0)
Bra @done
@L5 Lea.L $66(A2), A2
Move $6(A0), D1
BEQ @L9
SubQ #$1, D1
MoveQ.L #$0, D2
Move $2(A0), D2
MoveA.L $8(A0), A1
@L6 CmpI.B #$7, $1(A0)
BEQ.B @L7
Move.B (A1)+, $0(A2,D2.W)
Bra.B @L8
@L7 Move.B $0(A2,D2.W), (A1)+
@L8 AddQ #$1, D2
AndI #$FF, D2
DBF D1, @L6
@L9 MoveA.L ($DE0), A2
MoveA.L ($1D4), A1
CmpI.B #$C, $1(A0)
BEQ.B @endChicanery
Tst.L $10(A0)
BEQ @done
MoveA.L $10(A0), A1
Jsr (A1)
Bra @done
@endChicanery
move.w sr,-(sp) ; save SR
ori.w #hiIntMask,sr ; mask interrupts
@ -285,17 +327,21 @@ CudaDispatch
@abort move.w (sp)+,sr ; we were busy, enable interrupts
jsr pollByte ; poll shift reg, calling handler if interrupts masked
bra.s @CudaRestart ; and keep waiting for busy to go away...
bra.s @endChicanery ; and keep waiting for busy to go away...
@sendPackType ; interrupts masked here
eieioSTP
bset.b #SRdir,vACR(a1) ; switch to output, Define direction FROM System
nop
eieioSTP
move.b pbCmdType(a0),vSR(a1) ; send command packet to shift reg
nop
eieioSTP
bset.b #vByteAck,vBufB(a1) ; make sure state is idle before transaction
nop
eieioSTP
bclr.b #TIP,vBufB(a1) ; assert TIP (we're starting command packet)
nop
eieioSTP
;
@ -303,7 +349,7 @@ CudaDispatch
; When the shift register irq comes in call the PollProc
; then process the shift register irq data
;
movem.l d0/d1/a0-a4/a6,-(sp) ; save some registers
movem.l d0-d3/a0-a4/a6,-(sp) ; save some registers
move.l PollStack,-(sp) ; save previous poll stack
lea @zero, a3
move.l sp,PollStack ; Pointer to buffer for polled bytes
@ -323,6 +369,7 @@ CudaDispatch
beq.s @2
move.b (a6),-(sp) ; Push the data on the stack
@2
bsr.l otherDelay
eieioSTP
btst.b #vShift,vIFR(a1) ; now wait for shift reg IRQ
eieioSTP
@ -341,7 +388,7 @@ CudaDispatch
@NoSCCData
move.l (sp)+,PollStack ; restore previous poll stack
movem.l (sp)+,d0/d1/a0-a4/a6 ; restore work registers
movem.l (sp)+,d0-d3/a0-a4/a6 ; restore work registers
eieioSTP
btst.b #TReq,vBufB(a1) ; did CUDA abort?
eieioSTP
@ -353,22 +400,24 @@ CudaDispatch
; of CB1. Delay long enough for the edge to occur before acknowledging the shift
; register interrupt. (R. Montagne 1/11/93)
;________________________________________________________________________________________________
moveq #10,d0 ; delay for 10µS min.
move $d00,d0
divu #$50,d0
@mode7delay
eieioSTP
tst.b vBufB(a1) ; 1.2µS per access
eieioSTP
dbra d0,@mode7delay
eieioSTP
bclr.b #SRdir,vACR(a1) ; yes, switch back to input
nop
eieioSTP
tst.b vSR(a1) ; clear pending shift register interrupt
nop
eieioSTP
ori.b #((1<<TIP)|\ ; abort the current transaction
(1<<vByteAck)),vBufB(a1) ;
nop
eieioSTP
@abortAck
bsr.l otherDelay
eieioSTP
btst.b #ifSR,vIFR(a1) ; now wait for shift reg IRQ to acknowledge abort
eieioSTP
@ -394,7 +443,7 @@ CudaDispatch
rts
;________________________________________________________________________________________________
; Routine: PollByte
; Routine: PollByte 914e
;
; Function: This routine checks to see if level 1 interrupts are masked, exits if not.
; If masked, it polls the flag register for a shift reg interrupt, and
@ -412,6 +461,7 @@ PollByte
move.w sr,d0 ; get 68xxx interrupt mask
andi.w #hiIntMask,d0 ; are we at interrupt level?
beq.s @exit ; no, just exit
bsr.l otherDelay
eieioSTP
btst.b #ifSR,vIFR(a1) ; yes, poll the shift reg
eieioSTP
@ -421,7 +471,7 @@ PollByte
;________________________________________________________________________________________________
; Routine: SendByte
; Routine: SendByte 9168
;
; Function: This routine transmits a byte by writing to the via shift register and
; then changes the state of vByteAck to indicate that the via shift register
@ -438,8 +488,10 @@ PollByte
SendByte
eieioSTP
move.b d0,vSR(a1) ; send the byte to the shift reg
nop
eieioSTP
eori.b #1<<vByteAck,vBufB(a1) ; let Cuda know it's there
nop
eieioSTP
rts
@ -456,7 +508,7 @@ CudaCallShiftRegIRQ
;________________________________________________________________________________________________
; Routine: CudaShiftRegIRQ
; Routine: CudaShiftRegIRQ 9176
;
; Function: This routine is called in response to a VIA shift reg interrupt. It will transfer
; the next byte in the current packet. When the packet is complete, the globals are
@ -492,27 +544,34 @@ CudaCallShiftRegIRQ
CudaShiftRegIRQ
move.w sr,d3
ori.w #hiIntMask,sr ; mask interrupts <LW8><LW5>
movea.l EgretBase,a2 ; get ptr to globals <13>
bset.b #busy,flags(a2) ; make sure we're marked as busy
eieioSTP
btst.b #SRdir,vACR(a1) ; see if VIA direction is output
eieioSTP
beq.s @input ; no, then we're receiving..
btst.b #vShift,vIFR(a1)
bne.s @output
move.w d3,sr ; restore interrupts
rts
;________________________________________________________________________________________________
; When outputing from the VIA to Cuda, the interrupt will occur prior to the rising edge
; of CB1. Delay long enough for the edge to occur before acknowledging the shift
; register interrupt. (R. Montagne 1/11/93)
;________________________________________________________________________________________________
moveq #10,d0 ; delay for 10µS min. <LW2><VIA rbm>
@output
movea.l EgretBase,a2 ; get ptr to globals <13>
bset.b #busy,flags(a2) ; make sure we're marked as busy
btst.b #$4, $1600(A1)
beq.s * + $60 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
move $d00,d0
divu #$50,d0
@mode7delay
eieioSTP
tst.b vBufB(a1) ; 1.2µS per access <LW2><VIA rbm>
eieioSTP
dbra d0,@mode7delay ; <LW2><VIA rbm>
eieioSTP
tst.b vSR(a1) ; clear the shift reg interrupt
nop
eieioSTP
tst.w sendHdrCnt(a2) ; any bytes left in header?
ble.s @ckSendData ; no, see if any send bytes left...
@ -535,6 +594,7 @@ CudaShiftRegIRQ
@CmdFinished
eieioSTP
bclr.b #SRdir,vACR(a1) ; now switch to input
nop
eieioSTP
;________________________________________________________________________________________________
; When changing VIA direction, a clock can be generated to the VIA bit counter. An
@ -548,12 +608,14 @@ CudaShiftRegIRQ
eieioSTP
ori.b #((1<<TIP)| \ ; terminate transaction
(1<<vByteAck)),vBufB(a1) ; and set idle state
nop
eieioSTP
bra @exit ; and exit
@input ;-----------------------------------------------------------------------------
eieioSTP
move.b vSR(a1),d0 ; read the byte from shift reg into D0
nop
eieioSTP
tst.w rcvHdrCnt(a2) ; any bytes left in response packet header?
ble.s @ckRcvData ; if not then must be data byte
@ -612,7 +674,7 @@ CudaShiftRegIRQ
cmp.b #((1<<TIP)|\ ; is this an idle acknowledge?
(1<<vByteAck)|\
(1<<TReq)),d0
beq.s @done ; yes, dont handshake.
beq @done ; yes, dont handshake.
cmp.b #((1<<TIP)|\ ; is this an attention byte?
(1<<vByteAck)|\
@ -629,12 +691,14 @@ CudaShiftRegIRQ
@dataIrq
eieioSTP
eori.b #1<<vByteAck,vBufB(a1) ; acknowledge the current byte
nop
eieioSTP
bra @exit ;
@attnIrq
eieioSTP
bclr.b #TIP,vBufB(a1) ; start the response packet transaction
nop
eieioSTP
bra @exit ;
@ -642,6 +706,7 @@ CudaShiftRegIRQ
eieioSTP
ori.b #((1<<TIP)|\ ; no, terminate the response packet transaction
(1<<vByteAck)),vBufB(a1)
nop
eieioSTP
;---------------------------------------------------------------------------
@ -656,11 +721,13 @@ CudaShiftRegIRQ
; <SM6> (rbm)
@waitIdleAck ; <SM6> (rbm)
eieioSTP
bsr.l otherDelay
btst.b #ifSR,vIFR(a1) ; wait for idle state acknowledgement <SM6> (rbm)
eieioSTP
beq.s @waitIdleAck ; <SM6> (rbm)
eieioSTP
tst.b vSR(a1) ; clear the shift reg interrupt <SM6> (rbm)
nop
eieioSTP
;---------------------------------------------------------------------------
@ -806,7 +873,7 @@ CudaShiftRegIRQ
Eject
;________________________________________________________________________________________________
; Routine: SetTransferParams
; Routine: SetTransferParams 93e0
;
; Function: This routine sets up transmit/receive ptrs (globals) for the packet pointed to by A0,
; for use by the Shift Reg interrupt handler.
@ -850,7 +917,9 @@ SetTransferParams
clr.l sendDataPtr(a2) ; no extended data ptr <12>
bra @rcvParams
@notDFAC cmp.b #RdWrIIC,pbCmd(a0) ; check for IIC transaction <SM3>
@notDFAC cmp.b #$25,pbCmd(a0)
beq @dontjump
cmp.b #RdWrIIC,pbCmd(a0) ; check for IIC transaction <SM3>
bne.s @notRdWrIIC ; use the table if not RdWrIIC <SM3>
*
* Here is how the transfer globals are set up for IIC transactionsÉ
@ -885,21 +954,30 @@ SetTransferParams
* RespData ¥ RespData ¥
* curPB CudaPB curPB CudaPB
*
@dontjump
move.w pbByteCnt(a0),d1 ; RdWrIIC uses byte count for send portion <SM3>
addq.w #1,d1 ; include the packet byte already sent <SM3>
move.w d1,sendHdrCnt(a2) ; set up header byte count <SM3>
move.w #4,rcvHdrCnt(a2) ; 4 byte header default <SM3>
clr.w rcvHdrIndex(a2) ; reset index into header buffer <SM3>
move.l pbBufPtr(a0),a1 ; get address of data buffer <SM3>
btst.b #0,pbParam(a0) ; is this a read or write IIC operation? <SM3>
bne.s @doIICread ; <SM3>
cmp.b #RdWrIIC,pbCmd(a0)
beq.s @doIICwrite
btst.b #0,4(a0)
bne.s @doIICread
@doIICwrite ; <SM3>
btst.b #0,pbParam(a0)
bne.s @doIICread
moveq #0,d1 ; data phase count must be 1 to 256 <SM3>
move.b (a1),d1 ; <SM3>
bne.s @wrCntOK ; <SM3>
move.w #$0100,d1 ; <SM3>
@wrCntOK ; <SM3>
move.w d1,sendDataCnt(a2) ; number of extended data bytes to send <SM3>
@newlbl
adda.l #1,a1 ; <SM3>
move.l a1,sendDataPtr(a2) ; extended data ptr <SM3>
clr.w rcvDataCnt(a2) ; no data to receive on IIC write <SM3>
@ -1001,7 +1079,7 @@ CheckCudaPacket
;________________________________________________________________________________________________
; Routine: CudaTickHandler
; Routine: CudaTickHandler 9566
;
; Function: This is the completion routine for tick response packets.
;
@ -1063,7 +1141,7 @@ CudaTickHandler
ENDWITH ; }
;=========================================================================
; Routine: CudaInit
; Routine: CudaInit 9584
;
; This routine sends a NOP/WarmStart command to Cuda. This routine is
; called early during rom Startup to stop autopoll and 1 sec irq. Also,
@ -1118,6 +1196,7 @@ CudaInit
eieioSTP
ori.b #((1<<TIP)| \ ; terminate transaction <SM3>
(1<<vByteAck)),vBufB(a2) ; and set idle state <SM3> <SM9>
nop
eieioSTP
move.l #hw4msDelay,d4 ; we want to delay 4 millisecs for ADB reset to complete <SM3>
@killtime
@ -1139,10 +1218,12 @@ CudaInit
@noX
eieioSTP
tst.b vSR(a2) ; clear the pending interrupt <SM9>
nop
eieioSTP
move.l #hw10msDelay,d4 ; Timeout values must exceed duration of maximum ADB auto poll. <7>
eieioSTP
bclr.b #vByteAck,vBufB(a2) ; issue a sync state (TIP = negated, ByteAck = asserted) <SM9>
nop
eieioSTP
@waitSync
eieioSTP
@ -1161,6 +1242,7 @@ CudaInit
@haveSync move.l #hw10msDelay,d4 ; number of retries before giving up with Cuda
eieioSTP
bset.b #vByteAck,vBufB(a2) ; terminate the sync cycle <SM9>
nop
eieioSTP
@syncTerm
eieioSTP
@ -1172,6 +1254,7 @@ CudaInit
@haveTerm
eieioSTP
tst.b vSR(a2) ; clear the pending interrupt <SM9>
nop
eieioSTP
move.l #hw10msDelay,d4 ; number of retries before giving up with Cuda
@waitIdle2
@ -1185,15 +1268,17 @@ CudaInit
eieioSTP
ori.b #((1<<TIP)| \ ; terminate transaction
(1<<vByteAck)),vBufB(a2) ; and set idle state <SM9>
nop
eieioSTP
tst.b vSR(a2) ; clear the pending interrupt <SM9>
nop
eieioSTP
@exit
rts6 ; setup the return to caller of CudaInit
eject
************************************************************************************************************
* SendCudaCmd: This register based routine will send up to four bytes of data to
* SendCudaCmd 9630: This register based routine will send up to four bytes of data to
* Cuda. The packet type, command, byte count and data are passed in
* registers. The routine will return with d0.w = $0000 if it sent the
* command successfully. A value of $FFFF signifies that the command did
@ -1236,14 +1321,17 @@ SendCudaCmd
eieioSTP
ori.b #((1<<TIP)| \ ; terminate transaction
(1<<vByteAck)),vBufB(a1) ; and set idle state
nop
eieioSTP
@WaitIdle
bsr.l otherDelay
eieioSTP
btst.b #ifSR,vIFR(a1) ; wait for idle state acknowledgement
eieioSTP
beq.s @WaitIdle ;
eieioSTP
tst.b vSR(a1) ; clear the idle acknowledge interrupt
nop
eieioSTP
@AllOK swap.w d4 ; timeout in low word of d4 Retry count in high word
@ -1276,9 +1364,11 @@ SendCudaCmd
eieioSTP
bclr.b #SRdir,vACR(a1) ; shift in
nop
eieioSTP
ori.b #((1<<TIP)|\ ; terminate command packet transaction
(1<<vByteAck)),vBufB(a1) ;
nop
eieioSTP
;
@ -1287,6 +1377,7 @@ SendCudaCmd
bsr5 readAttn ; get the Attention byte
eieioSTP
bclr.b #TIP,vBufB(a1) ; start the response transaction
nop
eieioSTP
bsr5 readByte ; get the packet type
@ -1302,15 +1393,19 @@ SendCudaCmd
eieioSTP
ori.b #((1<<TIP)|\ ; terminate command packet transaction
(1<<vByteAck)),vBufB(a1) ;
nop
eieioSTP
@WaitIdle1
bsr.l otherDelay
eieioSTP
btst.b #ifSR,vIFR(a1) ; wait for idle state acknowledgement
nop
eieioSTP
beq.s @WaitIdle1 ;
eieioSTP
tst.b vSR(a1) ; clear the idle acknowledge interrupt
nop
eieioSTP
;
; Check for an error packet returned by Cuda
@ -1327,20 +1422,24 @@ SendCudaCmd
@SendPtype
eieioSTP
bset.b #SRdir,vACR(a1) ; shift out
nop
eieioSTP
btst.b #TReq,vBufB(a1) ; check for abort
eieioSTP
beq.w AbortReq ; go away if abort requested
eieioSTP
move.b d0,vSR(a1) ; load byte into shift reg
nop
eieioSTP
bclr.b #TIP,vBufB(a1) ; TIP indicates shift reg is full on 1st byte
nop
eieioSTP
;
; Check Vsr Irq until timeout. If timeout then check the retry count
; and Call Death Chimes if Retry count exausted.
;
@PollDelay btst.b #ifSR,vIFR(a1) ; wait for shift to complete
@PollDelay bsr.l otherDelay
btst.b #ifSR,vIFR(a1) ; wait for shift to complete
eieioSTP
bne.w VsrIrq ; Go service Shift register Irq
dbra.w d4,@PollDelay ; try again if timed out
@ -1353,29 +1452,30 @@ DeadCuda
eieioSTP
ori.b #((1<<TIP)| \ ; terminate transaction
(1<<vByteAck)),vBufB(a1) ; and set idle state
nop
eieioSTP
move.l #ErrCudaInit,d7 ; Cuda failed, zero high byte flags <SM7>
move.l #0001,d6 ; d6.l must be nonzero
bigjmp Error1Handler,a3 ; Play death chimes
bra.s *
VsrIrq
move.b #10,d4 ; mode 7 interrupt occurs at falling edge CB1 <LW2><VIA rbm>
@m7dly ; use d4 since retry count not required anymore <LW2><VIA rbm>
eieioSTP
tst.b vBufB(a1) ; hardware access is 1.2µS <LW2><VIA rbm>
eieioSTP
sub.b #1,d4 ; can only trash low byte <LW2><VIA rbm>
bne.s @m7dly ; wait long enough for CB1 to rise (10µS delay) <LW2><VIA rbm>
move.l d4,-(sp)
move $d00,d4
divu #10,d4
dbra.w d4,*
move.l (sp)+,d4
eieioSTP
tst.b vSR(a1) ; clear the interrupt
nop
eieioSTP
btst.b #TReq,vBufB(a1) ; exit with abort status
nop
eieioSTP
AbortReq rts5
;--------------------------------------------------------------------------
; DumpAbort This routine will read all the data for an abort transaction and
; DumpAbort 9774 This routine will read all the data for an abort transaction and
; discard it. When done it will jump back to SendNopCmd entry point
; to retry our command. This command will eventually complete...
@ -1383,14 +1483,18 @@ AbortReq rts5
RealAbort
eieioSTP
bclr.b #SRdir,vACR(a1) ; shift in <rbm>
nop
eieioSTP
ori.b #((1<<TIP)| \ ; terminate transaction
(1<<vByteAck)),vBufB(a1) ; and set idle state
nop
eieioSTP
WAbortAck btst.b #ifSR,vIFR(a1) ; wait for acknowledgement of abort cycle
WAbortAck bsr.l otherDelay
btst.b #ifSR,vIFR(a1) ; wait for acknowledgement of abort cycle
eieioSTP
beq.s WAbortAck ;
tst.b vSR(a1) ; clear the pending interrupt
nop
eieioSTP
bra.s StartRPkt ; and go start the response transaction
;
@ -1406,27 +1510,33 @@ IrqMissed
bsr5 Delay100us ; Let Cuda see SysSes. ³ 125µsec
eieioSTP
bclr.b #SRdir,vACR(a1) ; shift in
nop
eieioSTP
StartRPkt
eieioSTP
tst.b vSR(a1) ; discard the byte
nop
eieioSTP
bclr.b #TIP,vBufB(a1) ; start the response transaction
nop
eieioSTP
DumpAbort
bsr.l otherDelay
eieioSTP
btst.b #ifSR,vIFR(a1) ; wait for shift to complete
eieioSTP
beq.s DumpAbort
eieioSTP
tst.b vSR(a1) ; discard the byte
nop
eieioSTP
btst.b #TReq,vBufB(a1) ; check for last byte
eieioSTP
bne.s DumpDone ; Clock Tick Packets only 2 bytes
eieioSTP
eori.b #1<<vByteAck,vBufB(a1) ; acknowlege byte
nop
eieioSTP
bra.s DumpAbort ; and loop for next byte
;
@ -1456,14 +1566,17 @@ DumpDone
eieioSTP
ori.b #((1<<TIP)| \ ; terminate transaction
(1<<vByteAck)),vBufB(a1) ; and set idle state
nop
eieioSTP
@WaitIdleAck
bsr.l otherDelay
eieioSTP
btst.b #ifSR,vIFR(a1) ; wait for idle state acknowledge
eieioSTP
beq.s @WaitIdleAck ;
eieioSTP
tst.b vSR(a1) ; discard the byte
nop
eieioSTP
bra.w SendCudaCmd ; go try sending our command again
@ -1474,50 +1587,57 @@ DumpDone
sendByte1
eieioSTP
bset.b #SRdir,vACR(a1) ; shift out
nop
eieioSTP
move.b d0,vSR(a1) ; load byte into shift reg
nop
eieioSTP
eori.b #1<<vByteAck,vBufB(a1) ; indicate byte pending in VIA
nop
eieioSTP
@poll btst.b #ifSR,vIFR(a1) ; wait for shift to complete
@poll bsr.l otherDelay
btst.b #ifSR,vIFR(a1) ; wait for shift to complete
eieioSTP
beq.s @poll
move.b #10,d0 ; mode 7 interrupt occurs at falling edge CB1 <LW2><VIA rbm>
@m7dly
eieioSTP
tst.b vBufB(a1) ; hardware access is 1.2µS <LW2><VIA rbm>
eieioSTP
sub.b #1,d0 ; can only trash low byte <LW2><VIA rbm>
bne.s @m7dly ; wait long enough for CB1 to rise (10µS delay) <LW2><VIA rbm>
move.l d0,-(sp)
move $d00,d0
divu #10,d0
dbra.w d0,*
move.l (sp)+,d0
eieioSTP
tst.b vSR(a1) ; clear the interrupt
nop
eieioSTP
rts5
;--------------------------------------------------------------------------
; Export readByte
readByte
bsr.l otherDelay
eieioSTP
btst.b #ifSR,vIFR(a1) ; wait for shift to complete
eieioSTP
beq.s readByte
eieioSTP
move.b vSR(a1),d0 ; read the byte
nop
eieioSTP
eori.b #1<<vByteAck,vBufB(a1) ; and acknowledge it
nop
eieioSTP
rts5
;--------------------------------------------------------------------------
; Export readAttn
readAttn
bsr.l otherDelay
eieioSTP
btst.b #ifSR,vIFR(a1) ; wait for shift to complete
eieioSTP
beq.s readAttn
eieioSTP
tst.b vSR(a1) ; clear the interrupt
nop
eieioSTP
rts5
@ -1533,6 +1653,14 @@ delay100us
dbra d3,@wait ; delay at least 100 us (very rough)
rts5
;--------------------------------------------------------------------------
otherDelay
move.l d0,-(sp)
move $d00,d0
lsr #6,d0
dbra.w d0,*
move.l (sp)+,d0
rts
ENDPROC ; EndProc for CudaMgr }

View File

@ -59,7 +59,7 @@ DTCORE PROC EXPORT
;_______________________________________________________________________
;
; Routine: InitDTQueue
; Routine: InitDTQueue 98c0
;
; Arguments: none
;
@ -78,7 +78,7 @@ InitDTQueue LEA DTQueue,A1 ; init deferred task queue
;_______________________________________________________________________
;
; Routine: DTINSTALL
; Routine: DTINSTALL 98d4
;
; Arguments: A0 (input) : address of deferred task queue element
; D0 (output): error code - 0 no error
@ -135,9 +135,11 @@ TypeErr MOVEQ.L #VTypErr,D0 ; else flag the error
;
;______________________________________________________________________
; 9906
DisptchTsk MOVE.L jDisptch,-(SP) ; get jump vector
RTS ; and use it
; 990c
vDisptch BTST.B #INVBL,QFLAGS+VBLQUEUE ; doing VBL tasks?
BNE.S @Exit ; if so, keep deferring
BSET.B #InDTQ,DTQFlags ; already in dispatcher?
@ -151,13 +153,21 @@ vDisptch BTST.B #INVBL,QFLAGS+VBLQUEUE ; doing VBL tasks?
MOVEA.L DTParm(A0),A1 ; get optional parameter
ANDI.W #$F8FF,SR ; enable all ints
JSR (A2) ; and go do task
MOVEA.L ExpandMem,A1
MOVEA.L $26a(A1),A2
TST.L (A2)
BNE.S @otherThing
@DspStart ORI.W #HiIntMask,SR ; disable all ints
MOVE.L DTskQHdr,D0 ; get queue head
BNE.S @DspLoop ; loop if tasks exist
BCLR.B #InDTQ,DTQFlags ; clear indicator
@backwards BCLR.B #InDTQ,DTQFlags ; clear indicator
RTS ; and exit
@otherThing ORI #$0700,SR
BRA.S @backwards
END

View File

@ -314,33 +314,6 @@ DspTable PROC EXPORT
endif
endm
If hasNewHeapMgr Then
;------------------------------------------------------------------------------
; <SM46> BT: Second OS table macro for Figment. This is temporary
; until figment is fully approved.
;------------------------------------------------------------------------------
macro
OS2 &num,&name,&cond
if (*-SecondOS)/4 <> &Eval(&num) then
aerror 'Trap Number out of sequence'
endif
if &name = '' then
dc.l 0 ; unused
elseif &cond = '' then
import &name
dc.l &name-BaseOfRom
elseif &Eval(&cond) then
import &name
dc.l &name-BaseOfRom
else
dc.l 0 ; not used in this configuration
endif
endm
;------------------------------------------------------------------------------
; <SM46> BT: End second OS table macro
;------------------------------------------------------------------------------
endif
EXPORT DispTable
IMPORT BaseofRom
@ -353,13 +326,13 @@ DispTable
FirstTool
ToolBox $000 ; toolbox trap $000 (ALWAYS LEAVE AS ZERO) <SM39> rb
ToolBox $001,__SNDDISPOSECHANNEL ; toolbox trap $001
ToolBox $002,__SNDADDMODIFIER ; toolbox trap $002
ToolBox $003,__SNDDOCOMMAND ; toolbox trap $003
ToolBox $004,__SNDDOIMMEDIATE ; toolbox trap $004
ToolBox $005,__SNDPLAY ; toolbox trap $005
ToolBox $006,__SNDCONTROL ; toolbox trap $006
ToolBox $007,__SNDNEWCHANNEL ; toolbox trap $007
ToolBox $001 ;,__SNDDISPOSECHANNEL ; toolbox trap $001
ToolBox $002 ;,__SNDADDMODIFIER ; toolbox trap $002
ToolBox $003 ;,__SNDDOCOMMAND ; toolbox trap $003
ToolBox $004 ;,__SNDDOIMMEDIATE ; toolbox trap $004
ToolBox $005 ;,__SNDPLAY ; toolbox trap $005
ToolBox $006 ;,__SNDCONTROL ; toolbox trap $006
ToolBox $007 ;,__SNDNEWCHANNEL ; toolbox trap $007
ToolBox $008,InitProcMenu ; toolbox trap $008 (new menu mgr) <C175>
ToolBox $009,GetCVariant ; toolbox trap $009 <C496>
ToolBox $00A,GetWVariant ; toolbox trap $00A <C496>
@ -374,8 +347,8 @@ FirstTool
ToolBox $013,TEAutoView ; toolbox trap $013
ToolBox $014,SetFractEnable ; toolbox trap $014 (font mgr) <C560>
; ToolBox $015,SCSIMgr ; toolbox trap $015
ToolBox $015,SCSIDispatchCommon ; toolbox trap $015 <RLM>
ToolBox $016,Pack8 ; toolbox trap $016
ToolBox $015, ;SCSIDispatchCommon ; toolbox trap $015 <RLM>
ToolBox $016, ;Pack8 ; toolbox trap $016
ToolBox $017,CopyMask ; toolbox trap $017
ToolBox $018,FixAtan2 ; toolbox trap $018
ToolBox $019,XMunger ; toolbox trap $019
@ -396,13 +369,13 @@ FirstTool
ToolBox $028,ShowDItem ; toolbox trap $028
ToolBox $029,LayerDispatch ; toolbox trap $029 (LayerDispatch) (v1.1)
ToolBox $02A,MainComponent ; toolbox trap $02A (ComponentDispatch) (v1.1)
ToolBox $02B,Pack9 ; toolbox trap $02B
ToolBox $02B ;,Pack9 ; toolbox trap $02B
ToolBox $02C,Pack10 ; toolbox trap $02C
ToolBox $02D,Pack11 ; toolbox trap $02D
ToolBox $02D ;,Pack11 ; toolbox trap $02D
ToolBox $02E,Pack12 ; toolbox trap $02E
ToolBox $02F,Pack13 ; toolbox trap $02F
ToolBox $030,Pack14Entry ; toolbox trap $030
ToolBox $031,Pack15 ; toolbox trap $031
ToolBox $030 ;,Pack14Entry ; toolbox trap $030
ToolBox $031 ;,Pack15 ; toolbox trap $031
ToolBox $032 ; toolbox trap $032 (unimplemented) (v1.1)
ToolBox $033,ScrnBitMap ; toolbox trap $033
ToolBox $034,SetFScaleDisable ; toolbox trap $034
@ -819,7 +792,7 @@ FirstTool
ToolBox $1C5,RsrcMapEntry ; toolbox trap $1C5
ToolBox $1C6,Secs2Date ; toolbox trap $1C6
ToolBox $1C7,Date2Secs ; toolbox trap $1C7
ToolBox $1C8,__SYSBEEP ; toolbox trap $1C8
ToolBox $1C8 ;,__SYSBEEP ; toolbox trap $1C8
ToolBox $1C9,SystemError ; toolbox trap $1C9
ToolBox $1CA,PutIcon ; toolbox trap $1CA
ToolBox $1CB,TEGetText ; toolbox trap $1CB
@ -958,11 +931,11 @@ FirstTool
ToolBox $250,SeedCFill ; toolbox trap $250 <31Jan89 BAL>
ToolBox $251,KopyMask ; toolbox trap $251 <SM40>
ToolBox $252,HighLevelFSDispatch ; toolbox trap $252 (unknown) <C146>
ToolBox $253,DictionaryDispatch ; toolbox trap $253 (DictionaryDispatch) <SM41> CSS
ToolBox $254,TSMDispatch ; toolbox trap $254 (TMSDispatch) <C146>
ToolBox $253 ;,DictionaryDispatch ; toolbox trap $253 (DictionaryDispatch) <SM41> CSS
ToolBox $254 ;,TSMDispatch ; toolbox trap $254 (TMSDispatch) <C146>
ToolBox $255 ; toolbox trap $255 (unknown) <C146>
ToolBox $256 ; toolbox trap $256 (unknown) <C146>
ToolBox $257,DockingDispatch ; toolbox trap $257 (unknown) <SM38>
ToolBox $257 ;,DockingDispatch ; toolbox trap $257 (unknown) <SM38>
ToolBox $258 ; toolbox trap $258 (unknown) <C146>
ToolBox $259 ; toolbox trap $259 (unknown) <C146>
ToolBox $25A ; toolbox trap $25A (unknown) <C146>
@ -983,13 +956,14 @@ FirstTool
ToolBox $268,DialogMgrDispatch ; toolbox trap $268 <RLM>
ToolBox $269 ; toolbox trap $269 (unknown) <C146> <C413>
ToolBox $26A ; toolbox trap $26A (unknown) <C146> <C413>
ToolBox $26A,__AA6A
ToolBox $26B ; toolbox trap $26B (unknown) <C146> <C413>
ToolBox $26C ; toolbox trap $26C (unknown) <C146> <C413>
ToolBox $26D ; toolbox trap $26D (unknown) <C146> <C413>
ToolBox $26E ; toolbox trap $26E (unknown) <C146> <C413>
ToolBox $26F ; toolbox trap $26F (unknown) <C146> <C413>
DCB.L 16,0 ; toolbox trap $270-$27F (unknown) <C146>
DCB.L 15,0 ; toolbox trap $270-$27E (unknown) <C146>
ToolBox $27F,NKLog
DCB.L 16,0 ; toolbox trap $280-$28F (unknown) <C146>
ToolBox $290,InitPalettes ; toolbox trap $290 <02Jun87 DAF>
ToolBox $291,NewPalette ; toolbox trap $291 <02Jun87 DAF>
@ -1045,7 +1019,7 @@ FirstTool
DCB.L 16,0 ; toolbox trap $2E0-$2EF (unknown) <C146>
ToolBox $2F0 ; toolbox trap $2AF (unknown) <C146>
ToolBox $2F1 ; toolbox trap $2AF (unknown) <C146>
ToolBox $2F1,ATAManager
ToolBox $2F2 ; toolbox trap $2AF (unknown) <C146>
ToolBox $2F3,ExpansionBusDispatch ; toolbox trap $2F3 (Expansion Bus Mgr)
ToolBox $2F4 ; toolbox trap $2AF (unknown) <C146>
@ -1262,7 +1236,7 @@ FirstTool
ToolBox $3C6 ; quickdraw hook $3C6
ToolBox $3C7 ; quickdraw hook $3C7
ToolBox $3C8 ; quickdraw2 hook $3C8
ToolBox $3C9,IconDispatch ; quickdraw _IconDispatch $3C9
ToolBox $3C9 ;,IconDispatch ; quickdraw _IconDispatch $3C9
ToolBox $3CA,DeviceLoop ; quickdraw _DeviceLoop <20> PN
ToolBox $3CB ; quickdraw hook $3CB
ToolBox $3CC ; quickdraw hook $3CC
@ -1270,7 +1244,8 @@ FirstTool
ToolBox $3CE ; quickdraw hook $3CE
ToolBox $3CF ; quickdraw hook $3CF
DCB.L 16,0 ; toolbox trap $3D0-$3DF (unknown) <C146>
DCB.L 11,0 ; toolbox trap $3E0-$3EA (unknown) <C146>
ToolBox $3E0,QDExtensions2
DCB.L 10,0 ; toolbox trap $3E1-$3EA (unknown) <C146>
IF hasDisplayMgr THEN ; Only install if we have we are flagged
ToolBox $3EB,DisplayDispatch ; toolbox trap $3EB (DisplayManager) (IH)
ELSE
@ -1278,7 +1253,7 @@ FirstTool
ENDIF
DCB.L 4,0 ; toolbox trap $3EC-$3EF (unknown) <C146>
ToolBox $3F0 ; toolbox trap $3F0 (unknown) <C146>
ToolBox $3F1 ; toolbox trap $3F1 (unknown) <C146>
ToolBox $3F1,GestaltValueDispatch
ToolBox $3F2 ; toolbox trap $3F2 (unknown) <C146>
ToolBox $3F3 ; toolbox trap $3F3 (unknown) <C146>
ToolBox $3F4 ; toolbox trap $3F4 (unknown) <C146>
@ -1384,14 +1359,14 @@ FirstOS
OS $50,RelStringTrap ; OS trap $50
OS $51,ReadXPRam ; OS trap $51
OS $52,WriteXPRam ; OS trap $52
OS $53,ClkNoMem ; OS trap $53
OS $53 ;,ClkNoMem ; OS trap $53
OS $54,UprStringTrap ; OS trap $54
OS $55,__StripAddress ; OS trap $55 (new memory mgr) <C172>
OS $56,NewLwrString ; OS trap $56 ;in-ROM script manager
OS $57,SetApplBase ; OS trap $57
OS $58,__InsTime ; OS trap $58
OS $59,__RmvTime ; OS trap $59
OS $5A,__PrimeTime ; OS trap $5A
OS $58 ;,__InsTime ; OS trap $58
OS $59 ;,__RmvTime ; OS trap $59
OS $5A ;,__PrimeTime ; OS trap $5A
OS $5B,PowerOff ; OS trap $5B (poweroff trap) <11apr86>/<C68>
OS $5C,MemoryDispatch,hasMMU ; OS trap $5C (MemoryDispatch trap) <v1.8>
OS $5D ; OS trap $5D (MMU trap, set up later) <2.7>
@ -1408,7 +1383,7 @@ FirstOS
OS $68,HNoRSRC ; OS trap $68
OS $69,HGetFlags ; OS trap $69
OS $6A,HSetFlags ; OS trap $6A
OS $6B,TestManager ; OS trap $6B (test trap) <C17/27may86>
OS $6B ;,TestManager ; OS trap $6B (test trap) <C17/27may86>
OS $6C,InitFS ; OS trap $6C
OS $6D,InitEvents ; OS trap $6D
OS $6E,SlotManager,hasSlotMgr ; OS trap $6E <C90>
@ -1434,13 +1409,13 @@ FirstOS
OS $82,DTInstallTrap ; OS trap $82 (deferred task) <C489>
OS $83,SetOSDefault,hasSlotMgr ; OS trap $83 (which os to use) <C508>
OS $84,GetOSDefault,hasSlotMgr ; OS trap $84 (which os to use) <C508>
OS $85,PmgrOp,hasPwrControls|PwrMgrADB|hasPwrMgrClock ; OS trap $85
OS $85 ;,PmgrOp,hasPwrControls|PwrMgrADB|hasPwrMgrClock ; OS trap $85
OS $86,IOPInfoAccess,hasIopScc|hasIopSwim ; OS trap $086 <1.3>
OS $87,IOPMsgRequest,hasIopScc|hasIopSwim ; OS trap $087 <1.3>
OS $88,IOPMoveData,hasIopScc|hasIopSwim ; OS trap $088 <1.3>
OS $89,NewSCSITrap,0 ; os trap $89 (async SCSI Mgr) <v1.7><3.0>
OS $8A,GoToSleep,hasPwrControls|PwrMgrADB|hasPwrMgrClock ; OS trap $8A
OS $8B,COMMTOOLBOXDISPATCHER ; os trap $8B (CommToolBoxTrap) <SM33><PN>
OS $8B ;,COMMTOOLBOXDISPATCHER ; os trap $8B (CommToolBoxTrap) <SM33><PN>
OS $8C ; os trap $8C (unknown) <C489><C508><C908><1.5>
OS $8D,DebugUtil ; os trap $8D <1.5>
OS $8E,ExtBTreeDispatch ; os trap $8E (BTreeDispatch) <2.0>
@ -1448,7 +1423,7 @@ FirstOS
OS $90,SysEnvironsTrap ; OS trap $90 <C982>
OS $91,Translate24To32 ; os trap $91 (unknown) <2.9> BAL
OS $92,EgretDispatch,hasEgret ; os trap $92 <4>
OS $93,__Microseconds ; os trap $93 <9>
OS $93 ;,__Microseconds ; os trap $93 <9>
OS $94 ; os trap $94 (unknown)
OS $95 ; os trap $95 (unknown)
OS $96 ; os trap $96 (unknown)
@ -1459,8 +1434,8 @@ FirstOS
OS $9B ; os trap $9B (unknown)
OS $9C ; os trap $9C (unknown)
OS $9D,MoveHLow ; os trap $9D MoveHLow <SM18> tcn
OS $9E,PowerMgrDispatch,hasPwrControls ; os trap $9E (PowerMgrDispatch Trap) <SM25> <SM35>
OS $9F,PowerDispatch,hasPwrControls ; os trap $9F (PwrControls Traps) <17> rb
OS $9E ;,PowerMgrDispatch,hasPwrControls ; os trap $9E (PowerMgrDispatch Trap) <SM25> <SM35>
OS $9F ;,PowerDispatch,hasPwrControls ; os trap $9F (PwrControls Traps) <17> rb
OS $A0 ; os trap $A0 (unknown)
OS $A1 ; os trap $A1 (unknown)
OS $A2 ; os trap $A2 (unknown)
@ -1493,7 +1468,7 @@ FirstOS
OS $B6,vWaitUntil ; vector $B6 (iocore) <C811>
OS $B7,vSyncWait ; vector $B7 (iocore) <C811>
OS $B8,__SNDAPPDEAD ; vector $B8
OS $B8 ;,__SNDAPPDEAD ; vector $B8
OS $B9,vDisPtch ; vector $B9 (deferred task) <C811><2.2>
OS $BA,vIAZInit ; vector $BA <16jun87 CSL>
OS $BB,vIAZPostInit ; vector $BB <16jun87 CSL>
@ -1530,7 +1505,7 @@ FirstOS
OS $DA,vExtendFile ; vector $DA
OS $DB,vTruncateFile ; vector $DB
OS $DC,vCMSetUp ; vector $DC
OS $DD,vppcDispatcher ; vector $DD (PPCDispatcher)
OS $DD ;,vppcDispatcher ; vector $DD (PPCDispatcher)
OS $DE,vDtrmV1 ; vector $DE
OS $DF,vBlkAlloc ; vector $DF
OS $E0,vBlkDeAlloc ; vector $E0
@ -1570,285 +1545,5 @@ FirstOS
; end of vectors
;------------------------------------------------------------------------------
if hasNewHeapMgr Then
;------------------------------------------------------------------------------
; <SM46> BT: Second OS table for Figment. This is temporary
; until figment is fully approved.
;------------------------------------------------------------------------------
; WARNING -- DO NOT CHANGE THIS TABLE UNLESS YOU CHANGE THE CORRESPONDING OS TABLE! (ABOVE)
;------------------------------------------------------------------------------
SecondOS
OS2 $00,Open ; OS trap $00
OS2 $01,Close ; OS trap $01
OS2 $02,Read ; OS trap $02
OS2 $03,Write ; OS trap $03
OS2 $04,ControlTrap ; OS trap $04
OS2 $05,StatusTrap ; OS trap $05
OS2 $06,KillIOTrap ; OS trap $06
OS2 $07,GetVolInfo ; OS trap $07
OS2 $08,FileCreate ; OS trap $08
OS2 $09,FileDelete ; OS trap $09
OS2 $0A,OpenRFTrap ; OS trap $0A
OS2 $0B,RenameTrap ; OS trap $0B
OS2 $0C,GetFileInfo ; OS trap $0C
OS2 $0D,SetFileInfo ; OS trap $0D
OS2 $0E,UnmountVolTrap ; OS trap $0E
OS2 $0F,MountVol ; OS trap $0F
OS2 $10,FileAlloc ; OS trap $10
OS2 $11,GetEOFTrap ; OS trap $11
OS2 $12,SetEOFTrap ; OS trap $12
OS2 $13,FlushVolTrap ; OS trap $13
OS2 $14,GetVolTrap ; OS trap $14
OS2 $15,SetVolTrap ; OS trap $15
OS2 $16,FInitQueue ; OS trap $16
OS2 $17,EjectTrap ; OS trap $17
OS2 $18,GetFPosTrap ; OS trap $18
OS2 $19,Fig_InitZoneTrap ; OS trap $19
OS2 $1A,Fig_GetZone ; OS trap $1A
OS2 $1B,Fig_SetZone ; OS trap $1B
OS2 $1C,Fig_FreeMem ; OS trap $1C
OS2 $1D,Fig_MaxMemTrap ; OS trap $1D
OS2 $1E,Fig_NewPtrTrap ; OS trap $1E
OS2 $1F,Fig_DisposePtr ; OS trap $1F
OS2 $20,Fig_SetPtrSizeTrap ; OS trap $20
OS2 $21,Fig_GetPtrSizeTrap ; OS trap $21
OS2 $22,Fig_NwHandle ; OS trap $22
OS2 $23,Fig_DsposeHandle ; OS trap $23
OS2 $24,Fig_SetHandleSizeTrap ; OS trap $24
OS2 $25,Fig___GetHandleSize ; OS trap $25
OS2 $26,Fig_HandleZoneTrap ; OS trap $26
OS2 $27,Fig_ReallocHandleTrap ; OS trap $27
OS2 $28,Fig_RecoverHandleTrap ; OS trap $28
OS2 $29,Fig_HLock ; OS trap $29
OS2 $2A,Fig_HUnlock ; OS trap $2A
OS2 $2B,Fig_EmptyHandle ; OS trap $2B
OS2 $2C,Fig_InitApplZone ; OS trap $2C
OS2 $2D,Fig_SetApplLimit ; OS trap $2D
OS2 $2E,__BlockMove ; OS trap $2E
OS2 $2F,PostEventTrap ; OS trap $2F
OS2 $30,OSEventAvailTrap ; OS trap $30 <PN> <SM28> rb
OS2 $31,GetOSEventTrap ; OS trap $31
OS2 $32,FlushEvents ; OS trap $32
OS2 $33,VInstall ; OS trap $33
OS2 $34,VRemove ; OS trap $34
OS2 $35,OffLine ; OS trap $35
OS2 $36,Fig_MoreMasters ; OS trap $36
OS2 $37,ReadParam ; OS trap $37
OS2 $38,WriteParamTrap ; OS trap $38
OS2 $39,ReadDateTimeTrap ; OS trap $39
OS2 $3A,SetDateTimeTrap ; OS trap $3A
OS2 $3B,DelayTrap ; OS trap $3B
OS2 $3C,CmpString ; OS trap $3C
OS2 $3D,DrvrInstall ; OS trap $3D
OS2 $3E,DrvrRemove ; OS trap $3E
OS2 $3F,InitUtil ; OS trap $3F
OS2 $40,Fig_ResrvMem ; OS trap $40
OS2 $41,SetFilLock ; OS trap $41 new from extensionHFS
OS2 $42,RstFilLock ; OS trap $42 new from extensionHFS
OS2 $43,SetFilType ; OS trap $43
OS2 $44,SetFPosTrap ; OS trap $44
OS2 $45,FlushFile ; OS trap $45
OS2 $46,GetTrapAddressTrap ; OS trap $46
OS2 $47,SetTrapAddressTrap ; OS trap $47
OS2 $48,Fig_PtrZoneTrap ; OS trap $48
OS2 $49,Fig_HPurge ; OS trap $49
OS2 $4A,Fig_HNoPurge ; OS trap $4A
OS2 $4B,Fig_SetGrowZone ; OS trap $4B
OS2 $4C,Fig_CompactMemTrap ; OS trap $4C
OS2 $4D,Fig_PurgeMem ; OS trap $4D
OS2 $4E,AddDriveTrap ; OS trap $4E
OS2 $4F,InstallRDrivers ; OS trap $4F
OS2 $50,RelStringTrap ; OS trap $50
OS2 $51,ReadXPRam ; OS trap $51
OS2 $52,WriteXPRam ; OS trap $52
OS2 $53,ClkNoMem ; OS trap $53
OS2 $54,UprStringTrap ; OS trap $54
OS2 $55,__StripAddress ; OS trap $55 (new memory mgr) <C172>
OS2 $56,NewLwrString ; OS trap $56 ;in-ROM script manager
OS2 $57,Fig_SetApplBase ; OS trap $57
OS2 $58,__InsTime ; OS trap $58
OS2 $59,__RmvTime ; OS trap $59
OS2 $5A,__PrimeTime ; OS trap $5A
OS2 $5B,PowerOff ; OS trap $5B (poweroff trap) <11apr86>/<C68>
OS2 $5C,MemoryDispatch,hasMMU ; OS trap $5C (MemoryDispatch trap) <v1.8>
OS2 $5D ; OS trap $5D (MMU trap, set up later) <2.7>
OS2 $5E,__NMINSTALL ; OS trap $5E (v1.1) <SM21> tcn
OS2 $5F,__NMREMOVE ; OS trap $5F (v1.1) <SM21> tcn
OS2 $60,TFSDispatch ; OS trap $60
OS2 $61,Fig_MaxBlockTrap ; OS trap $61
OS2 $62,Fig_PurgeSpaceTrap ; OS trap $62
OS2 $63,Fig_MaxApplZone ; OS trap $63
OS2 $64,Fig_MoveHHi ; OS trap $64
OS2 $65,Fig_StackSpaceTrap ; OS trap $65
OS2 $66,Fig_NewEmptyHandleTrap ; OS trap $66
OS2 $67,Fig_HRSRC ; OS trap $67
OS2 $68,Fig_HNoRSRC ; OS trap $68
OS2 $69,Fig_HGetFlags ; OS trap $69
OS2 $6A,Fig_HSetFlags ; OS trap $6A
OS2 $6B,TestManager ; OS trap $6B (test trap) <C17/27may86>
OS2 $6C,InitFS ; OS trap $6C
OS2 $6D,InitEvents ; OS trap $6D
OS2 $6E,SlotManager,hasSlotMgr ; OS trap $6E <C90>
OS2 $6F,SlotVInstall,hasSlotMgr ; os trap $6F (Slot Manager) <C147>
OS2 $70,SlotVRemove,hasSlotMgr ; os trap $70 (Slot Manager) <C147>
OS2 $71,AttachVBL,hasSlotMgr ; os trap $71 (VBL Manager) <C147>
OS2 $72,DoVBLTask,hasSlotMgr ; os trap $72 (VBL Manager) <C147>
OS2 $73 ; OS trap $73 (reserved for twitcher??) <C908>
OS2 $74,CacheTrap ; os trap $74 <v2.3>
OS2 $75,SIntInstall,hasSlotMgr ; OS trap $75 <C88>
OS2 $76,SIntRemove,hasSlotMgr ; OS trap $76 <C88>
OS2 $77,CountADBs ; OS trap $77 (fdb manager) <C103>
OS2 $78,GetIndADBTrap ; OS trap $78 (fdb manager) <C103>
OS2 $79,GetADBInfoTrap ; OS trap $79 (fdb manager) <C103>
OS2 $7A,SetADBInfoTrap ; OS trap $7A (fdb manager) <C103>
OS2 $7B,ADBReinit ; OS trap $7B (fdb manager) <C103>
OS2 $7C,ADBOpTrap ; OS trap $7C (fdb manager) <C103>
OS2 $7D,GetDefaultStartup ; OS trap $7D (start manager) <C908>
OS2 $7E,SetDefaultStartup ; OS trap $7E (start manager) <C908>
OS2 $7F,InternalWait ; os trap $7F (start manager) <A345>
OS2 $80,GetVideoDefault,hasSlotMgr ; OS trap $80 (start manager) <A345>
OS2 $81,SetVideoDefault,hasSlotMgr ; OS trap $81 (start manager) <A345>
OS2 $82,DTInstallTrap ; OS trap $82 (deferred task) <C489>
OS2 $83,SetOSDefault,hasSlotMgr ; OS trap $83 (which os to use) <C508>
OS2 $84,GetOSDefault,hasSlotMgr ; OS trap $84 (which os to use) <C508>
OS2 $85,PmgrOp,hasPwrControls|PwrMgrADB|hasPwrMgrClock ; OS trap $85
OS2 $86,IOPInfoAccess,hasIopScc|hasIopSwim ; OS trap $086 <1.3>
OS2 $87,IOPMsgRequest,hasIopScc|hasIopSwim ; OS trap $087 <1.3>
OS2 $88,IOPMoveData,hasIopScc|hasIopSwim ; OS trap $088 <1.3>
OS2 $89,NewSCSITrap,0 ; os trap $89 (async SCSI Mgr) <v1.7><3.0>
OS2 $8A,GoToSleep,hasPwrControls|PwrMgrADB|hasPwrMgrClock ; OS trap $8A
OS2 $8B,COMMTOOLBOXDISPATCHER ; os trap $8B (CommToolBoxTrap) <SM33><PN>
OS2 $8C ; os trap $8C (unknown) <C489><C508><C908><1.5>
OS2 $8D,DebugUtil ; os trap $8D <1.5>
OS2 $8E,ExtBTreeDispatch ; os trap $8E (BTreeDispatch) <2.0>
OS2 $8F,NonVMDeferUserFn ; os trap $8F (DeferUserFn) PN
OS2 $90,SysEnvironsTrap ; OS trap $90 <C982>
OS2 $91,Translate24To32 ; os trap $91 (unknown) <2.9> BAL
OS2 $92,EgretDispatch,hasEgret ; os trap $92 <4>
OS2 $93,__Microseconds ; os trap $93 <9>
OS2 $94 ; os trap $94 (unknown)
OS2 $95 ; os trap $95 (unknown)
OS2 $96 ; os trap $96 (unknown)
OS2 $97 ; os trap $97 (unknown)
OS2 $98,HwPriv,Cpu³020 ; OS trap $98 <1.6>
OS2 $99 ; os trap $99 (unknown)
OS2 $9A,ProcHelper ; os trap $9A ProcHelper <19> rb
OS2 $9B ; os trap $9B (unknown)
OS2 $9C ; os trap $9C (unknown)
OS2 $9D,Fig_MoveHLow ; os trap $9D MoveHLow <SM18> tcn
OS2 $9E,PowerMgrDispatch,hasPwrControls ; os trap $9E (PowerMgrDispatch Trap) <K2>
OS2 $9F,PowerDispatch,hasPwrControls ; os trap $9F (PwrControls Traps) <17> rb
OS2 $A0 ; os trap $A0 (unknown)
OS2 $A1 ; os trap $A1 (unknown)
OS2 $A2 ; os trap $A2 (unknown)
OS2 $A3 ; os trap $A3 (unknown)
OS2 $A4,HeapDispatch ; os trap $A4 (unknown)
OS2 $A5,VisRgnChanged ; os trap $A5 <26MAR90 KON>
OS2 $A6,vRMgrStdEntry ; vector $A6 (StdEntry in rmgr)<3.2>
OS2 $A7,vRMgrStdExit ; vector $A7 (StdExit in rmgr) <3.2>
OS2 $A8 ; os trap $A8 (unknown)
OS2 $A9 ; os trap $A9 (unknown)
OS2 $AA ; os trap $AA (unknown)
OS2 $AB ; os trap $AB (unknown)
OS2 $AC ; os trap $AC (unknown)
OS2 $AD,GestaltTrap ; os trap $AD (Gestalt) <1.9>
OS2 $AE ; os trap $AE (unknown)
;------------------------------------------------------------------------------
; end of OS traps, start of vectors
;------------------------------------------------------------------------------
; WARNING -- DO NOT CHANGE THIS TABLE UNLESS YOU CHANGE THE CORRESPONDING OS TABLE! (ABOVE)
;------------------------------------------------------------------------------
OS2 $AF,vMtCheck ; vector $AF (HFS) <C828>
OS2 $B0,vCheckReMount ; vector $B0 (HFS) <C828>
OS2 $B1,vDtrmV2 ; vector $B1 (HFS) <C828>
OS2 $B2,vFindDrive ; vector $B2 (HFS) <C828>
OS2 $B3,vFClose ; vector $B3 (HFS) <C828>
OS2 $B4,vFlushMDB ; vector $B4 (HFS) <C828>
OS2 $B5,vGoDriver ; vector $B5 (iocore) <C811>
OS2 $B6,vWaitUntil ; vector $B6 (iocore) <C811>
OS2 $B7,vSyncWait ; vector $B7 (iocore) <C811>
OS2 $B8,__SNDAPPDEAD ; vector $B8
OS2 $B9,vDisPtch ; vector $B9 (deferred task) <C811><2.2>
OS2 $BA,vIAZInit ; vector $BA <16jun87 CSL>
OS2 $BB,vIAZPostInit ; vector $BB <16jun87 CSL>
OS2 $BC,vLaunchInit ; vector $BC <16jun87 CSL>
OS2 $BD,vCacheFlush ; vector $BD <C668><1.2>
OS2 $BE,AsyncPatch ; vector $BE <A368>
OS2 $BF,vLg2Phys ; vector $BF
OS2 $C0,vFLushCache ; vector $C0
OS2 $C1,vGetBlock ; vector $C1
OS2 $C2,vMarkBlock ; vector $C2
OS2 $C3,vRelBlock ; vector $C3
OS2 $C4,vTrashBlocks ; vector $C4
OS2 $C5,vTrashVBlks ; vector $C5
OS2 $C6,vCacheWrIP ; vector $C6
OS2 $C7,vCacheRdIP ; vector $C7
OS2 $C8,vBasicIO ; vector $C8
OS2 $C9,vRdBlocks ; vector $C9
OS2 $CA,vWrBlocks ; vector $CA
OS2 $CB,vSetUpTags ; vector $CB
OS2 $CC,vBTClose ; vector $CC
OS2 $CD,vBTDelete ; vector $CD
OS2 $CE,vBTFlush ; vector $CE
OS2 $CF,vBTGetRecord ; vector $CF
OS2 $D0,VBTINSERT ; vector $D0
OS2 $D1,vBTOpen ; vector $D1
OS2 $D2,vBTSEARCH ; vector $D2
OS2 $D3,vBTUpdate ; vector $D3
OS2 $D4,vGetNode ; vector $D4
OS2 $D5,vRelNode ; vector $D5
OS2 $D6,vAllocNode ; vector $D6
OS2 $D7,vFreeNode ; vector $D7
OS2 $D8,vExtBTFile ; vector $D8
OS2 $D9,vDeallocFile ; vector $D9
OS2 $DA,vExtendFile ; vector $DA
OS2 $DB,vTruncateFile ; vector $DB
OS2 $DC,vCMSetUp ; vector $DC
OS2 $DD,vppcDispatcher ; vector $DD (PPCDispatcher)
OS2 $DE,vDtrmV1 ; vector $DE
OS2 $DF,vBlkAlloc ; vector $DF
OS2 $E0,vBlkDeAlloc ; vector $E0
OS2 $E1,vFileOpen ; vector $E1
OS2 $E2,vPermssnChk ; vector $E2
OS2 $E3,vFndFilName ; vector $E3
OS2 $E4,vRfNCall ; vector $E4
OS2 $E5,vAdjEOF ; vector $E5
OS2 $E6,vPixel2Char ; vector $E6 <C146>
OS2 $E7,vChar2Pixel ; vector $E7 <C146>
OS2 $E8 ; vector $E8 (unknown)
OS2 $E9,vFileClose ; vector $E9 (dnf v2.6)
OS2 $EA,vFileRead ; vector $EA (dnf v2.6)
OS2 $EB,vFileWrite ; vector $EB (dnf v2.6)
OS2 $EC,DispatchHelper ; OS Trap $EC DispatchHelper <19> rb
OS2 $ED,VUPDALTMDB ; vector $ED <3.1>
OS2 $EE,vCkExtFS ; vector $EE <A281>
OS2 $EF,vDTrmV3 ; vector $EF <A281>
OS2 $F0,vBMChk ; vector $F0 <A281>
OS2 $F1,vTstMod ; vector $F1 <A281>
OS2 $F2,vLocCRec ; vector $F2 <A281>
OS2 $F3,vTreeSearch ; vector $F3 <A281>
OS2 $F4,vMapFBlock ; vector $F4 <A281>
OS2 $F5,vXFSearch ; vector $F5 <A281>
OS2 $F6,vReadBM ; vector $F6 <A281>
OS2 $F7,vDoEject ; vector $F7
OS2 $F8,vSegStack ; vector $F8
OS2 $F9,vSuperLoad ; vector $F9
OS2 $FA,vCmpFrm ; vector $FA
OS2 $FB,vNewMap ; vector $FB
OS2 $FC,vCheckLoad ; vector $FC
OS2 $FD,XTrimMeasure ; vector $FD
OS2 $FE,XFindWord ; vector $FE
OS2 $FF,XFindLine ; vector $FF
;------------------------------------------------------------------------------
; <SM46> BT: End second OS table macro
;------------------------------------------------------------------------------
endif
END

File diff suppressed because it is too large Load Diff

View File

@ -18,8 +18,8 @@ GestaltObjs = "{ObjDir}GestaltFunction.a.o"
"{ObjDir}GestaltLookup.c.o" ¶
"{ObjDir}GestaltExtensions.a.o"
"{LibDir}Gestalt.lib" Ä {GestaltObjs}
Lib {StdLibOpts} -o "{Targ}" {GestaltObjs}
# "{LibDir}Gestalt.lib" Ä {GestaltObjs}
# Lib {StdLibOpts} -o "{Targ}" {GestaltObjs}
"{ObjDir}GestaltFunction.a.o" Ä "{ObjDir}StandardEqu.d" ¶

View File

@ -45,8 +45,8 @@ HFSObjs = "{LibDir}BTreeMgr.lib"
"{ObjDir}DiskCache.a.o"
"{LibDir}HFS.lib" Ä {HFSObjs}
Lib {StdLibOpts} -o "{Targ}" {HFSObjs}
# "{LibDir}HFS.lib" Ä {HFSObjs}
# Lib {StdLibOpts} -o "{Targ}" {HFSObjs}
"{ObjDir}BTAlloc.a.o" Ä "{ObjDir}StandardEqu.d" ¶

File diff suppressed because it is too large Load Diff

View File

@ -27,8 +27,8 @@ IOPrimitivesObjs = "{ObjDir}PowerMgrPrimitives.a.o"
"{ObjDir}PWM.c.o" ¶
"{ObjDir}SndPrimitives.a.o"
"{LibDir}IOPrimitives.lib" Ä {IOPrimitivesObjs}
Lib {StdLibOpts} {IOPrimitivesObjs} -o "{Targ}"
# "{LibDir}IOPrimitives.lib" Ä {IOPrimitivesObjs}
# Lib {StdLibOpts} {IOPrimitivesObjs} -o "{Targ}"
"{ObjDir}ADBPrimitives.a.o" Ä "{ObjDir}StandardEqu.d" ¶

View File

@ -82,7 +82,7 @@ VMGlobals EQU $0B78 ; VM globals ptr
VMInstalled equ $0101 ; VMInstalled offset inside VM's globals <LW5>
;----------------------------------------------------------------------------------
; GetReal - Translates a logical address into a physical address. The address
; GetReal 7c50 - Translates a logical address into a physical address. The address
; translation is performed in the MMU mode at the time of the call.
;
; input: a0.l = logical address to be translated
@ -111,14 +111,8 @@ GetRealSize equ *
GetRealProc PROC EXPORT
WITH GetRealVars,MemDispGlobals
EXPORT GetPageDescProc
EXPORT GetMMUInfo
EXPORT checkTTRegs
; Note: We dont support "GetPageDesc Address"
cmpi.b #EMMU1,MMUType ; Do we have an Emulated MMU?
bne.s GetRealAddr ; -> No, OSW (old slow way).
; Do Logical to Physical Translation for machines with EMMUs. <SM5> SAM
MOVEM.L A2/D1/D2,-(SP) ; Save some regs
@ -147,72 +141,9 @@ GetRealProc PROC EXPORT
* BRA.S @Done ; -> Exit
RTS
GetRealAddr
move.w #getReal,-(sp) ; indicate we want physical address in a0
bra.s walkTable ; go walk table <SM6>
GetPageDescProc
move.w #getpageDesc,-(sp) ; indicate we want page descriptor ptr in a0
walkTable movem.l GetRealRegs,-(sp) ; save working registers
link a6,#GetRealSize ; allocate some room for our locals
cmpi.b #PMMU851,MMUType ; check to see if we have an MMU
bhs.s @haveAnMMU ; IF we do not have an MMU THEN
move.w #noMMUErr,d0 ; return an error
bra.s @exitGetReal ; >>EXIT routine
@haveAnMMU ; ENDIF
move.l a0,d2 ; get logical address into d2
jsr GetMMUInfo ; fill our globals with MMU info
IF Supports24Bit THEN
move.b MMU32Bit,-(sp) ; save current MMU mode
bne.s @in32BitMode ; IF we're in 24-bit mode THEN
moveq #true32b,d0 ; we want to go to 32 bit addressing
_SwapMMUMode ; switch the MMU mode
and.l Lo3Bytes,d2 ; clean up the 24-bit address
bra.s @doTranslation ; go do the translation
ENDIF
@in32BitMode ; ELSE
jsr checkTTRegs ; check transparent translation regs
bne.s @doTranslation ; IF we matched a TT register THEN
move.l d2,a0 ; put the original address into a0
move.l #0,a2 ; return null for page descriptor address
moveq #noErr,d3 ; return good status
bra.s @cleanupGetReal ; >>EXIT with easy translation
; ENDIF
@doTranslation ; ENDIF
cmp.b #PMMU040,MMUType ; check MMU type
beq.s @trans68040 ; IF we're on a 68030 THEN
jsr translate030 ; do the translation for an 851/030
bra.s @cleanupGetReal ; ELSE
@trans68040 jsr translate040 ; do the translation for a 68040
; ENDIF
;------------
; a2.w = address of page descriptor, if any
; d3.w = result code
; a0.l = physical address if successful
;------------
@cleanupGetReal
IF Supports24Bit THEN ; SM is always in 32 bit mode <SM4>
move.b (sp)+,d0 ; get original MMU mode
bne.s @returnResult ; IF we were originally in 24-bit mode THEN
_SwapMMUMode ; swap back to it
ENDIF
@returnResult ; ENDIF
move.w d3,d0 ; return result in d0
@exitGetReal
unlk a6 ; restore registers
movem.l (sp)+,GetRealRegs ; save working registers
cmp.w #getpageDesc,(sp)+ ; check for page getPageDesc call
bne.s @getRealDone ; IF this is the getPageDesc call THEN
move.l a2,a0 ; return page descriptor pointer
@getRealDone ; ENDIF
tst.w d3
@done rts
;----------------------------------------------------------------------------------
; GetMMUInfo - Fills the global area with MMU-specific table information.
; GetMMUInfo 7c7e - Fills the global area with MMU-specific table information.
;
; input: a6.l = pointer to global area
;
@ -224,364 +155,15 @@ ISOffset equ 12 ; bit offset into 851/030 TC of IS field
pageSizeBit equ 14 ; bit number of page size bit in 68040 TC
GetMMUInfo
cmpi.b #EMMU1,MMUType ; Do we have an Emulated MMU
beq @VMisOn ; -> Yes, just clear the Log2Phys field & Exit
cmp.b #PMMU040,MMUType ; check MMU type
beq.s @get040Info ; IF the MMU is an 851/030 THEN
pmove crp,theCRP(a6) ; get the 64-bit CRP value
pmove tc,theTc(a6) ; get TC value
move.l theTc(a6),d4 ; put TC into d4
move.l #ISOffset,d3 ; get offset into TC of IS field
bfextu d4{d3:4},d0 ; get IS value
move.b d0,initShift(a6) ; save IS value in globals
add.l #4,d3 ; get offset into TC of TIA field
bfextu d4{d3:4},d0 ; get TIA value
move.b d0,levelOne(a6) ; save level one index width in globals
add.l #4,d3 ; get offset into TC of TIB field
bfextu d4{d3:4},d0 ; get TIB value
move.b d0,levelTwo(a6) ; save level one index width in globals
add.l #4,d3 ; get offset into TC of TIC field
bfextu d4{d3:4},d0 ; get TIC value
move.b d0,levelThree(a6) ; save level one index width in globals
add.l #4,d3 ; get offset into TC of TID field
bfextu d4{d3:4},d0 ; get TID value
move.b d0,levelFour(a6) ; save level one index width in globals
bra.s @gotInfo ; go check for log2Phys offset
@get040Info ; ELSE
MACHINE MC68040 ; use 68040 instructions
movec srp,d0 ; get 68040 srp
move.l d0,theSRP(a6) ; save the root ptr
move.l #0,theCRP(a6) ; 68040 only has a 32-bit root pointer <T6>
move.b #7,levelOne(a6) ; 68040 always uses 7 bits for first level
move.b #7,levelTwo(a6) ; 68040 always uses 7 bits for second level
move.b #5,levelThree(a6) ; assume 5 bits for 8k pages in third level
movec tc,d0 ; get 68040 tc
move.w d0,theTC(a6) ; store it in globals
btst #pageSizeBit,d0 ; check which page size we're using
bne.s @not4kPages ; IF we're using 4k pages
move.b #6,levelThree(a6) ; use 6 bits for 4k pages in third level
@not4kPages ; ENDIF
move.b #0,levelFour(a6) ; 68040 never has a fourth level
move.b #0,initShift(a6) ; 68040 never has an initial shift
MACHINE MC68030 ; switch back to 68030 instructions
@gotInfo ; ENDIF
move.l phys2log,myPhys2Log(a6) ; get our phys2log translation offset (Assume no vm) <SM4>
IF not forROM THEN ; Supermario is always 32bit capable <SM4>
cmp.l #-1,ExpandMem ; is gestalt unimplemented? <T3>
beq.s @done ; IF gestalt is implemented THEN <T3>
move.l #gestaltAddressingModeAttr,d0 ; we need to find out 32-bit cleanliness
_Gestalt ; call Gestalt
tst.w d0 ; check for errors
bne.s @VMisOn ; >>EXIT on error
move.l a0,d0 ; get response in d0
btst #gestalt32BitCapable,d0 ; check if phys2Log globals exists
beq.s @VMisOn ; >>EXIT on error
ENDIF
; Some history: Since GetMMUInfo cannot be making lengthy Gestalt calls to determine if VM is on
; we would (previously) test the lomem where VM puts its globals to see it it had been initialized.
; A problem arises when VM has saved its globals ptr in VMGlobals but has not yet whacked the MMU
; tables and someone (VM) calls GetPhysical. An additional flag inside the VMGlobals has been added
; that is set at the very end of VMs initalization. We now check it to determine if the MMU world
; has been changed on us. <SM8> SAM
;
; Determine if VM is installed an running <LW5>
move.l VMGlobals,d0 ; Has VM installed its globals ptr (is it installed?) <SM4>
ble.s @done ; -> No. Leave with Phys2Log offset set.
move.l d0,a0 ; Globals in. Is VM actually running yet?
tst.b VMInstalled(a0) ; VM's Gestalt inited? <LW5>
beq.s @done ; -> Nope, leave the offset alone <LW5>
@VMisOn clr.l myPhys2log(a6) ; VM is on. No phys2log translation
@done rts ; return
;----------------------------------------------------------------------------------
; checkTTRegs - Checks a logical address against the MMU's transparent
; translation registers. This routine assumes that the
; instruction and data TT registers contain identical information
; on the 68040.
;
; input: d2.l = logical address to check
;
; output: ccr.z is set if the address would be transparently translated
;
; destroys: d0-d1/d3-d4
;----------------------------------------------------------------------------------
checkTTRegs
cmp.b #PMMU040,MMUType ; check MMU type
beq.s @get040Regs ; IF the MMU is an 851/030 THEN
subq #4,sp ; create room on stack for tt values
pmove tt0,(sp) ; get tt0 value
move.l (sp),d0 ; store in d0
pmove tt1,(sp) ; get tt1 value
move.l (sp),d1 ; store in d1
addq #4,sp ; restore stack
bra.s @checkTTs ; continue with check
@get040Regs ; ELSE
MACHINE MC68040 ; use 68040 instructions
movec dtt0,d0 ; store tt0 in d0
movec dtt1,d1 ; store tt1 in d1
MACHINE MC68030 ; switch back to 68030
@checkTTs ; ENDIF
btst #TTEnable,d0 ; see if tt0 is on
beq.s @checkTT1 ; IF tt0 is enabled THEN
move.l d2,d3 ; make a copy of the logical address
eor.l d0,d3 ; exclusive OR to leave ones in different bits
rol.l #8,d3 ; move upper 8-bits into low byte
swap d0 ; put logical address mask in low byte
not.b d0 ; invert logical address mask
and.b d0,d3 ; isolate bits we care about
beq.s @checkDone ; >>EXIT if we found a match
@checkTT1 ; ENDIF
btst #TTEnable,d1 ; see if tt1 is on
beq.s @notEnabled ; IF tt1 is enabled THEN
move.l d2,d3 ; make a copy of the logical address
eor.l d1,d3 ; exclusive OR to leave ones in different bits
rol.l #8,d3 ; move upper 8-bits into low byte
swap d1 ; put logical address mask in low byte
not.b d1 ; invert logical address mask
and.b d1,d3 ; isolate bits we care about
bra.s @checkDone ; go exit
; ELSE
@notEnabled andi #$fffb,sr ; clear zero bit
@checkDone ; ENDIF
rts
;----------------------------------------------------------------------------------
; translate030 - Translates a logical address to its corresponding physical
; address on a 68030.
;
; input: a6.l = pointer to globals
; d2.l = logical address to translate
;
; output: a0.l = physical address
; a2.l = ptr to page descriptor for translated address
; d3.w = result code
;
; destroys: d0-d1
;----------------------------------------------------------------------------------
tcSRE EQU 25 ; SRP Enable in TC for 851/030
tcFCL EQU 24 ; Function code Lookup in TC for 851/030
tcEnable030 EQU 31 ; MMU enable bit in TC on 851/030
pageDesc EQU 1 ; page descriptor
valid4 EQU 2 ; valid 4 byte
valid8 EQU 3 ; valid 8 byte
transRegs REG d4-d7
translate030
movem.l transRegs,-(sp) ; save working registers
move.l theSRP(a6),d1 ; get root ptr
move.l theCRP(a6),d7 ; get limit in d7
move.b d7,d3 ; get descriptor type in d3
and.b #3,d3 ; isolate it
move.l theTC(a6),d0 ; get a copy of the TC in d0
btst #tcSRE,d0 ; check for SRP mode
bne @paramErr ; >>EXIT if on
btst #tcFCL,d0 ; check for FCL mode
bne @paramErr ; >>EXIT if on
btst #tcEnable030,d0 ; check if MMU is on
bne.s @startTranslate ; IF MMU is off THEN
move.l d2,a1 ; return logical address unchanged
clr.l d1 ; return null for page descriptor addr
moveq #noErr,d3 ; return good status
bra.s @xlatDone ; >>EXIT with physical address
@startTranslate ; ENDIF
clr.l d4 ; clear offset into logical address
move.b initShift(a6),d4 ; add in initial shift
lea levelOne(a6),a1 ; point a1 at width of first field
clr.l d5 ; get a clear longword
move.b (a1)+,d5 ; get width of next field
;-----------------
; a1.l = pointer to width of next field
; d1.l = current descriptor entry
; d2.l = logical address to translate
; d3.b = descriptor type of current descriptor
; d4.l = offset into logical address of index field
; d5.l = width of index field
; d7.l = limit of current descriptor
;-----------------
@xlatLoop ; LOOP (to walk an MMU table)
cmp.b #pageDesc,d3 ; is this a page descriptor?
beq.s @getPage ; >>BREAK on page descriptor
bfextu d2{d4:d5},d6 ; get index into next table
tst.l d7 ; is there a limit for this table?
beq.s @noLimit ; IF there is a limit THEN
jsr checkLimit ; check the index against the limit
bcs.s @paramErr ; >>EXIT on a limit overflow
@noLimit ; ENDIF
and.l #$fffffff0,d1 ; remove unused bottom byte
cmp.b #valid4,d3 ; check for 4-byte descriptor
bne.s @not4byte ; IF this is a four byte descriptor THEN
add.l myPhys2Log(a6),d1 ; convert current descriptor to logical addr
move.l d1,a2 ; get pointer to next table
lsl.w #2,d6 ; multiple index by four
add.l d6,a2 ; get address of next descriptor
move.l (a2),d1 ; get next descriptor
clr.l d7 ; no limit on this descriptor
move.b d1,d3 ; get a copy of descriptor
bra.s @doNext ; look at next descriptor
@not4byte ; ELSE
cmp.b #valid8,d3 ; check for 8-byte descriptor
bne.s @paramErr ; >>EXITLOOP on invalid descriptors
add.l myPhys2Log(a6),d1 ; convert current descriptor to logical addr
move.l d1,a2 ; get pointer to next table
lsl.w #3,d6 ; multiple index by eight
add.l d6,a2 ; get address of next descriptor
move.l 4(a2),d1 ; get lower word of next descriptor
move.l 0(a2),d7 ; get upper word of next descriptor
move.b d7,d3 ; get a copy of descriptor
@doNext ; ENDIF
add.l d5,d4 ; update d4 to contain number of bytes decoded
move.b (a1)+,d5 ; get width of next field
and.b #3,d3 ; isolate descriptor type
bra.s @xlatLoop ; ENDLOOP
@getPage
move.l #32,d5 ; total number of bits in address
sub.l d4,d5 ; get number of bits not yet decoded
bfextu d1{0:d4},d0 ; get top bits of address of physical page
bfextu d2{d4:d5},d6 ; get offset into physical page
lsl.l d5,d0 ; make a base address out of it
add.l d6,d0 ; get physical address
move.l d0,a0 ; put address into a1
moveq #noErr,d3 ; return no error
@xlatDone
movem.l (sp)+,transRegs ; restore registers
rts
@paramErr
move.w #paramErr,d3
bra.s @xlatDone
;----------------------------------------------------------------------------------
; translate040 - Translates a logical address to its corresponding physical
; address on a 68040.
;
; input: a6.l = pointer to globals
; d2.l = logical address to translate
;
; output: a0.l = physical address
; a2.l = ptr to page descriptor for translated address
; d3.w = result code
;
; destroys: d0-d1
;----------------------------------------------------------------------------------
tcEnable040 EQU 15 ; MMU enable bit in TC on 68040
UDTResident EQU 1 ; UDT resident bit in table descriptor
PDTResident EQU 1 ; PDT field value for a resident page
PDTIndirect EQU 2 ; PDT field value for an indirect page desc
translate040
movem.l transRegs,-(sp) ; save working registers
move.l theSRP(a6),d1 ; get root ptr in a2
move.w theTC(a6),d0 ; get a copy of the TC in d0
btst #tcEnable040,d0 ; check if MMU is on
bne.s @startTranslate ; IF MMU is off THEN
move.l d2,a0 ; return logical address unchanged <SM0>
clr.l d1 ; return null for page descriptor addr
moveq #noErr,d3 ; return good status
bra.s @xlatDone ; >>EXIT with physical address
; ENDIF
@startTranslate
clr.l d4 ; clear offset into logical address
clr.w d3 ; clear level counter
clr.l d5 ; get a clear longword
lea levelOne(a6),a1 ; init pointer to field widths
;-----------------
; a1.l = pointer to field width info
; d1.l = current descriptor entry
; d2.l = logical address to translate
; d3.w = level counter
; d4.l = offset into logical address of index field
;-----------------
@walkLoop ; LOOP (to walk 68040 table)
move.b (a1)+,d5 ; get width of first index field
move.l #(32-2),d0 ; get total bits in descriptor (table pointer/4)
sub.l d5,d0 ; get number of significant bits in table ptr
bfextu d1{0:d0},d1 ; get pointer to next table
lsl.l d5,d1 ; almost make a base address out of it
lsl.l #2,d1 ; make a base address out of it
bfextu d2{d4:d5},d6 ; get index into next table
lsl.w #2,d6 ; multiple index by four
add.l d6,d1 ; get address of next descriptor
add.l myPhys2Log(a6),d1 ; convert pointer to logical addr <T3>
move.l d1,a2 ; put into an address register
move.l (a2),d1 ; get next descriptor
cmp.w #2,d3 ; is this the third level
beq.s @getPage ; >>EXITLOOP if so
btst #UDTResident,d1 ; is it resident?
beq.s @paramErr ; >>EXIT if not
add.l d5,d4 ; update d4 to contain number of bytes decoded
add.w #1,d3 ; bump level count
bra.s @walkLoop ; ENDLOOP
@getPage
move.b d1,d0 ; get a copy of the page descriptor
and.b #3,d0 ; isolate PDT field
cmp.b #PDTResident,d0 ; is this page resident?
beq.s @residentPage ; IF it is not resident THEN
cmp.b #PDTIndirect,d0 ; check for indirect pointer
bne.s @paramErr ; >>EXIT if invalid
and.l #$fffffffc,d1 ; clear PDT field from indirect descriptor
add.l myPhys2Log(a6),d1 ; convert pointer to logical addr <T3>
move.l d1,a2 ; get address of page descriptor
move.l (a2),d1 ; get page descriptor
@residentPage ; ENDIF
add.l d5,d4 ; update d4 to contain number of bytes decoded <t10> cch
move.l #32,d5 ; total number of bits in address
sub.l d4,d5 ; get number of bits not yet decoded
bfextu d1{0:d4},d0 ; get address of physical page
bfextu d2{d4:d5},d6 ; get offset into physical page
lsl.l d5,d0 ; make a base address out of it
add.l d6,d0 ; get physical address
move.l d0,a0 ; put address into a0
moveq #noErr,d3 ; return no error
@xlatDone
movem.l (sp)+,transRegs ; restore registers
rts
@paramErr
move.w #paramErr,d3
bra.s @xlatDone
;----------------------------------------------------------------------------------
; checkLimit - Checks an index against a limit for an 8-byte descriptor.
;
; input: d6.l = index to be checked
; d7.l = upper word of descriptor
;
; output: ccr.c set on invalid index
; ccr.c clear on valid index
;
; destroys: d7
;----------------------------------------------------------------------------------
checkLimit swap d7 ; get limit into low word
btst #15,d7 ; check type of limit
bne.s @lower ; IF it is an upper limit THEN
cmp.w d6,d7 ; compare upper limit
bra.s @limitExit ; ELSE
@lower and.w #$7fff,d7 ; remove l/u bit
cmp.w d7,d6 ; compare lower limit
@limitExit ; ENDIF
rts
ENDWITH
ENDP
;----------------------------------------------------------------------------------
; EDiskProtectPPC - Protects or unprotects the EDisk as specified for PowerPC.
; EDiskProtectPPC 7c90 - Protects or unprotects the EDisk as specified for PowerPC.
;
; input: d0[15:0] = HwPriv selector #8
; d0[16] = set to protect specified area, clear to unprotect it
@ -602,9 +184,6 @@ ProtectRegsPPC REG d2-d4
EDiskProtectPPC PROC EXPORT
WITH GetRealVars
cmp.b #EMMU1,MMUType ; check to see if we have a PowerPC MMU
bne @paramErr ; >>EXIT if not
movem.l ProtectRegsPPC,-(sp) ; save working registers
;ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
@ -641,124 +220,6 @@ EDiskProtectPPC PROC EXPORT
movem.l (sp)+,ProtectRegsPPC ; restore working registers
@return rts
@paramErr move.w #paramErr,d0 ; return paramErr
bra.s @return
ENDWITH
ENDP
;----------------------------------------------------------------------------------
; EDiskProtect - Protects or unprotects the EDisk as specified.
;
; NOTE: This algorithm assumes that the Edisk space is the only space
; mapped by it's 1st level descriptor.
;
; input: d0.w = HwPriv selector #8
; a0.l = 32-bit base address of EDisk
; a1.w = flag to protect or unprotect Edisk (1=protect)
;
; output: a0.l = pointer to the 1st-level table descriptor for the eDisk
; d0.w = result code
;
; destroys: d1/a1
;----------------------------------------------------------------------------------
ProtectRegs REG d2-d4/a2
EDiskProtect PROC EXPORT
IMPORT GetMMUInfo
IMPORT checkTTRegs
WITH GetRealVars
cmp.b #PMMU851,MMUType ; check to see if we have an MMU <SM3>
blo @bailNoMMU ; >>EXIT if not <SM3>
movem.l ProtectRegs,-(sp) ; save working registers
link a6,#GetRealSize ; allocate some room for our locals
;ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
; 68K EDisk Write Protect Code
;ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
@noEMMU move.l a0,d2 ; get base address of Edisk
move.w a1,a2 ; save protect flag in a2
Move SR,D0 ; Get and save the SR. <T7>
Btst #13,D0 ; Are we in Supervisor mode?
Bne.s @noVM ; Yes? Then don't call _EnterSupervisorMode.
_EnterSupervisorMode ; Must be in supervisor mode (SR returned in D0).
@noVM
move.w d0,-(sp) ; save status register value <T7>
IF Supports24Bit THEN
move.b MMU32Bit,-(sp) ; save current MMU mode
bne.s @in32BitMode ; IF we're in 24-bit mode THEN
moveq #true32b,d0 ; we want to go to 32 bit addressing
_SwapMMUMode ; switch the MMU mode
bra.s @doTranslation ; go do the translation
@in32BitMode ; ELSE
ENDIF
jsr checkTTRegs ; check transparent translation regs
bne.s @doTranslation ; IF we matched a TT register THEN
move.l d2,a0 ; put the original address into a0
moveq #paramErr,d3 ; return bad status
bra.s @cleanup ; >>EXIT with easy translation
; ENDIF
@doTranslation ; ENDIF
jsr GetMMUInfo ; set up globals <T8>
clr.l d0 ; clear starting bit value
clr.l d1 ; clear bit field length
move.b initShift(a6),d0 ; get bit to start at, with initial shift, if any
move.b levelOne(a6),d1 ; get bit field length
bfextu d2{d0:d1},d0 ; get index into 1st-level table
lsl.l #2,d0 ; convert to a 4-byte entry pointer index
btst.b #0,theCRP+3(a6) ; is this an 8-byte table?
beq.s @is4Byte ; IF this is a 8-byte entry table THEN
lsl.l #1,d0 ; convert to an 8-byte entry pointer index
@is4Byte ; ENDIF
add.l theSRP(a6),d0 ; get the physical address of the 1st-level entry
add.l myPhys2Log(a6),d0 ; convert to a logical address
move.l d0,a0 ; save in a0
;------------
; Change RAM disk protection
;------------
move.w #noErr,d3 ; return good result if we get here. <Z11><H2>
bset #writeProtectBit,3(a0) ; set the write-protect bit
tst.w a2 ; check if protect flag is set
bne.s @protect ; IF we want to unprotect THEN
bclr #writeProtectBit,3(a0) ; clear the write-protect bit
@protect ; ENDIF
cmp.b #cpu68040,CPUFlag ; check for processor type <T7>
bne.s @not040 ; IF on a 68040 THEN
MACHINE MC68040 ;
pflusha ; flush the ATC regs
bra.s @cleanup ; ELSE
MACHINE MC68030 ;
@not040 jsr ([jCacheFlush]) ; flush caches since they're logical <Z11><H2>
pflusha ; flush the ATC regs
; ENDIF <T7>
;------------
; d3.w = result code
; a0.l = physical address if successful
;------------
@cleanup
IF Supports24Bit THEN
move.b (sp)+,d0 ; get original MMU mode
bne.s @skipMMUSwap ; IF we were originally in 24-bit mode THEN
_SwapMMUMode ; swap back to it
@skipMMUSwap ; ENDIF
ENDIF
move.w (sp)+,d0 ; get status register value <T7>
move d0,sr ; restore status register <T7>
move.w d3,d0 ; return result in d0
@return unlk a6
movem.l (sp)+,ProtectRegs ; restore working registers
@bailNoMMU
rts
ENDWITH
;ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
; That's all folks.

View File

@ -129,7 +129,7 @@
MACHINE MC68030
MMUStuff PROC
EXPORT InitMMUGlobals, InitMMUTrap, MMUCleanupFor8Mb, SwitchMMU
EXPORT InitMMUGlobals, InitMMUTrap, SwitchMMU
IMPORT BaseOfROM, Critical, PramIO, RamTest
IMPORT RomLoc
@ -138,7 +138,7 @@ MMUStuff PROC
;-----
; InitMMUTrap - set up trap addres for SwapMMUMode
; InitMMUTrap 7930 - set up trap addres for SwapMMUMode
;
; Entry
; jSwapMMU points to correct SwapMMUMode routine
@ -155,7 +155,7 @@ InitMMUTrap
;-----
; InitMMUGlobals - set up vectors & lowmem for SwapMMUMode
; InitMMUGlobals 793c - set up vectors & lowmem for SwapMMUMode
;
; Entry
; BootGlobPtr points to BootGlobs
@ -195,53 +195,16 @@ InitMMUGlobals
@NoSwap rts
@swaps dc.w @NoSwap-@swaps ; No MMU: no swap routine!
dc.w SwapHMMU-@swaps ; offset to HMMU swap routine
dc.w @NoSwap-@swaps ; offset to HMMU swap routine
dc.w @NoSwap-@swaps ; MMB not supported: no swap routine!
dc.w Swap851-@swaps ; offset to 68851 PMMU swap routine
dc.w @NoSwap-@swaps ; offset to 68851 PMMU swap routine
dc.w Swap030-@swaps ; offset to 030 PMMU swap routine
dc.w Swap040-@swaps ; offset to 040 PMMU swap routine <T2>
dc.w @NoSwap-@swaps ; offset to 040 PMMU swap routine <T2>
dc.w @NoSwap-@swaps ; future expansion
dc.w @NoSwap-@swaps ; future expansion
;----- <3.1>
; MMUCleanupFor8Mb - copies MMU info (tc, crp, tt0, tt1) to below BufPtr.
;
; This is called on systems supporting 24 bit mode that have more than 8mb of RAM
; installed. The MMU info must be at a place that can be accessed in 24 bit mode,
; since the Swap MMU code must access it!
;
; Entry
; System is in 32 bit mode
; MMU24Info (long) points to 24 bit mode MMU configuration info in BootGlobs
; MMU32Info (long) points to 32 bit mode MMU configuration info in BootGlobs
; Exit
; MMU24Info (long) points to 24 bit mode MMU configuration info below BufPtr
; MMU32Info (long) points to 32 bit mode MMU configuration info below BufPtr
;
; Trashes
; d0/a0-a2
;---
WITH MMUConfigInfo
MMUCleanupFor8Mb
move.l BufPtr,a0 ; get top useable memory
suba.w #2*MMUInfoSize,a0 ; allocate space for config info
move.l a0,BufPtr ; update top useable memory
lea MMU32Info,a1 ; point at ptr to 32 bit mode info
bsr.s @doCopy ; copy it down
lea MMU24Info,a1 ; point at ptr to 32 bit mode info
@doCopy move.l (a1),a2 ; get ptr to info in BootGlobs
move.l a0,(a1) ; update ptr w/new stuff below BufPtr
moveq #MMUInfoSize-1,d0 ; loop counter
@copy move.b (a2)+,(a0)+ ; copy next byte
dbra d0,@copy ; repeat for all bytes
rts
ENDWITH ; {MMUConfigInfo}
;-----
; Swap32Only - null MMU swap, used when system has 32 bit addressing only
; Swap32Only 7990 - null MMU swap, used when system has 32 bit addressing only
;
; Entry:
; d0.b 0 to set 24-bit mode, non-zero to set 32-bit mode.
@ -256,84 +219,6 @@ Swap32Only
rts
;-----
; Swap851 - switches 68851 PMMU between 24 & 32 bit modes.
;
; Entry
; d0.b 0 to set 24-bit mode, non-zero to set 32-bit mode.
;
; Exit
; MMU32Bit updated with passed value of d0
; d0.l has previous value of MMU32Bit
; MMU is switched into the desired mode
;
; Trashes:
; d1/a0/a1
;---
Swap851 move.b d0,d1 ; check what mode we are going to, set up d1
bne.s @to32 ; IF we want 24 bit mode
moveq #0,d0 ; clear return register
move.b MMU32bit,d0 ; see what mode we're in now
beq.s @endif ; IF in 32 bit mode now
move sr,-(sp) ; save current interrupt status
ori #HiIntMask,sr ; disable interrupts during switch
move.l MMU24Info,a0 ; get ptr to 24 bit mode info
bra.s @swap ; go to common swap code
; ENDIF
@to32 ; ELSE (we want 32 bit mode)
moveq #0,d0 ; clear return register
move.b MMU32bit,d0 ; see what mode we're in now
bne.s @endif ; IF in 24 bit mode
move sr,-(sp) ; save current interrupt status
ori #HiIntMask,sr ; disable interrupts during switch
move.l MMU32Info,a0 ; get ptr to 32 bit mode info
IF forRomulator THEN ; Assume logical PC <> physical PC <3.7>
@swap moveq.l #1,d0 ; unset zero flag <3.7>
bra.s @doSwap ; go put PMOVE to TC into i-cache <3.7>
@inCache moveq.l #0,d0 ; set zero flag <3.7>
pmove theCRP(a0),CRP ; set the root pointer <3.7>
lea theTC(a0),a1 ; get address of TC <3.7>
bra.s @doSwap ; go swap modes from i-cache <3.7>
; NOTE: the following instructions are put <3.7>
; . in the i-cache, thus the 4 byte instructions<3.7>
; . to be executed must start on odd word <3.7>
; . boundaries so that they are put in on the <3.7>
ALIGN 4 ; . first pass through <3.7>
@doSwap bne.s @step ; (2 bytes) if zero flag not set, skip pmove <3.7>
pmove theCRP(a0),TC ; (4 bytes) disable the 851 <3.7>
; NOTE: the 851 must be disabled before <3.7>
; . the TC can be changed. The CRP always <3.7>
; . has the high bit off, and can be used to <3.7>
; . disable MMU. Also note that "theCRP" is <3.7>
; . zero, causing this instruction to be 4 bytes<3.7>
@step nop ; (2 bytes) force next inst to start on odd word<3.7>
bne.s @chk ; (2 bytes) if zero flag not set, skip pmove <3.7>
pmove (a1),TC ; (4 bytes) fire up new TC, flush ATC <3.7>
@chk beq.s @swapped ; (2 bytes) if zero flag set, we're done <3.7>
bra.s @inCache
@swapped ; <3.7>
ELSE ; <3.7>
@swap pmove theCRP(a0),tc ; disable the MMU so we can load a new TC value <3.8>
pmove theCRP(a0),crp ; set crp
@thePmove pmove theTC(a0),tc ; fire up the TC
ENDIF
pflusha ; clean out dirty ATC entries
move.b d1,MMU32Bit ; update global w/new mode flag
movec cacr,d1 ; get cache control register
ori.w #$0008,d1 ; set i-cache 'flush' bit
movec d1,cacr ; flush instruction caches
move (sp)+,sr ; restore interrupt mask
; ENDIF
@endif ; ENDIF
rts
;-----
; Swap030 - switches 030 PMMU between 24 & 32 bit modes.
;
@ -383,124 +268,8 @@ Swap030 move.b d0,d1 ; check what mode we are going to, set up d1
rts
;-----
; Swap040 - switches 040 PMMU between 24 & 32 bit modes. <7>
;
; Entry
; d0.b 0 to set 24-bit mode, non-zero to set 32-bit mode.
;
; Exit
; MMU32Bit updated with passed value of d0
; d0.l has previous value of MMU32Bit
; MMU is switched into the desired mode
;
; Trashes:
; d1/a0
;---
machine mc68040
Swap040 move.b d0,d1 ; check what mode we are going to, set up d1
bne.s @to32 ; IF we want 24 bit mode
moveq #0,d0 ; clear return register
move.b MMU32bit,d0 ; see what mode we're in now
beq.s @endif ; IF in 32 bit mode now
move.l MMU24Info,a0 ; get ptr to 24 bit mode info
bra.s @swap ; go to common swap code
; ENDIF
@to32 ; ELSE (we want 32 bit mode)
moveq #0,d0 ; clear return register
move.b MMU32bit,d0 ; see what mode we're in now
bne.s @endif ; IF in 24 bit mode
move.l MMU32Info,a0 ; get ptr to 32 bit mode info
@swap move sr,-(sp) ; save current interrupt status <T5>
ori #HiIntMask,sr ; disable interrupts during switch
move.b d1,MMU32Bit ; update global w/new mode flag
move.l theTT0(a0),d1 ; get transparent translation reg 0 value
movec d1,itt0 ; load the instruction TT0 reg
movec d1,dtt0 ; load the data TT0 reg with the same value
move.l theTT1(a0),d1 ; get transparent translation reg 1 value
movec d1,itt1 ; load the instruction TT0 reg
movec d1,dtt1 ; load the data TT0 reg with the same value
move.l theTC(a0),d1 ; get the TC value in d1
move.l theSRP(a0),a0 ; get the SRP value in a0
movec a0,SRP ; set the SRP with new pointer
movec d1,TC ; set the TC with the new value
pflusha ; flush the ATC entries <T6>
move (sp)+,sr ; restore interrupt mask
; ENDIF
@endif ; ENDIF
rts
machine mc68030 ;
;-----
; SwapHMMU - switches HMMU between 24 & 32 bit modes.
;
; This routine has a fix for the problem of losing sound interrupts when switching
; MMU modes. On HMMU Mac II's, a bit on Via2 portB switches the MMU mode.
; Unfortunately, hitting this bit clears the CB1 interrupt flag, which is
; the ASC interrupt.
;
; Since the interrupt handlers all call SwapMMUMode to switch into 24 bit mode
; before processing interrutps, an ASC interrupt that occurs after the
; original interrupt could be lost.
;
; This routine reduces the window for losing ASC interrupts to the minimum
; possible, which is half an instruction. After switching MMU modes,
; it checks the ASC's interrupt register, and if any interrupts are present
; (but lost because the CB1 flag was cleared), it OR's the interrupt register back
; to itself. The ASC then generates a new interrupt.
;
; Entry
; d0.b 0 to set 24-bit mode, non-zero to set 32-bit mode.
;
; Exit
; MMU32Bit updated with passed value of d0
; d0.l has previous value of MMU32Bit
; MMU is switched into the desired mode
;
; Trashes:
; d1/a0
;---
SwapHMMU
move.b d0,d1 ; check what mode desired, save it
bne.s @1 ; IF we want 24 bit mode
moveq #0,d0 ; clear return register
move.b MMU32bit,d0 ; see what mode we're in now
beq.s @3 ; IF in 32 bit mode now
move sr,-(sp) ; save current interrupt status
ori #HiIntMask,sr ; disable interrupts during switch
move.l VIA2RBV,a0 ; get ptr to 2nd Via
bclr #vFC3,vBufB(a0) ; throw us into 24 bit mode
bra.s @common ; (re-use common code)
@1 ; ELSE (we want 32 bit mode)
moveq #0,d0 ; clear return register
move.b MMU32bit,d0 ; see (and return) what mode we're in now
bne.s @3 ; IF in 24 bit mode now
move sr,-(sp) ; save current interrupt status
ori #HiIntMask,sr ; disable interrupts during switch
move.l VIA2RBV,a0 ; get ptr to 2nd Via
bset #vFC3,vBufB(a0) ; throw us into 32 bit mode
@common move.b d1,MMU32Bit ; update global w/new mode flag
movec cacr,d1 ; get cache control register
bset #3,d1 ; set icache flush bit
movec d1,cacr ; flush da cache, Guido
move.l ASCBase,a0 ; point to ASC
adda.w #ascFifoInt,a0 ; point to ASC interrupt register
move.b (a0),d1 ; get ASC interrupt register
beq.s @2 ; IF ASC thinks interrupt is pending
or.b d1,(a0) ; re-generate interrupt to VIA's CB1
@2 ; ENDIF
move (sp)+,sr ; restore interrupt mask
; ENDIF
@3 ; ENDIF
rts
;---------------------------------------------------
; MMU switch code, for Unix & Pink.
; MMU switch code, for Unix & Pink. 79ec
;
; Turns off the MMU, flushes ATC, then re-enables the MMU with passed info.
;
@ -525,33 +294,6 @@ SwapHMMU
SwitchMMU
@TestCPU sub.l d0,d0 ; D0 = 0
bset #CACR_DE_040,d0 ; set Data Cache Enable bit on 040s <T22>
movec d0,CACR ; attempt to enable data cache (temporarily)
movec CACR,d0 ; check and see if it's still there
btst #CACR_DE_040,d0 ; see if the bit exists in CACR <T22>
beq.s @isNot040
MACHINE MC68040 ; IF we're on a 68040 THEN
@is040 movec CACR,d0 ; retrieve cache control register
move.l d0,d1 ; save a copy for later restoration
sub.l d0,d0 ; clear D0 to disable caches (see diagram above)
movec d0,CACR ; disable both caches
movec d0,TC ; disable the ATC
pflusha ; flush ATC
movea.l theCRP(a0),a2 ; retrieve the new CRP (= URP on the 040) into D0
move.l theTC(a0),d0 ; retrieve the new TC into D0
movec a2,URP ; set up the URP
movec d0,TC ; ... and the TC
cpusha bc ; flush both caches (dirty data only pushed out of
; the data cache. inst. cache CPUSH = CINV)
movec d1,cacr ; re-enable caches
bra.s @allDone
MACHINE MC68030 ; ELSE we're on a 68030/68020
@isNot040 movec cacr,d0 ; get 020/030 cache control reg
move.w d0,d1 ; save it
andi #$FEFE,d0 ; clear cache enable bits

View File

@ -15,8 +15,8 @@ MMUObjs = "{ObjDir}MMU.a.o"
"{ObjDir}MMUTables.a.o" ¶
"{ObjDir}GetReal.a.o"
"{LibDir}MMU.lib" Ä {MMUObjs}
Lib {StdLibOpts} {MMUObjs} -o "{Targ}"
# "{LibDir}MMU.lib" Ä {MMUObjs}
# Lib {StdLibOpts} {MMUObjs} -o "{Targ}"

File diff suppressed because it is too large Load Diff

View File

@ -17,21 +17,20 @@
FigmentDir = {MemoryMgrDir}FigmentSources:
#include {FigmentDir}Figment.Make
MemoryMgrObjs = "{ObjDir}MemoryMgr.a.o" ¶
"{ObjDir}MemoryMgrExtensions.a.o" ¶
"{ObjDir}MemoryMgrInternal.a.o" ¶
"{ObjDir}BlockMove.a.o"
"{LibDir}MemoryMgr.lib" Ä "{LibDir}Figment.lib" {MemoryMgrObjs}
If "{FeatureSet}" =~ /Å'hasNewHeapMgr=True'Å/
Lib {StdLibOpts} -o "{Targ}" "{LibDir}Figment.lib" {MemoryMgrObjs}
Else
Lib {StdLibOpts} -o "{Targ}" {MemoryMgrObjs}
End
#include {FigmentDir}Figment.Make
# "{LibDir}MemoryMgr.lib" Ä "{LibDir}Figment.lib" {MemoryMgrObjs}
# If "{FeatureSet}" =~ /Å'hasNewHeapMgr=True'Å/
# Lib {StdLibOpts} -o "{Targ}" "{LibDir}Figment.lib" {MemoryMgrObjs}
# Else
# Lib {StdLibOpts} -o "{Targ}" {MemoryMgrObjs}
# End
"{ObjDir}BlockMove.a.o" Ä "{ObjDir}StandardEqu.d" ¶

55
OS/NKEventGroupWrapper.a Normal file
View File

@ -0,0 +1,55 @@
; Straightforward 68k wrappers for three NanoKernel MPCalls related to EventGroups
MPCall49 PROC EXPORT ; create an EventGroup (will be for blue), return its ID
Link A6, #$0
MoveQ.L #49, D0
dc.w $fe1f
Move.L D0, $C(A6)
Move.L $8(A6), D0
BEQ.B (* + $6)
MoveA.L D0, A1
Move.L A0, (A1)
Unlk A6
MoveA.L (SP)+, A0
AddQ #$4, SP
Jmp (A0)
MPCall54 PROC EXPORT
Link A6, #$0
MoveA.L $C(A6), A0
Move.L $8(A6), D1
MoveQ.L #54, D0
dc.w $fe1f
Move.L D0, $10(A6)
Unlk A6
MoveA.L (SP)+, A0
AddQ.L #$8, SP
Jmp (A0)
MPCall52 PROC EXPORT
Link A6, #$0
MoveA.L $8(A6), A1
MoveA.L $10(A6), A0
MoveQ.L #52, D0
dc.w $fe1f
Move.L D0, $14(A6)
Move.L $C(A6), D0
BEQ.B (* + $6)
MoveA.L D0, A1
Move.L A0, (A1)
Unlk A6
MoveA.L (SP)+, A0
DC.W $defc, $000c
; AddA.W #$C, SP
Jmp (A0)
END

68
OS/NKLogShim.a Normal file
View File

@ -0,0 +1,68 @@
; To print a C string:
; PEA @cstring
; MOVE $-3, -(SP)
; DC.W $AA7F
; To print a hex string:
; MOVE.L #value, -(SP)
; MOVE #2, -(SP) ; 1: byte, 2: word, else: long
; MOVE $-2, -(SP)
; DC.W $AA7F
NKLog PROC EXPORT
CmpI #-3, $4(SP)
BEQ.S NKxprintf
CmpI #-2, $4(SP) ;
BEQ.S NKPrintHex
Pea.L @errStr ; ERROR
Clr -(SP)
Bsr NKxprintf
MoveQ.L #$0, D0
Move $4(SP), D0
Move.L D0, -(SP)
Move.L #$2, -(SP)
Clr -(SP)
Bsr NKPrintHex
Rts
string Pascal
@errStr dc.b 'Unknown MPDispatch selector: ', 0, 0
NKxprintf
MoveA.L $6(SP), A0
@loop Move.B (A0)+, D0 ; iterate over string to get it in physical RAM?
BNE.S @loop
MoveA.L $6(SP), A0
MoveQ.L #96, D0 ; call NKXprintf
dc.w $fe1f
MoveA.L (SP)+, A0 ; return
AddQ.L #$6, SP
Jmp (A0)
NKPrintHex
MoveA.L $A(SP), A0 ; r3 arg (value to print)
Move.L $6(SP), D1 ; r4 arg (1: byte, 2: 2byte, else: 4byte)
MoveQ.L #97, D0 ; call NKPrintHex
dc.w $fe1f
MoveA.L (SP)+, A0 ; return
dc.w $defc, $000A
; AddA.W #$A, SP
Jmp (A0)
END

View File

@ -77,29 +77,28 @@ RealTimeDir = {OSDir}RealTime:
#include {RealTimeDir}RealTime.make
OSObjs = "{ObjDir}clock.a.o" ¶
OSObjs = "{ObjDir}BCScreenRelated.o" ¶
"{ObjDir}clock.a.o" ¶
"{ObjDir}CrsrDev.a.o" ¶
"{ObjDir}CudaMgr.a.o" ¶
"{ObjDir}DeferredTaskMgr.a.o" ¶
"{ObjDir}DeviceMgr.a.o" ¶
"{ObjDir}DockingMgr.a.o" ¶
"{ObjDir}DeviceRelatedMgr.o" ¶
"{ObjDir}EgretMgr.a.o" ¶
"{ObjDir}HwPriv.a.o" ¶
"{ObjDir}I2C.a.o" ¶
"{ObjDir}Universal.a.o" ¶
"{ObjDir}InterruptHandlers.a.o" ¶
"{ObjDir}IOPMgr.a.o" ¶
"{ObjDir}OSEventMgr.a.o" ¶
"{ObjDir}queue.a.o" ¶
"{ObjDir}sysUtil.a.o" ¶
"{ObjDir}VerticalRetraceMgr.a.o" ¶
"{ObjDir}MiscPatches.a.o" ¶
"{ObjDir}MagicData.a.o" ¶
"{ObjDir}PowerMgr.o" ¶
"{ObjDir}PwrControlsPatches.o" ¶
"{ObjDir}VMPatches.a.o" ¶
"{ObjDir}NKLogShim.a.o" ¶
"{ObjDir}Dispatch.a.o" ¶
"{ObjDir}UniversalTables.a.o"
"{ObjDir}UniversalTables.a.o" ¶
"{ObjDir}NKEventGroupRelated.a.o" ¶
"{ObjDir}InterruptHandlers.a.o" ¶
"{ObjDir}NKEventGroupWrapper.a.o"
"{LibDir}OS.lib" Ä {OSObjs}
@ -133,14 +132,14 @@ OSObjs = "{ObjDir}clock.a.o"
Asm {StdAOpts} -o "{Targ}" "{OSDir}DeferredTaskMgr.a"
"{ObjDir}DeviceMgr.a.o" Ä "{OSDir}DeviceMgr.a" ¶
"{ObjDir}StandardEqu.d" ¶
"{AIncludes}HardwareEqu.a" ¶
"{IntAIncludes}UniversalEqu.a" ¶
"{AIncludes}ROMEqu.a" ¶
"{AIncludes}Slots.a" ¶
"{AIncludes}FSEqu.a"
Asm {StdAOpts} -o "{Targ}" "{OSDir}DeviceMgr.a"
# "{ObjDir}DeviceMgr.a.o" Ä "{OSDir}DeviceMgr.a" ¶
# "{ObjDir}StandardEqu.d" ¶
# "{AIncludes}HardwareEqu.a" ¶
# "{IntAIncludes}UniversalEqu.a" ¶
# "{AIncludes}ROMEqu.a" ¶
# "{AIncludes}Slots.a" ¶
# "{AIncludes}FSEqu.a"
# Asm {StdAOpts} -o "{Targ}" "{OSDir}DeviceMgr.a"
"{ObjDir}DispatchHelper.a.o" Ä "{ObjDir}StandardEqu.d" ¶
@ -191,19 +190,19 @@ OSObjs = "{ObjDir}clock.a.o"
"{IntAIncludes}i2cEqu.a"
Asm {StdAOpts} -o "{Targ}" "{I2CDir}I2C.a"
"{ObjDir}InterruptHandlers.a.o" Ä "{ObjDir}StandardEqu.d" ¶
"{IntAIncludes}HardwarePrivateEqu.a" ¶
"{IntAIncludes}SysPrivateEqu.a" ¶
"{IntAIncludes}UniversalEqu.a" ¶
"{IntAIncludes}IOPrimitiveEqu.a" ¶
"{AIncludes}Shutdown.a" ¶
"{IntAIncludes}PowerPrivEqu.a" ¶
"{IntAIncludes}EgretEqu.a" ¶
"{IntAIncludes}PSCEqu.a" ¶
"{IntAIncludes}AMICEqu.a" ¶
"{IntAIncludes}GrandCentralPriv.a" ¶
"{OSDir}InterruptHandlers.a"
Asm {StdAOpts} -o "{Targ}" "{OSDir}InterruptHandlers.a"
# "{ObjDir}InterruptHandlers.a.o" Ä "{ObjDir}StandardEqu.d" ¶
# "{IntAIncludes}HardwarePrivateEqu.a" ¶
# "{IntAIncludes}SysPrivateEqu.a" ¶
# "{IntAIncludes}UniversalEqu.a" ¶
# "{IntAIncludes}IOPrimitiveEqu.a" ¶
# "{AIncludes}Shutdown.a" ¶
# "{IntAIncludes}PowerPrivEqu.a" ¶
# "{IntAIncludes}EgretEqu.a" ¶
# "{IntAIncludes}PSCEqu.a" ¶
# "{IntAIncludes}AMICEqu.a" ¶
# "{IntAIncludes}GrandCentralPriv.a" ¶
# "{OSDir}InterruptHandlers.a"
# Asm {StdAOpts} -o "{Targ}" "{OSDir}InterruptHandlers.a"
"{ObjDir}IOPMgr.a.o" Ä "{ObjDir}StandardEqu.d" ¶
@ -255,14 +254,14 @@ OSObjs = "{ObjDir}clock.a.o"
Asm {StdAOpts} -o "{Targ}" "{OSDir}Universal.a" -i "{OSDir}StartMgr"
"{ObjDir}UniversalTables.a.o" Ä "{ObjDir}StandardEqu.d" ¶
"{IntAIncludes}HardwarePrivateEqu.a" ¶
"{IntAIncludes}UniversalEqu.a" ¶
"{AIncludes}Slots.a" ¶
"{IntAincludes}DepVideoEqu.a" ¶
"{AIncludes}ROMEqu.a" ¶
"{OSDir}UniversalTables.a"
Asm {StdAOpts} -o "{Targ}" "{OSDir}UniversalTables.a" -i "{OSDir}IoPrimitives:"
# "{ObjDir}UniversalTables.a.o" Ä "{ObjDir}StandardEqu.d" ¶
# "{IntAIncludes}HardwarePrivateEqu.a" ¶
# "{IntAIncludes}UniversalEqu.a" ¶
# "{AIncludes}Slots.a" ¶
# "{IntAincludes}DepVideoEqu.a" ¶
# "{AIncludes}ROMEqu.a" ¶
# "{OSDir}UniversalTables.a"
# Asm {StdAOpts} -o "{Targ}" "{OSDir}UniversalTables.a" -i "{OSDir}IoPrimitives:"
"{ObjDir}VerticalRetraceMgr.a.o" Ä "{ObjDir}StandardEqu.d" ¶
@ -282,3 +281,11 @@ OSObjs = "{ObjDir}clock.a.o"
"{ObjDir}VMPatches.a.o" Ä "{OSDir}VMPatches.a"
Asm {StdAOpts} -o "{Targ}" "{OSDir}VMPatches.a"
"{ObjDir}NKLogShim.a.o" Ä "{OSDir}NKLogShim.a"
Asm {StdAOpts} -o "{Targ}" "{OSDir}NKLogShim.a"
"{ObjDir}NKEventGroupWrapper.a.o" Ä "{OSDir}NKEventGroupWrapper.a"
Asm {StdAOpts} -o "{Targ}" "{OSDir}NKEventGroupWrapper.a"

View File

@ -129,10 +129,11 @@
INCLUDE 'Balloons.a' ;
INCLUDE 'BalloonsPriv.a' ;
INCLUDE 'PowerPrivEqu.a' ;
INCLUDE 'Processes.a'
Events PROC EXPORT
EXPORT InitEvents,PostEventTrap,GetOSEventTrap,OSEventAvailTrap,FlushEvents
EXPORT InitEvents,PostEventTrap,GetOSEventTrap,OSEventAvailTrap,FlushEvents,NewEMFunction
IMPORT EnqueueTrap,DequeueTrap,SMgrPostMunging
@ -143,7 +144,7 @@ EvtOffset EQU 6 ; event record offset from start of
;_______________________________________________________________________
;
; Routine: InitEvents
; Routine: InitEvents afe0
;
; Arguments: D0 (input) -- number of elements in the event queue
; D0 (output) -- result code
@ -184,7 +185,7 @@ InitEvents move.w EventQueue,d2 ; check the first word of the EventQ <SM9>
;_______________________________________________________________________
;
; Routine: PostEvent
; Routine: PostEvent b010
;
; Arguments: A0 (input) -- event number (16-bit)
; D0 (input) -- event message (32-bit)
@ -304,7 +305,7 @@ FillRecord MOVE.L Ticks,EvtTicks(A0) ; fill in the current time
;_______________________________________________________________________
;
; Routine: OSEventavail
; Routine: OSEventavail b09c
;
; Arguments: A0 (input) -- pointer to user event record (32-bit)
; D0 (input) -- set of events desired (event mask)
@ -330,8 +331,9 @@ FillRecord MOVE.L Ticks,EvtTicks(A0) ; fill in the current time
;_______________________________________________________________________
OSEventAvailTrap
IMPORT ptchHMGetBalloons ; <SM6> rb, start
IMPORT ptchHMCallTrackerInContext
ANDI.L #$FFFF,D0
OSEventAvailSkippingAndi
with PowerDispRec
MOVEM.L A0-A1/D0-D2,-(SP) ; we need to save these regs
@ -348,7 +350,40 @@ OSEventAvailTrap
BNE.S @DoNothing ; do nothing on the reentrant case
ST hmgOSEventReentrantCount(A0) ; say that we're busy
JSR ptchHMCallTrackerInContext
; from BalloonExtensions.a: ptchHMCallTrackerInContext
SUBQ #$8, SP
SUBQ #$2, SP
PEA.L $2(SP)
MOVEQ.L #-$1, D0 ; like _GetFrontProcess but not quite
MOVE.L D0, -(SP)
MOVE #$39, -(SP)
_OSDispatch
TST (SP)+
BNE.B @wasError
SUBQ #$2, SP
PEA.L $2(SP)
_WakeUpProcess
TST (SP)+
BNE.B @wasError
SUBQ #$2, SP
MOVE #$FC, D0 ; from Balloonptch28.p: HMBalloonBulk
_Pack14
TST (SP)+
@wasError AddQ #$8, SP
; from BalloonExtensions.a: ptchHMGetHelpGlobal
MOVE.L ExpandMem,A0 ; point to the expand mem ptr
MOVE.L ExpandMemRec.emHelpGlobals(A0),A0 ; return the global ptr on the stack
CLR hmgOSEventReentrantCount(A0)
@DoNothing
MOVEM.L (SP)+,A0-A1/D0-D2 ; restore 'em, <SM6> rb, end
@ -389,9 +424,12 @@ TstAutoEvent AND.W SysEvtMask,D0 ; figure in system mask for pseudo-evts
MOVE.L Ticks,D1 ; check first threshold
MOVE.L D1,D2
SUB.L KeyTime,D1
CMPI.L #$8000,D1
BGE @skip
CMP KeyThresh,D1
BLT.S NoEventAvail ; br if not time yet
@skip
SUB.L KeyRepTime,D2 ; check second threshold
CMP KeyRepThresh,D2
BLT.S NoEventAvail ; br if not time yet
@ -439,7 +477,7 @@ NoEventAvail BSR.S FillRecord ; fill in record for null events
;_______________________________________________________________________
;
; Routine: GetOSEvent
; Routine: GetOSEvent b1aa
;
; Arguments: A0 (input) -- pointer to user event buffer (32-bit)
; D0 (input) -- type of event desired (event mask)
@ -458,7 +496,10 @@ NoEventAvail BSR.S FillRecord ; fill in record for null events
; Other: uses D0,D1,D2,A0,A1
;_______________________________________________________________________
GetOSEventTrap BSR.S OldOSEventAvail ; first find the event <SM11>
GetOSEventTrap ANDI.L #$FFFF,D0
GetOSEventSkippingAndi
BSR.S OldOSEventAvail ; first find the event <SM11>
BNE.S @EventDone ; don't dequeue null or update events
MOVE.L A0,-(SP) ; save user's event record ptr
@ -487,7 +528,7 @@ DeleteEvt JSR DequeueTrap ; dequeue it (D0 destroyed)
;_______________________________________________________________________
;
; Routine: FlushEvents
; Routine: FlushEvents b1ea
;
; Arguments: D0 (input) -- low word: events to remove (event mask)
; high word: events on which to stop (event mask)
@ -548,33 +589,38 @@ FlushStop MOVEM.L (SP)+,D3-D4 ; restore regs
MOVE.W (SP)+, SR ; on as our result
RTS
END
NewEMFunction
; b232
MoveA.L (A7)+, A1
CmpI #$1, D0
BEQ.B L13
CmpI #$2, D0
BEQ.B L14
CmpI #$3, D0
BEQ.B L15
MoveQ.L #$C, D0
DC.W $A9C9
L13 Move.L (A7)+, D0
MoveA (A7)+, A0
Move.L A1, -(A7)
Bsr GetFreeOne
Bra.B L16
L14 MoveA.L (A7)+, A0
Move.L (A7)+, D0
Move.L A1, -(A7)
Bsr OSEventAvailSkippingAndi
Not.L D0
AndI.L #$101, D0
Bra.B L16
L15 MoveA.L (A7)+, A0
Move.L (A7)+, D0
Move.L A1, -(A7)
Bsr GetOSEventSkippingAndi
Not.L D0
AndI.L #$101, D0
L16 Move.L D0, $4(A7)
Rts
END

View File

@ -615,7 +615,7 @@ PowerMngr PROC EXPORT
;________________________________________________________________________________________
;
; Routine: InitPMgrVars
; Routine: InitPMgrVars c3c0
;
; Inputs: none
;
@ -982,7 +982,7 @@ InitPmgrGlobals
;________________________________________________________________________________________
;
; Routine: InitPMgrOp
; Routine: InitPMgrOp c446
;
; Inputs: A3 -- pointer to Power Manager's variables
;
@ -1004,7 +1004,7 @@ InitPMgrOp LEA cmdCounts,A0 ; save pointers to the PMgrOp send/receive count
;________________________________________________________________________________________
;
; Routine: SetupPMgrOpInterface
; Routine: SetupPMgrOpInterface c45e
;
; Inputs: none
;
@ -1046,7 +1046,7 @@ SetupPMgrOpInterface
;________________________________________________________________________________________
;
; Routine: DoPmgrCommands
; Routine: DoPmgrCommands c49c
;
; Inputs: A3 -- Pointer to PmgrVars
;
@ -1109,7 +1109,7 @@ DoPmgrCommands
;________________________________________________________________________________________
;
; Routine: DoDynamicSpeedChange
; Routine: DoDynamicSpeedChange c540
;
; Inputs: A3 -- Pointer to PmgrVars
;
@ -1233,7 +1233,7 @@ GetPmgrPRAM
;________________________________________________________________________________________
; Routine: InstallVBLs
; Routine: InstallVBLs c6de
;
; Inputs: A3 -- Pointer to PmgrVars
;
@ -1401,7 +1401,7 @@ BatWatch
;________________________________________________________________________________________
;
; Routine: RemoveMsg
; Routine: RemoveMsg c780
;
; Inputs: A2 - pointer to Power Manager's variables
;
@ -1464,7 +1464,7 @@ InstallMsg
;________________________________________________________________________________________
;
; Routine: PMGRInt
; Routine: PMGRInt c79e
;
; Inputs: A1 - pointer to VIA1 base
;
@ -2249,7 +2249,7 @@ SetHDState
;________________________________________________________________________________________ <K16>
; |
; Routine: PmgrOp v
; Routine: PmgrOp ceb2 v
;
; Inputs: D1 - trap word
;
@ -2291,7 +2291,7 @@ PmgrOp
;________________________________________________________________________________________
;
; Routine: PmgrTrap
; Routine: PmgrTrap cef6
;
; Inputs: A0 -- pointer to Power Manager parameter block
; [word] command/reply
@ -2569,7 +2569,7 @@ pmgrPollRegs REG D3/D4/D5/D6/A0/A1/A2/A4
;________________________________________________________________________________________
;
; Routine: Wait4AckLo
; Routine: Wait4AckLo d09e
;
; Inputs: D2 -- timeout count
; A1 -- pointer to VIA1 base
@ -2599,7 +2599,7 @@ Wait4AckLo MOVEA.L (SP)+,A4 ; save the return address
;________________________________________________________________________________________
;
; Routine: Wait4AckHi
; Routine: Wait4AckHi d0b8
;
; Inputs: D2 -- timeout count
; A1 -- pointer to VIA1 base
@ -2629,7 +2629,7 @@ Wait4AckHi MOVEA.L (SP)+,A4 ; save the return address
;________________________________________________________________________________________
;
; Routine: ReceiveByte
; Routine: ReceiveByte d0d2
;
; Inputs: D6 -- interface type
; 0=parallel
@ -2704,7 +2704,7 @@ SendRcvDone BSET #PMreq,(A2) ; be sure /req is not asserted
;________________________________________________________________________________________
;
; Routine: SendByte
; Routine: SendByte d136
;
; Inputs: D1 -- byte to send
; D2 -- timeout count
@ -2769,7 +2769,7 @@ DisableBuf BRA.S @Buf2Input ; [0] parallel interface
;________________________________________________________________________________________
;
; Routine: UnloadPollstack
; Routine: UnloadPollstack d180
;
; Inputs: D7 -- pointer to top of poll stack
; A1 -- pointer to VIA1 base
@ -3378,7 +3378,7 @@ replyCounts DC.B 0 ; [$00] -
;________________________________________________________________________________________ <K11>
;
; _CommsPower - Communications' port power control
; _CommsPower - Communications' port power control d3a8
; _SerialPower ($A685) - Serial port power control
;
; Enter with: D0 = bit pattern
@ -3493,7 +3493,7 @@ SerialPower
;ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ <t28> djw
; Modem Sound Interrupt Handlers
; Modem Sound Interrupt Handlers d3f4
;
; Modem sound on Tim is implemented through DFAC's aux channel. The modem demands
; and releases the sound path through the MODEM_SND_ENABLE signal (on VIA1 CB2). The
@ -3524,7 +3524,7 @@ ModemSndOnInt
rts
;ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ <H59>
; Modem Sound Interrupt Handlers |
; Modem Sound Interrupt Handlers d464 |
; V
; Modem sound on Tim is implemented through DFAC's aux channel. The modem demands
; and releases the sound path through the MODEM_SND_ENABLE signal (on VIA1 CB2). The
@ -3555,7 +3555,7 @@ ModemSndOffInt
;________________________________________________________________________________________
;
; IdleState ($A485) - Increments/decrements the idle enable flag count and returns
; IdleState d4d2 ($A485) - Increments/decrements the idle enable flag count and returns
; the current speed.
;
; Enter with: D0 < 0, read speed
@ -4350,7 +4350,7 @@ SlpQRemove CMP.W #slpQType,SleepqType(A0)
;________________________________________________________________________________________
;
; Routine: ResetPMGRInts
; Routine: ResetPMGRInts c752
;
; Inputs: A1 - VIA1 base address
;
@ -4456,7 +4456,7 @@ SetSupervisorMode
JMP (A1) ; Get out of here
;ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
; Routine: PMGRsend/recv
; Routine: PMGRsend/recv d504/d506
;
; Inputs: A0 - data buffer
; D0 - command

View File

@ -14,22 +14,22 @@
#
"{ObjDir}PowerMgr.o" Ä "{ObjDir}StandardEqu.d" ¶
"{IntAIncludes}HardwarePrivateEqu.a" ¶
"{IntAIncludes}UniversalEqu.a" ¶
"{IntAIncludes}PowerPrivEqu.a" ¶
"{AIncludes}AppleTalk.a" ¶
"{AIncludes}Notification.a" ¶
"{IntAIncludes}IopEqu.a" ¶
"{IntAIncludes}EgretEqu.a" ¶
"{IntAIncludes}AppleDeskBusPriv.a" ¶
"{IntAIncludes}MMUEqu.a" ¶
"{IntAIncludes}IOPrimitiveEqu.a" ¶
"{AIncludes}LAPEqu.a" ¶
"{IntAIncludes}DockingEqu.a" ¶
"{AIncludes}Slots.a" ¶
"{PowerMgrDir}PowerMgr.a"
Asm {StdAOpts} -o "{Targ}" "{PowerMgrDir}PowerMgr.a"
# "{ObjDir}PowerMgr.o" Ä "{ObjDir}StandardEqu.d" ¶
# "{IntAIncludes}HardwarePrivateEqu.a" ¶
# "{IntAIncludes}UniversalEqu.a" ¶
# "{IntAIncludes}PowerPrivEqu.a" ¶
# "{AIncludes}AppleTalk.a" ¶
# "{AIncludes}Notification.a" ¶
# "{IntAIncludes}IopEqu.a" ¶
# "{IntAIncludes}EgretEqu.a" ¶
# "{IntAIncludes}AppleDeskBusPriv.a" ¶
# "{IntAIncludes}MMUEqu.a" ¶
# "{IntAIncludes}IOPrimitiveEqu.a" ¶
# "{AIncludes}LAPEqu.a" ¶
# "{IntAIncludes}DockingEqu.a" ¶
# "{AIncludes}Slots.a" ¶
# "{PowerMgrDir}PowerMgr.a"
# Asm {StdAOpts} -o "{Targ}" "{PowerMgrDir}PowerMgr.a"
"{ObjDir}PwrControlsPatches.o" Ä "{ObjDir}StandardEqu.d" ¶
"{IntAIncludes}HardwarePrivateEqu.a" ¶

View File

@ -87,49 +87,6 @@ ENQDONE SUBQ #2,A1 ;restore A1
ENDP
;-----------------------------------------------------------------------
; EnqueueHead -- add a queue element to the head of a queue.
;-----------------------------------------------------------------------
;
; Entry:
; A0 - points to the queue element
; A1 - points to the queue header
; All registers are preserved; there are no error conditions.
;
; The element is inserted at the beginning of the list.
;
;-----------------------------------------------------------------------
;
ENQUEUEHEAD PROC EXPORT
MOVE SR, -(SP) ;preserve status
ADDQ #2, A1 ;point to qHead
ORI #$0700, SR ;disable interrupts for exclusion
TST.L (A1)+ ;anything in the queue? (qHead)
BNE.S @doQinsert ;if so, skip ahead
;
; the queue is empty so make the head and tail point to the new element
;
MOVE.L A0, (A1) ;qTail
MOVE.L A0, -(A1) ;qHead
CLR.L qLink(A0) ;clear the link of the element
BRA.S @enQdone
;
; insert the element at the head of the list
;
@doQinsert MOVE.L A2, -(SP) ;preserve A2
MOVE.L -(A1), A2 ;get ptr to old qHead
MOVE.L A2, qLink(A0) ;update new link to old head
MOVE.L A0, (A1) ;update qHead
MOVE.L (SP)+, A2 ;restore A2
;
@enQdone SUBQ #2, A1 ;restore A1
MOVE (SP)+, SR ;restore status and go home
RTS
ENDP
;
;-----------------------------------------------------------------------
;

View File

View File

@ -38,8 +38,8 @@ SCSIObjects = "{ObjDir}scsiboot.a.o"
"{ObjDir}SCSIMgrInitDB.a.o" ś
"{ObjDir}SCSIMgrDB.a.o" ś
"{LibDir}SCSI.lib" Ä {SCSIObjects}
Lib {StdLibOpts} -o "{Targ}" {SCSIObjects}
# "{LibDir}SCSI.lib" Ä {SCSIObjects}
# Lib {StdLibOpts} -o "{Targ}" {SCSIObjects}
"{ObjDir}SCSIBoot.a.o" Ä "{ObjDir}StandardEqu.d" ś

View File

@ -16,8 +16,8 @@ SlotMgrObjs = "{ObjDir}SlotInterrupts.a.o"
"{ObjDir}SlotMgrInit.a.o" ¶
"{ObjDir}SlotMgr.a.o"
"{LibDir}SlotMgr.lib" Ä {SlotMgrObjs}
Lib {StdLibOpts} -o "{Targ}" {SlotMgrObjs}
# "{LibDir}SlotMgr.lib" Ä {SlotMgrObjs}
# Lib {StdLibOpts} -o "{Targ}" {SlotMgrObjs}

View File

@ -113,7 +113,7 @@
; ---------------------------------------------------------------------------
; Routine AllocFakeRgns
; Routine AllocFakeRgns 4a50
; Arguments
; Function Sets up a dummy vis and clip region for the system alert port
; ---------------------------------------------------------------------------
@ -142,7 +142,7 @@ FakeRgn DC.W 10
;---------------------------------------------------------------------------
; ClipBox sets the clipRegion (stored in GetParam) to the DS Alert rect.
; ClipBox 4a80 sets the clipRegion (stored in GetParam) to the DS Alert rect.
; Trashes A0 and A1.
;---------------------------------------------------------------------------
@ -160,7 +160,7 @@ ClipBox LEA DSAlertRect+8,A0 ; point to our rect <16-Oct-85><1.3>
;---------------------------------------------------------------------------
; Routine DSErrorHandler
; Routine DSErrorHandler 4a9e
; Arguments DSErrCode (input) System error value
; Function Creates temporary QD world on stack & uses the current Deep shit
; alert table (DSAT) to decide what to draw/do based on the system
@ -319,7 +319,7 @@ RTS2SysErr BSR OpenClip ; set clip back to full size <EHB 16-Oct85>
;---------------------------------------------------------------------------
; FindObject takes the logical alert ID in D0 and scans through the
; FindObject 4b88 takes the logical alert ID in D0 and scans through the
; association until it finds an entry with the matching ID. It returns
; a pointer to the object body in A0, which is NIL if it couldn't
; find anything. The z-Flag will be set if we couldn't find it.
@ -344,7 +344,7 @@ FindObject MOVE.L D7,A0 ;point to DS data structure
;---------------------------------------------------------------------------
; DrawText draws the deep shit text structure as specified by the ID in D0
; DrawText 4ba4 draws the deep shit text structure as specified by the ID in D0
;---------------------------------------------------------------------------
DrawText MOVE.W (A3)+,D0 ;get the text ID
@ -387,7 +387,7 @@ DrawText MOVE.W (A3)+,D0 ;get the text ID
;---------------------------------------------------------------------------
; DrawBox draws a dialog-box-like-box or a deepshit-like-box
; DrawBox 4bdc draws a dialog-box-like-box or a deepshit-like-box
;---------------------------------------------------------------------------
DrawBox MOVE.L DSDrawProc,D0 ; is a custom dialog draw procedure specified?
@ -396,12 +396,29 @@ DrawBox MOVE.L DSDrawProc,D0 ; is a custom dialog draw procedure specified?
BSET #7,DSDrawProc ; make it a one-shot
RTS ; go to it
@StdProc LEA DSAlertRect,A0 ; pt A0 at rect
@StdProc MOVE D6,D0
BSR.S FindObject
BEQ.S @old
CMPI #12,-2(A0)
BLT.S @old
MOVE 10(A0),D0
BSR.S FindObject
BEQ.S @old
MOVE.L (A0)+,DSAlertRect
MOVE.L (A0),DSAlertRect+4
PEA.L DSAlertRect
BSR NewAlertFunc
ADDQ #4,SP
@old LEA DSAlertRect,A0 ; pt A0 at rect
TST.B (A0) ; is this a system alert? (vs system error?)
BPL.S DrawSysAlert ; yes, draw normal, do _MovePortTo
; we know it's a system error, so go stuff the rect w/what we need
; 4c1c
DrawSysErr
MOVEM.L A1/D1,-(SP) ; save registers. <C578>
@ -439,6 +456,7 @@ DrawSysErr
MOVEM.L (SP)+,A1/D1 ; restore registers.
RTS ; and return
; 4c6a
DrawSysAlert
BSR.S DrawBox2 ; draw it
MOVE.L DSAlertRect,-(SP) ; push TL of rect
@ -447,6 +465,7 @@ DrawSysAlert
; use rect at (A0)
; 4c74
DrawBox2 MOVE.L A0, -(SP) ; rect for EraseRect
MOVE.L A0, -(SP) ; rect for FrameRect
MOVE.L A0, -(SP) ; rect for InsetRect
@ -465,6 +484,56 @@ DrawBox2 MOVE.L A0, -(SP) ; rect for EraseRect
NoButtons RTS
NewAlertFunc
Link A6, #-$8
MoveM.L A1-A3, -(A7)
MoveA.L $8(A6), A3
Lea.L -$8(A6), A2
MoveA.L (A5), A0
Lea.L -$74(A0), A0
Move.L (A0)+, (A2)
Move.L (A0), $4(A2)
SubQ #$2, A7
Move (MBarHeight), (A7)
Move (A7)+, D0
Add D0, (A2)
Move.L A3, -(A7)
Move $6(A2), D0
Add $2(A2), D0
AsR #$1, D0
Move D0, -(A7)
Move $6(A3), D0
Add $2(A3), D0
AsR #$1, D0
Sub D0, (A7)
Move (A2), D0
Add $4(A2), D0
AsR #$1, D0
Move D0, -(A7)
Move (A3), D0
Add $4(A3), D0
AsR #$1, D0
Sub D0, (A7)
_OffsetRect
Move (A3), D0
Sub (A2), D0
Ext.L D0
Neg.L D0
DivS #$3, D0
Move.L A3, -(A7)
Clr -(A7)
Move D0, -(A7)
_OffsetRect
MoveM.L (A7)+, A1-A3
Unlk A6
Rts
;---------------------------------------------------------------------------
; DoButtons draws some buttons as specified by the buttonList data structure
; defined by the ID in D0, and then hit-tests the mouse position against
@ -683,6 +752,7 @@ CmdLoop MOVE.L SP,A0 ; Point to event record on stack
_OffsetRect ; offset it
BSR MBDoErase ; erase it
MOVE.B #$20,(A6)
MOVE.W D3,-(SP) ; char width
NEG.W (SP) ; negative movement
CLR.W -(SP) ; delta V = 0
@ -791,7 +861,7 @@ DMCmd MOVE.L #$007001B0,-(SP) ; push BR
RTS ; and return
Print6Hx SWAP D0
BSR.S Print2Hx
BSR.S Print4Hx
SWAP D0
Print4Hx MOVE.W D0,-(SP)

View File

@ -294,10 +294,6 @@ BootMe PROC EXPORT
EXPORT InitSys7Toolbox
EXPORT OpenSlots
BSR CheckForROMDisk ; Check if we would like to boot a ROM disk <SM33>
TST.W D0 ; Did we find a bootable ROM disk? <SM33>
BEQ.S @foundBootDisk ; If so then we've got startup device, now call BBs <SM33>
BSR FindStartupDevice ; Find the startup device & load boot blocks.
; (see StartSearch.a)
@ -350,7 +346,8 @@ MyExecMask EQU BBNewMask+BBExecMask
CMP.B #MyExecMask,D1 ; Are these new executable boot blocks?
BNE.S @NoExec ; If not, don't execute them
@ExecBB LEA MyIOPBA6(A6),A0 ; point to parameter block <SM30>
@ExecBB BSR MessWithZones
LEA MyIOPBA6(A6),A0 ; point to parameter block <SM30>
MOVE.L A0,D7 ; set it where Boot blocks want it <SM30>
JSR BBEntry(A6) ; Execute the boot blocks
@NoExec
@ -372,17 +369,13 @@ ReBoot move.w BootDrive,D3 ; Get current boot drive number
MOVE.W #EjectCode,CSCode(A0)
MOVE.W D3,IODrvNum(A0) ; d3 = BootDrive, must be a drive# here!
_Control ; eject the bad diskette
BNE.S @DisableNextTime ; If not ejectable, don't try again
move.b (sp)+,d0 ; restore DiskInPlace byte
tst -$3f0(a6)
bne.b @DisableNextTime
cmpi.b #8,d0 ; were we ejectable?
bge @DisableNextTime ; no, don't boot from this drive again
; ((( -------------------- Systems with HD20 --------------------
CMP.W #$FFFE,BtDskRfN ; HD20's can pretend they're ejectable
BNE.S @1 ; Branch if it's not an HD20
; ))) -------------------- Systems with HD20 --------------------
@DisableNextTime
MOVE.W BootMask,D0
BCLR D3,D0
@ -400,6 +393,41 @@ ReBoot move.w BootDrive,D3 ; Get current boot drive number
MessWithZones
MoveM.L D0/A0-A1, -(A7)
Move.L (ApplZone), D0
Cmp.L (SysZone), D0
BEQ.B (* + $4)
_InitApplZone
MoveA.L (SysZone), A0
AddA.L #$A00000, A0
MoveA.L A7, A1
SubA.L (DefltStack), A1
SubA.L #$40000, A1
SubA.L #$64000, A1
CmpA.L A0, A1
BHI.B (* + $4)
MoveA.L A1, A0
_SetApplBase
MoveA.L (SysZone), A0
Move.L A0, (ApplZone)
Move.L A0, (TheZone)
Move.L (A0), (HeapEnd)
MoveA.L A7, A0
SubA.L (DefltStack), A0
SubA.L #$40000, A0
_SetApplLimit
MoveM.L (A7)+, D0/A0-A1
Rts
;________________________________________________________________________________________________
IF 0 THEN ; <SM49> <SM49>
IMPORT IRQException ;
@ -508,239 +536,6 @@ getDiskInPlace ; find the drive queue element
@done rts
;________________________________________________________________________________________________ <SM33>
; CheckForROMDisk
;
; The following code supports the "Ginty" ROM disk architecture (System Disk in ROM).
; The idea is to pass control to the ROM disk so it can decide whether or not
; to boot from the ROM disk. If there is no ROM disk present or this particular machine
; does not support it then we continue as usual in the boot process.
;
; Input: nothing
; Output: D0.W = non-zero if no ROM disk was found or if one was it was non-bootable
; D0.W = zero means we found a bootable ROM disk. The code in the ROM disk
; already called FinderStartupDevice.
;________________________________________________________________________________________________
CheckForROMDisk
move.l UnivROMFlags,d0 ; get external features flag
btst.l #ProductInfo.SupportsROMDisk,d0 ; see if machine supports ROM disks?
beq.s @noROMDisk ; if not then just continue as usual
bsr.s FindROMDisk ; check if we have a ROM disk
beq.s @foundROMDisk
move.l UnivROMFlags,D0 ; get external feature flags
btst.l #ProductInfo.V8ChipBit,D0 ; are we on a VISA decoder machine?
beq.s @NoROMDisk ; if not then we're done
;
; ---- At this pt we need to check ROM space one more time but with the C/D slot bit XOR'ed in the ----
; ---- Miscellaneous Setup Register ($50F26009), we need to do this because we cannot tell if we ----
; ---- have a PDS/PCMCIA flash card installed or a ROM exp. SIMM. With this bit cleared no DSACK ----
; ---- is generated by the ASIC and with it set DSACK is generated by the PDS card attached. ----
move.l #$50F26009,A0 ; Miscellaneous Setup Register in VIA2 space
bfchg (A0){4:1} ; complement the C/D bit field in setup register
bsr.s FindROMDisk ; check for bootable ROM disk
beq.s @foundROMDisk ;
move.l #$50F26009,A0 ; Miscellaneous Setup Register in VIA2 space
bfchg (A0){4:1} ; set field back to original setting
bra.s @NoROMDisk ;
;
; At this point, A0 points to the beginning of the header for the RomDisk driver.
; (A0 gets set in routine FindROMDisk)
;
@foundROMDisk
with GintyHeader
move.l HdrBootCode(A0),D0 ; get the offset to search routine
beq.s @NoROMDisk ; it's zero, so no search routine
adda.l HdrBootCode(A0),A0 ; point to search routine
jsr (A0) ; call the ROM Disk search/open routine
tst.w D0 ; see if it found the boot blocks
beq.s @FoundDevice ; ready to boot (A6 points to boot blocks)
; ------------ If we get here, we didn't find a ROMDisk ------------
;
@noROMDisk st d0 ; set d0 to TRUE to indicate no ROM disk
@FoundDevice
rts
;------------------------------------------------------------------------------------------------
; Search through ROM looking for the special ROM disk header info.
; If found, check for boot blocks. Adapted from code in EDiskDrvr.a.
;
; Returns EQ if we found a ROM disk with boot blocks, NE if not.
; If ROM disk found then A0 contains a ptr to the ROM Disk header.
;
; Destroys D0,A0
FindROMDisk
movem.l d1/a2-a4,-(sp) ; save registers
movea.l RomBase,a2 ; start searching at the base of ROM
move.l a2,d1
addi.l #ROMSize,d1 ; end of ROM space to search
@RomDiskLoop
move.w sr,-(sp) ; save old interrupt mask
ori.w #HiIntMask,sr ; disable interrupts (stealing BusErrVct)
move.l BusErrVct,-(sp) ; save old bus error vector
lea @NotFound,a0 ; new handler address
move.l a0,BusErrVct ; setup bus error handler
movea.l sp,a4 ; mark the stack
lea HeaderTemplate,a3 ; point to expected values
lea HdrBlockSize(a2),a0 ; point to header data
moveq.l #(HdrDeviceSize-HdrBlockSize)/4-1,d0 ; loop counter
@SigCmpLoop
cmpm.l (a0)+,(a3)+ ; compare the values
dbne d0,@SigCmpLoop ; compare the blocks
@NotFound
movea.l a4,sp ; pop stack in case of bus error
move.l (sp)+,BusErrVct ; restore bus error vector
move.w (sp)+,sr ; restore interrupt mask
addq.w #1,d0 ; see if we had a match
bne.s @NextBlock ; no, check next block
move.l a2,a0 ; save our position in ROM
moveq #0,d0 ; set cc to EQ
bra.s @Done ; return EQ
@NextBlock
adda.l #RomDiskAlign,a2 ; point to next block to check
move.l d1,a0
cmpa.l a0,a2 ; see if end reached
blo.s @RomDiskLoop ; search the entire space
moveq #1,d0 ; set cc to NE
@Done
movem.l (sp)+,d1/a2-a4 ; restore registers
rts
endwith ; GintyHeader
string asis ; no length on strings
align 2
HeaderTemplate
dc.w 512 ; signature block size
dc.w 1 ; version number 1
dc.b 'Ginty ' ; 12 byte signature
dc.b 'HYGWGA' ; (brought to you by et. al)
;______________________________________________________________________________________
; All the 7.0 managers are installed here, the Gibbly calls us via a ROM vector at
; the start or the ROM.
;
; Sure would have been nice if each of these generic routines were commented when
; they were added.... (Sigh) Rewrote most of this code today <SM49>. <SAM>
;
;______________________________________________________________________________________
InitSys7Toolbox
_InitAllPacks ; Make sure the Packs are available at this time
BSR.L NewGestaltSelectors ;
; Don't call ShutInit here since it blows away existing shutdown tasks <SM56>
BSR.L ALIASMGRINSTALL
BSR.L SetupGlobals ; Comm Toolbox <SM26>
BSR.L SetupGestalt ; <SM26>
BSR.L InitDialogMgrGlobals
BSR.L InitScrollSpeedGlobals ; scrollbar scrolling speed
BSR.L ExtBTreeInstall
BSR.L PPCINSTALL
BSR.L NMINIT
BSR.L InitValidateMenuBarSemaphore
BSR.L InitSystemMenuList
BSR.L MiscPatchesInstall
CLR.L -(SP) ; unused parameter for system builds
BSR.L __InitComponentManager
BSR.L ClearSysErrorUpdateRect ; ToolboxEventMgrPatches
BSR.L TSMgrInstall
BSR.L HelpMgrInstall
BSR.L ADDFONTSTOCHAIN ; FontFolder <SM15>
; ADBSecondaryInitialization ; <SM49> SAM (from here down...)
BSR.L InitADBDrvr ; Another reinit
; Display Manager
IF hasDisplayMgr THEN ; <52>
SUBQ #2,A7
_DMInstallDisplayManager ; Display Manager
ADDQ #2,A7
ENDIF ; <52>
; SlotMgrSecondaryInitializationIIci
SUB.W #spBlock.spBlockSize,SP ; Make room for a slot parameter block on the stack
MOVEA.L SP,A0 ; Point A0 to the record
BSET #fWarmStart,spBlock.spFlags(A0) ; Set warm start flag
_SecondaryInit ; Wake everybody up again
ADD.W #spBlock.spBlockSize,SP ; Remove the param block from the stack
BSR OpenSlots ; Open all slot drivers...
; ColorQDSecondaryInitialization
JSR DavesRandomVideoStuff ; re-do CheckDevices and video driver patching.
MOVE.L (a5),-(sp) ; point to the same globals we are using now
_InitGraf ; catch all the new devices
_InitPalettes ; me too...
; SetUpIconCluts
PEA ([ExpandMem],ExpandMemRec.emIconCluts)
JSR MakeIconData
; FontMgrSecondaryInitialization
_InitFonts ; Reinit the font manager (in case a new one's just been loaded)
; File System Cache
BSR AdjustBarrier ; Get the limit to bufPtr in A2
BTST #extensionsEnabledBit,ExtensionsEnabledByte ; Have extensions been disabled?
BNE.S @normal ; -> No. Use the default limit
MOVE.L BufPtr,d2 ; Extensions disabled. Limit the cache to 64k
SUB.L #$10000,d2 ; give the cache 64K
BRA.S @continue ; -> Join the common code
@normal MOVE.L BootGlobals.bufPtrLimit(a5),d2 ; Get the current limit
ADD.L #elbowRoomCacheCantHave,d2 ; Reserve 32k or so to assure we can boot
@continue BSR.L CacheInstall ; Install the disk cache
;
;
BSR.L LateLoad ; Wait for SCSI devices present last time (that may not be ready yet)
; Load their drivers if they come up to speed.
; VM Final Initialization
; If VM loaded, we need to call MemoryDispatch with selector (-1) so VM can hold the system heap,
; unhold the boot stack, patch the cursor task, and enable user mode.
TST.L VMGlobals ; Has VM installed itself?
BMI.S @noVM ; -> No. No Memory Dispatch
@hasVM MOVEQ #-1,D0 ; Finish VM initialization selector
_MemoryDispatch ; Call VM.
BRA.S @Done ; ->> Jump to end
@noVM LEA AfterBootSetApplBase,A0 ; Patch _SetAppBase to call _InitZone before and after
MOVE.W #$A057,D0 ; it calls the real SetAppBase. Do this only if VM is
_SetTrapAddress ,NewOS ; not installed, or you'll look like a Cyclone.
@Done RTS ; Return to boot3 (or Gibbly)
; <SM449> SAM (End of today's mods)
; ¥¥ End of InitSys7Toolbox ¥¥
;______________________________________________________________________________________
;--------------------------------------------------------------------
; Open all slot drivers which request to be opened at Start time.
; Destroys no registers.
@ -867,30 +662,20 @@ OpenBDrvrs MOVE.B spSlot(A0),-(SP) ;Save slot
RTS
AdjustBarrier ; <38>
; Adjust BootGlobals.bufPtrLimit(a5) to have:
; MAX( sysHeap.bkLim + minProcessMgrSpace, static limits (i.e. boot globals & vm limits) )
;______________________________________________________________________________________
; All the 7.0 managers are installed here, the Gibbly calls us via a ROM vector at
; the start or the ROM.
;
; Sure would have been nice if each of these generic routines were commented when
; they were added.... (Sigh) Rewrote most of this code today <SM49>. <SAM>
;
;______________________________________________________________________________________
; Trashes: a0/d0
InitSys7Toolbox
move.l SysZone,a0
move.l a0,d0 ; copy baseAddr of SysZone
move.l bkLim(a0),a0
add.l #initialSysHeapSize,d0
cmp.l d0,a0 ; if heap is small because weÕre on a small RAM machine
bhs.s @enoughReservedForSysHeap ; pretend heap is at initialSysHeapSize because it will
; be that big soon anyway.
move.l d0,a0 ; Set to be the minimum weÕd ever consider.
@enoughReservedForSysHeap
add.l #minProcessMgrSpace,a0 ; where the process mgr heap would end if we
; created it right now
cmp.l BootGlobals.bufPtrLimit(a5),a0 ; processMgrHeap.bkLim > current barrier?
bls.s @dont ; if not, donÕt adjust
RTS
move.l a0,BootGlobals.bufPtrLimit(a5) ; set new barrier
@dont
rts
ENDP
@ -907,7 +692,7 @@ AdjustBarrier ; <38>
;------------------------------------------------------------------------------------------
CheckPassword PROC EXPORT
MyStack RECORD 0,DECREMENT
DialogRect DS.W 4
ItemRect DS.W 4

View File

@ -235,57 +235,6 @@ SysErrInit PROC EXPORT ; <C152>
ENDP ; <C152>
;----------------------------------------------------------------------
; Routine Debugger (Arg1, Arg2...ArgN, ParamSize, CmdWord)
; Arguments Highly variable
; Function Dispatch debugger call to current installed debugger,
; else ignore. (_Debugger trap)
;----------------------------------------------------------------------
Debugger PROC EXPORT ; <C152>
EXPORT DebugProlog ; <C152>
MOVEM.L A0-A7/D0-D7,SEVars ; save all regs
BSET #7,MacJmpFlag ; in the debugger <v1.2>
LINK A6,#0 ; no locals
LEA 8(A6),A0 ; pt A0 at args
MOVE.W (A0)+,D0 ; get command word
MOVE.W (A0)+,SECmdSize ; stash size of param list
BSR.S DebugProlog ; set up call for debuggers, set CC=existence
BLE.S DebugErr ; V true, so either Z or (NOT N) means no inited debugger
; Now we know there's a debugger, so call it.
; A0 = ptr to last command parameter, A1 = ptr to debugger entry pt.
BSET #15,D0 ; set high bit of word to flag trap call
JSR (A1) ; call debugger!!!!
DebugAdios UNLK A6 ; restore A6
MOVEM.L SEVars,A0-A7/D0-D7 ; restore all regs
MOVE.L (SP)+,A0 ; get return address
ADD.W SECmdSize,SP ; pop params
ADDQ.L #4,SP ; pop command word & size word
BCLR #7,MacJmpFlag ; out of the debugger <v1.2>
JMP (A0) ; and return
DebugErr MOVEQ #SENoDB,D0 ; return "no debugger" error
BRA.S DebugAdios
; Utility for setting CC's for existance of debugger, pointing A1 to debugger code entry.
; Must preserve D0.
DebugProlog
MOVE.L MacJmp,A1 ; get ptr in A1 <v1.2>
MOVE.B MacJmpFlag,D3 ; get flags <v1.2>
ADD.B D3,D3 ; init flag now high bit, set CC's
RTS ; and return
ENDP ; <C152>
;----------------------------------------------------------------------
; Routine ToDeepShit
; Arguments (SP) (input) Return address to exception receiver
@ -320,23 +269,15 @@ ToDeepShit PROC EXPORT ; <C152>
; Now clear stack of exception info, saving SR and PC unless re-entered. A special case <13Jul85>
; is class 0 exception on the 68000, which has 4 words of info on top of the usual SR/PC. <13Jul85>
TST.B CPUFlag ; 0-000, 1-010, 2-020, etc. <13Jul85>
BNE.S @1 ; <13Jul85>
CMPI.W #2,D0 ; 1 or 2 means nasty bus error frame <13Jul85>
BGT.S @1 ; <13Jul85>
MOVE.L (SP)+,SE000BE ; save fcn code, access address, and instruction word <04Nov85> JTC
MOVE.L (SP)+,SE000BE+4 ; ...the other 4 bytes of the eight <04Nov85> JTC
@1
TST.B MacJmpFlag ; minus means we're re-entering <13Jul85>
BMI.S @3 ; <13Jul85>
TST.B $BFF
BMI.S @3
MOVE (SP)+,SESR ; SR on top for all CPUs <13Jul85>
MOVE.L (SP)+,SEPC ; next is the saved PC <13Jul85>
BRA.S SysErr2 ; bypass nonsaving pop <13Jul85><1.4>
BRA SysErr2 ; bypass nonsaving pop <13Jul85><1.4>
@3 ADDQ.W #6,SP ; kill SR and PC <13Jul85><1.4>
BRA.S SysErr2
BRA SysErr2
NOP ; appease the assembler gods <12> kc
ENDP ; <C152>
@ -396,8 +337,6 @@ SystemError PROC EXPORT ; <C152>
SysErr1 MOVE.W SR,SESR ; save SR <13Jul85>
MOVE.L (SP)+,SEPC ; clean PC for fall-through to SysErr2 <13Jul85>
TST.B CPUFlag ; zero for 68000 <02Nov85> JTC
BEQ.S SysErr2 ; no need for dummy frame on old cpu <02Nov85> JTC
CLR.W -(SP) ; <02Nov85> JTC
; entry point for standard system exceptions (address error, etc)
@ -407,71 +346,9 @@ SysErr2
BMI.S @0 ; yes, skip reg saving
MOVE.L SP,SEA7 ; save true PC
@0 ; deleted obsolete stack-cleansing instructions <13Jul85>
BSET #7,MacJmpFlag ; prevent re-entrancy, vote Republican <v1.2>
BSET.B #7,MacJmpFlag ; prevent re-entrancy, vote Republican <v1.2>
cmpi.w #13,d0 ; was it an NMI? <1.5>
bne.w @continue ; no, proceed <1.5>
TestFor RBVExists ; <1.5>
beq.s @noRBV ; <1.5>
btst.b #ProductInfo.PGCInstalled,UnivRomFlags+3 ; see if we have a PGC chip <9><4><H5><SM4>
beq.s @continue ; no, handle normal NMI-- there is no parity <4><SM5>
move.l VIA,A0 ; get VIA1 base <1.5>
eieioSTP
btst #vPGCEnb,VBufB(a0) ; is parity enabled? <1.5>
eieioSTP
bne.s @continue ; no, proceed <1.5>
eieioSTP
bclr #vPGCErr,vDirB(a0) ; make parity error bit an input <1.5>
eieioSTP
move.b VBufB(a0),d1 ; read parity error flag <2.1>
eieioSTP
bset #vPGCErr,vDirB(a0) ; back to an output <1.5>
eieioSTP
btst #vPGCErr,d1 ; was NMI caused by parity error? <1.5>
bne.s @continue ; no, restore ddr and proceed <1.5>
eieioSTP
bset #vPGCEnb,VBufB(a0) ; yes, disable parity (so we won't get int again<1.5>
eieioSTP
bra.s @parityErr ; and blast the warm start flag
@noRBV
WITH DecoderInfo
TestFor RPUExists ; do we have RPU parity?
beq.s @continue ; no, skip...
movea.l OSS,a0 ; get OSS address
eieioSTP
move.w OSSIntStat(a0),d1
eieioSTP
btst #OSSIntRPU,d1 ; did the RPU cause the interrupt?
beq.s @continue ; no, handle normal NMI
eieioSTP
clr.b OSSMskRPU(a0) ; disable RPU parity interrupts <2>
eieioSTP
movea.l UnivInfoPtr,a0
adda.l ProductInfo.DecoderInfoPtr(a0),a0
movea.l RPUAddr(a0),a0 ; get RPU base
st.b rpuReset(a0) ; reset serial ptr
move.l (a0),d1
bset.l #16,d1 ; clear the parity error
move.l d1,(a0)
@parityErr
IF Supports24Bit THEN ; <SM7>
moveq #true32B,d0 ; 32 bit mode to look at BootGlobs <1.9>
_SwapMMUMode ; switch to 32 bit mode <1.9>
move.l BootGlobPtr,a1 ; get ptr to boot globals (near top of RAM) <1.6><1.8>
clr.l StartGlobals.sgWarmStart(a1) ; <SM3> CSS clear boot-globs warm start flag
_SwapMMUMode ; switch back to previous mode (in d0) <1.9>
ELSE
move.l BootGlobPtr,a1 ; get ptr to boot globals (near top of RAM) <1.6><1.8>
clr.l StartGlobals.sgWarmStart(a1) ; <SM3> CSS clear boot-globs warm start flag
ENDIF
clr.l WarmStart ; clear low memory global warm start flag <1.6>
moveq #dsParityErr,d0 ; yes, set parity error code <1.5><1.7>
@continue ; <1.5>
cmpi.w #dsNoPatch,d0 ; is this Error can't find patch ? <SM6> rb
beq.s @PreCubeE ; change the error message then <SM6> rb
cmpi.w #dsBadPatch,d0 ; is this a can't load patch message ? <SM6> rb
@ -482,10 +359,10 @@ SysErr2
MOVE.W D0,DSErrCode ; Save the possibly modified ErrCode <SM7>
; now we've set up all regs, etc. Time to decide whether to call the debuggers
; or just call the Deepshit code
MOVE.L MacJmp,A1
MOVE.B MacJmpFlag,D3
ADD.B D3,D3
BSR DebugProlog ; any debuggers?
BPL.S Call2DS ; yes, but not initialized (init bit not set)
BNE.S CallDB ; yes, initialized, call 'em

View File

@ -287,23 +287,12 @@ CritErr MOVEM.L A0-A7/D0-D7,SERegs ; save all regs for debug <26Aug85>
LSR.L #2,D3 ; Compute number of longs on screen. <C152>
if hasMMU then ; <1.7>
MOVEQ #true32b,D0 ; set 32-bit addressing mode
_SwapMMUMode ;
MOVE.B D0,-(SP) ; save the previous mode
endif ; <1.7>
MOVEQ #-1,D0 ; This should be black. <C152>
@FillLoop MOVE.L D0,(A2)+ ; Fill a long. <C152>
SUBQ.L #1,D3 ; Countdown. <C152>
BHI.S @FillLoop ; Loop until done. <C152>
if hasMMU then ; <1.7>
MOVE.B (SP)+,D0 ; get the previous addressing mode back
_SwapMMUMode ; flip back to previous addressing mode
endif ; <1.7>
; Okay, here are the values we still consider important at this point:
;
; A3 = pointer to the center of the screen.
@ -343,7 +332,7 @@ CritErr MOVEM.L A0-A7/D0-D7,SERegs ; save all regs for debug <26Aug85>
BSR6 DeadMac ; plot the dead Mac icon
SkipDisplay BigJmp TMRestart,a0 ; go to Test Manager entry point <C27/30may86><1.4><2.0><2.1>
SkipDisplay BRA.S *
TinyTable DC.W $0000,$FFFF,$FFFF,$FFFF ; whiteColor
DC.W $0000,$0000,$0000,$0000 ; black
@ -370,13 +359,6 @@ TinyTable DC.W $0000,$FFFF,$FFFF,$FFFF ; whiteColor
;-----------------------------------------------------------------------------
FailData
if hasMMU then ; <1.7>
MOVEQ #true32b,D1 ; put in D1 for a second
EXG D1,D0 ; get true32b in D0, save D0 in D1
_SwapMMUMode ; switch to 32-bit addressing
MOVE.B D0,-(SP) ; save the previous addressing mode
EXG D1,D0 ; get D0 back in D0
endif ; <1.7>
FailLoop
ROL.L #4,D0 ; get nibble in low order
@ -409,11 +391,6 @@ chLoop MOVE.B (A1),D5 ; get the next byte
DBRA D4,FailLoop ; loop until all characters are drawn
if hasMMU then ; <1.7>
MOVE.B (SP)+,D0 ; get the old addressing mode back
_SwapMMUMode ; restore the addressing mode
endif ; <1.7>
JMP (A6) ; return to caller
;----------------------------------------------------------------------------
@ -458,12 +435,6 @@ DeadMac
LEA SadMacIcon,A0 ;point to the "Sad Mac" icon <1.3>
MOVE.L IconTLAddr,A2 ; figure out where the topLeft corner is <1.3>
if hasMMU then ; <1.7>
MOVEQ #true32b,D0 ; flip to 32-bit mode
_SwapMMUMode ; switch to 32-bit addressing
MOVE.B D0,-(SP) ; save the previous mode
endif ; <1.7>
MOVEQ #6,D1 ; move the icon down 6 lines <1.9>
MULU D2,D1 ; <1.9>
ADDA.L D1,A2 ; <1.3><1.9>
@ -476,10 +447,6 @@ DeadMac
ADDA.W D2,A2 ; move down to the next screen line <1.3><1.9>
DBRA D1,@BlastIcon ; keep looping until all 32 lines are copied<1.3><1.9>
if hasMMU then ; <1.7>
MOVE.B (SP)+,D0 ; switch back to previous addressing mode
_SwapMMUMode ; flip back
endif ; <1.7>
RTS6 ; return to caller <1.3>

File diff suppressed because it is too large Load Diff

View File

@ -27,7 +27,9 @@
StartMgrObjs = "{ObjDir}StartTop.a.o" ś
"{ObjDir}StartInit.a.o" ś
"{ObjDir}StartInterstix.c.o" ś
"{ObjDir}StartSearch.a.o" ś
"{ObjDir}StartLibGlue.c.o" ś
"{ObjDir}StartBoot.a.o" ś
"{ObjDir}StartFail.a.o" ś
"{ObjDir}StartErr.a.o" ś

View File

@ -180,7 +180,7 @@ NumFlashX EQU 3 ; number of times to flash X before going
FloppyRefNum EQU -5 ; floppy driver refnum
IntHDRefNum EQU -33 ; refnum of driver for SCSI ID 0
DefaultTimeOut EQU 20 ; number of seconds timeout if PRAM is pristine
DefaultTimeOut EQU 25 ; number of seconds timeout if PRAM is pristine
MaxTimeOut EQU 31 ; maximum number of seconds allowed as timeout
PollDelay EQU 15 ; delay (in ticks) between poll drive SCSILoads
@ -211,7 +211,7 @@ Locals RECORD {link},INCR
frameSize equ *
flashTime ds.l 1 ; time to flash icon
startTicks ds.l 1 ; Ticks when we first get into FindStartupDevice
startTicks ds.l 1 ; Ticks when we first get into FindStartupDevice ; 8 lower
ckPartition ds.b 1 ; flag = we need to check to see if the partition #s match
noDefaultDrive ds.b 1 ; flag = we have no default drive
@ -220,7 +220,7 @@ forcedBoot ds.b 1 ; flag = boot has been forced to a non-default device
csPB ds CntrlParam ; pb for Control and Status
pmCommandPB ds pmCommandRec ; pb for sending SleepReq to power manager
pmCommandPB ds pmCommandRec ; pb for sending SleepReq to power manager ; 8 lower
startPRAM ;(ds.l 1)
lsdExtDevID ds.b 1 ; slot device ExtDevID (for SCSI target/lun)
@ -229,6 +229,8 @@ lsdRefNum ;(ds.w 1) ; SCSI device refnum
lsdSlotNum ds.b 1 ; slot number
lsdSRsrcID ds.b 1 ; sRsrc ID (for native SCSI, bus #; for plug-in, sRsrc ID)
ds.b 8
link ds.l 1 ; old A4 = (A4)
ENDR
@ -245,9 +247,10 @@ A4_locals EQU A4
A5_bootGlobs EQU A5
A6_bootBlocks EQU A6
;________________________________________________________________________________________
;
; Routine: FindStartupDevice
; Routine: FindStartupDevice 3600
;
; Inputs: none
;
@ -276,11 +279,19 @@ FindStartupDevice PROC EXPORT
BSR LoadSlotDrivers ; Default is a slot device, execute boot code
; When booting a Mac OS, execution will continue here
MOVEQ.L #0, D7
MOVE.L Ticks, startTicks(A4) ; Init the time we got here in case we have PowerMgr
BSR LoadSCSIDrivers ; Load all the drivers we can
BSR WaitForPollDrive ; Wait until the boot drive has warmed up
BRA.S @FirstEntry ; First time through: keep original goal
CLR.B -6(A4)
BSR LoadATADrivers
BSR OpenLANDiskDriver
BRA @FirstEntry ; First time through: keep original goal
@NextPass
IF hasPwrControls THEN ; <SM7>
@ -294,7 +305,7 @@ FindStartupDevice PROC EXPORT
BLS.S @nosleep
@sleepnow
LEA pmCommandPB(A4), A0 ; A0 gets pointer to parameter block
MOVE.W #SleepReq, pmCommand(A0) ; PMGR command, Go to sleep
MOVE.W #PmgrPWRoff, pmCommand(A0)
MOVE.W #4, pmLength(A0) ; Four bytes of data to send
LEA pmData(A0), A1
MOVE.L A1, pmSBuffer(A0) ; pointer to send buffer
@ -307,16 +318,48 @@ FindStartupDevice PROC EXPORT
ENDWITH
ENDIF ; <SM7>
CMPI.W #FloppyRefNum,D4 ; do we have floppy set as the default?
BEQ.S @NoChange ; -> yes, keep looking for floppies
LEA IsItAnything,A3 ; no, from now on, any device will do
@NoChange
Move.L D7, D7
BNE.B @twenty_six
SubA.L A0, A0
_InternalWait
BNE.B @skip_blah
MoveQ.L #$19, D0
@skip_blah
MulU #$3C, D0
Add.L -$56(A4), D0
Cmp.L (Ticks), D0
BCS.B @twenty_six
MoveQ.L #$F, D0
Add.L (Ticks), D0
@before_cmp
Cmp.L (Ticks), D0
BCC.B @before_cmp
Bra.B @after_less_stuff
@twenty_six
MoveQ.L #$1, D7
Lea.L IsItAnything, A3
@after_less_stuff
IMPORT ATAMgr_5d940
Bsr.L ATAMgr_5d940
@after_stuff
BSR LoadSCSIDrivers ; load more drivers if we can
BSR OpenLANDiskDriver
@TryAgain
BSR VisualUpdate ; Update dynamic user feedback
IMPORT PMIDLERELATEDDRIVERCALL
BSR.L PMIDLERELATEDDRIVERCALL
IMPORT INTERC_2750
BSR.L INTERC_2750
@FirstEntry
BSR DaFuq
BSR FindNextCandidate ; Find the next potential Startup Device.
BEQ.S @NextPass ; Branch if we're at the end of the queue.
@ -351,7 +394,7 @@ FindStartupDevice PROC EXPORT
;________________________________________________________________________________________
;
; Routine: EmbarkOnSearch
; Routine: EmbarkOnSearch 36f2
;
; Inputs: none
;
@ -381,6 +424,7 @@ EmbarkOnSearch
SUBQ.W #4,SP ; make room for parameters on the stack
MOVE.L SP,A0 ; and point to them
_GetDefaultStartup ; get info about the default device
CLR -4(A4)
MOVE.L (SP), startPRAM(A4) ; store for later partition check
MOVE.W (SP)+,D3 ; D3.L = <xx><xx><device-ID><partition>
MOVE.W (SP)+,D4 ; get the driver's refNum/<slot#><sRsrc#>
@ -413,19 +457,8 @@ EmbarkOnSearch
SUBA.L A2,A2 ; initialize the drive queue pointer
LEA IsItFloppyOrDefault,A3 ; ASSUME match default or floppy devices.
LEA IsItDefault,A3
CASE OBJ
IMPORT Ck4OnlyLoadFromDefault ; :SCSIMgr4pt3:BootItt.a
BSR.L Ck4OnlyLoadFromDefault ; supposed to limit our search to default device?
CASE OFF
BEQ.S @ck4NoDefault
LEA IsItDefault, A3 ; match only default device
@ck4NoDefault
TST.B noDefaultDrive(A4) ; is there a default drive? <MC2>
BEQ.S @HaveDefault ; -> yes
LEA IsItAnything,A3 ; no, match any device
@HaveDefault
MOVE.L Ticks,flashTime(A4) ; let flash time expire immediately.
CLR.W D6 ; clear visual state information.
@ -453,9 +486,8 @@ EmbarkOnSearch
move.w D4, D1 ; get refNum (maybe)
not.w D1 ; convert refNum to unit number
sub.w #$20, D1 ; convert to SCSI ID
blt.s @exit ; out of range -> use previous value
cmpi.w #$07, D1
bgt.s @exit ; out of range -> use previous value
bhi.s @exit ; out of range -> use previous value
move.b SCSIPoll, D0
and.b #$F8, D0 ; strip out old internal HD SCSI ID
@ -468,7 +500,7 @@ EmbarkOnSearch
;________________________________________________________________________________________
;
; Routine: LoadSlotDrivers
; Routine: LoadSlotDrivers 377e
;
; Inputs: D3 - bits 31-24: -reserved-
; 23-16: default OS
@ -548,7 +580,7 @@ LoadSlotDrivers
;________________________________________________________________________________________
;
; Routine: LoadSCSIDrivers
; Routine: LoadSCSIDrivers 37ee
;
; Inputs: D3 - bits 31-24: -reserved-
; 23-16: default OS
@ -569,9 +601,7 @@ LoadSlotDrivers
LoadSCSIDrivers
IF hasAsyncSCSI THEN
BSR.L ISITT ; check if we're running SCSI 4.3
TST.B D0 ; are we?
BEQ.S @UseOldSCSI ; -> no, use the old code to load drivers
CLR.B forcedBoot(A4)
PEA forcedBoot(A4) ; ptr to flag indicating a forcedBoot
CLR.L -(SP) ; load all drivers
@ -589,31 +619,104 @@ LoadSCSIDrivers
RTS
@UseOldSCSI
ENDIF
; there is a new mechanism to disable loading of poll drive, so, check power
; user command, "command, shift, option and delete keys", if those keys are
; not down, go load the poll drive.
; Make sure that command, shift, option and delete keys are not down
MOVEQ #-1,D0 ; try to load all SCSI devices
CMPI.W #CmdShiftOptDel,KeyMap+6 ; are command, shift, option and delete keys down?
BNE.S @GoLoadD ; -> no, continue
MOVEQ #$07,D1
AND.B SCSIPoll,D1 ; get the SCSI ID of the poll drive
BCLR D1,D0 ; and clear the bit in the available drive list
@GOLoadD move.l d6,-(sp) ; save d6 <LW3>pdw
move.l a0,-(sp) ; save a0
moveq.l #0, D6 ; allow drivers to munge heap <LW3>pdw
BSR.L SCSILoad ; try to load driver(s) from disk
move.l (sp)+,a0 ; restore a0
move.l (sp)+,d6 ; restore d6 <LW3>pdw
RTS
LoadATADrivers
BTst.B #$7, ($B23)
BEQ @L3
MoveM.L D1-D7/A0-A6, -(A7)
Move D4, -$8(A4)
Move.L -$C(A4), D5
Move.L #$FF, D2
Move.L D5, D1
AndI #$F800, D1
CmpI #$2000, D1
BEQ.B @L0
AndI.L #$FFFF00FF, D3
CmpI #$FFCA, D5
BEQ.B @L0
Bra.B @L2
@L0 _DisableDynWait
_GetTimeOut
BNE.B @L1
MoveQ.L #$19, D0
@L1 Move.L D0, -(A7)
MoveQ.L #$0, D0
Move.B -$9(A4), D0
LsL #$8, D0
Move.B -$C(A4), D0
Move.L D0, -(A7)
IMPORT ATAMgr_5d9b0
BSR.L ATAMgr_5d9b0
AddQ #$8, A7
CmpI #$0, D0
BEQ.B @L2
Move D0, -$8(A4)
IMPORT ATAMgr_5d940
@L2 BSR.L ATAMgr_5d940
MoveM.L (A7)+, D1-D7/A0-A6
Move -$8(A4), D4
@L3 Rts
PostATA
MoveM.L D0-D3/A0-A2, -(A7)
MoveA.L ([$2B6],$288), A2
Move.L A2, D0
BEQ.B @return
Move $6(A2), D1
MoveQ.L #$0, D2
@loop MoveA.L $14(A2,D2.L), A1
Move.L A1, D0
BEQ.B @return
Move $C8(A1), D0
Clr D3
Cmp D3, D0
BEQ.B @skip
MoveA.L $C4(A1), A0
Move.L A0, D0
BEQ.B @return
Jsr (A0)
Bra.B @return
@skip AddQ #$4, D2
SubQ #$1, D1
BNE.B @loop
@return MoveM.L (A7)+, D0-D3/A0-A2
Rts
OpenLANDiskDriver
Lea.L @DriverName, A1
Lea.L -$32(A7), A7
MoveA.L A7, A0
Move.L A1, $12(A0)
DC.W $A000
Tst D0
BNE.B @L7
Move $18(A0), D4
@L7 Lea.L $32(A7), A7
Rts
STRING Pascal
@DriverName DC.B '.LANDisk'
ALIGN 2
;________________________________________________________________________________________
;
; Routine: WaitForPollDrive
; Routine: WaitForPollDrive 38f0
;
; Inputs: none
;
@ -655,9 +758,7 @@ WaitForPollDrive
@WaitForIt
IF hasAsyncSCSI THEN
BSR.L ISITT ; check if we're running SCSI 4.3
TST.B D0 ; are we?
BEQ.S @UseOldSCSI ; -> no, use the old code to load drivers
CLR.B forcedBoot(A4)
PEA forcedBoot(A4) ; ptr to flag indicating a forcedBoot
PEA 1 ; only look for the startup device
BSR.L ITTBOOT ; get the startup device's refnum in D0
@ -676,47 +777,7 @@ WaitForPollDrive
@UseOldSCSI
ENDIF
; make sure that command, shift, option and delete keys are not down
MOVE.W KeyMap+6,D0 ; get keys down
CMP.W #CmdShiftOptDel,D0 ; are command, shift, option and delete keys down?
BEQ.S @RawExit ; -> exit if so
MOVEQ #$07,D1
AND.B SCSIPoll,D1 ; Get SCSI ID of poll drive
MOVEQ #0,D0 ; Clear register
BSET D1,D0 ; Set the bit for the drive
; Call SCSILoad with bit map in D0 and heap_munge_flag in D6
move.l d6,-(sp) ; save d6 <LW3>pdw
move.l a0,-(sp) ; save a0
moveq.l #0, D6 ; allow drivers to munge heap <LW3>pdw
BSR.L SCSILoad ; Try to load driver for poll disk
move.l (sp)+,a0 ; restore a0
move.l (sp)+,d6 ; restore d6 <LW3>pdw
BEQ.S @MyExit ; Branch if warmed up, but driver is invalid
MOVEQ #IntHDRefNum,D0 ; Refnum for ID 0
SUB.W SCSIPoll,D0 ; Convert to refnum for poll drive
MOVE.W D0,D1 ; Put back in D1 for comparison
; Let's see if the poll hard disk is actually in the queue
@ExamDQ SUBA.L A2,A2 ; Start at beginning of drive queue
@FindIntHD
BSR NextDQEntry ; Get the next drive queue entry
BEQ.S @EndOfQueue ; Branch if we're out of queue entries
CMP.W dqRefNum(A2),D1 ; Is it our trusty poll hard disk?
BNE.S @FindIntHD ; Nope, see if the next one's it
@Warm_n_Toasty ; We found the drive; it must have warmed up
BRA.S @MyExit ; That's all folks
@ckTimeout
@EndOfQueue
CMP.L Ticks,D5 ; Should the poll HD be visible by now?
BLO.S @NoDrivePresent ; Yes, so quit waiting for it
MOVEQ.L #PollDelay,D0 ; Get number of ticks to wait before retrying
@ -739,7 +800,7 @@ WaitForPollDrive
;________________________________________________________________________________________
;
; Routine: FindNextCandidate
; Routine: FindNextCandidate 3966
;
; Inputs: A2 - Points to the drive queue entry which was tried last time; the search
; for an appropriate device will begin with the NEXT drive queue entry.
@ -786,7 +847,7 @@ FindNextCandidate
;________________________________________________________________________________________
;
; Routine: NextDQEntry
; Routine: NextDQEntry 3996
;
; Inputs: A2 - points to the drive queue entry which was tried last time (nil if
; at the end of the queue)
@ -810,7 +871,7 @@ NextDQEntry MOVE.L A2,D0 ; is the pointer NIL?
;________________________________________________________________________________________
;
; Routine: SelectDevice
; Routine: SelectDevice 39a4
;
; Inputs: A2 - points to the current drive queue entry
;
@ -839,7 +900,7 @@ SelectDevice
;________________________________________________________________________________________
;
; Routine: CheckMouseEject
; Routine: CheckMouseEject 39c2
;
; Inputs: A0 - pointer to A6-based I/O parameter block
;
@ -857,7 +918,7 @@ CheckMouseEject
;________________________________________________________________________________________
;
; Routine: EjectMe
; Routine: EjectMe 39c8
;
; Inputs: A0 - pointer to A6-based I/O parameter block
;
@ -876,7 +937,7 @@ DontEject RTS ; Return with status
;________________________________________________________________________________________
;
; Routine: GetStartupInfo
; Routine: GetStartupInfo 39d6
;
; Inputs: A0 - pointer to A6-based I/O parameter block
; A6 - pointer to buffer for holding the boot blocks
@ -904,7 +965,7 @@ GetStartupInfo
;________________________________________________________________________________________
;
; Routine: ReactToFailure
; Routine: ReactToFailure 3a00
;
; Inputs: D0 - error code indicating what went wrong
; D4 - default device's driver reference number
@ -941,7 +1002,7 @@ ReactToFailure
;________________________________________________________________________________________
;
; Routine: Ck4SupportsPartition
; Routine: Ck4SupportsPartition 3a30
;
; Inputs: A2 - pointer to the current drive queue entry (must not be nil!)
; D4 - default device's driver reference number
@ -969,6 +1030,7 @@ Ck4SupportsPartition
; now check this driver to see if it "follows new rules" and responds
; to driverGestalt status call
;
move.l (A0), A0
move.w dCtlFlags(A0), D0 ; does it Follow New Rules?
btst #FollowsNewRules, D0 ; (word-relative bit #)
beq.s @notSupported ; no -> skip driverGestalt call
@ -997,7 +1059,7 @@ Ck4SupportsPartition
;________________________________________________________________________________________
;
; Routine: IsItDefault
; Routine: IsItDefault 3a8e
;
; Inputs: A2 - pointer to the current drive queue entry (must not be nil!)
; D4 - default device's driver reference number
@ -1010,9 +1072,29 @@ Ck4SupportsPartition
;________________________________________________________________________________________
IsItDefault
tst -4(A4)
bne.s @skipsomestuff
pea.l -4(A4)
import StartLib_GetStartupDevice
jsr StartLib_GetStartupDevice
lea.l $4(SP), SP
tst D0
bne.s @notTheDisk
@skipsomestuff
move -4(A4), D0
cmp 6(A2), D0
beq.s @isTheDisk
bra.s @notTheDisk
cmp.w dqRefNum(A2), D4 ; is this driver for the default device?
bne.s @notTheDisk ; no-> definitely no the disk then
import ZeroD0
bsr ZeroD0
bne.s @notTheDisk
move.b #1, foundDrvr(A4) ; so we know to clr ckPartition if end-of-Q
tst.b ckPartition(A4) ; do we need to check the partition num?
beq.s @isTheDisk ; no-> well then, it is the right disk
@ -1033,7 +1115,7 @@ IsItDefault
;________________________________________________________________________________________
;
; Routine: IsItFloppyOrDefault
; Routine: IsItFloppyOrDefault 3adc
;
; Inputs: A2 - pointer to the current drive queue entry (must not be nil!)
; D4 - default device's driver reference number
@ -1054,7 +1136,7 @@ IsItFloppyOrDefault
;________________________________________________________________________________________
;
; Routine: IsItFloppy
; Routine: IsItFloppy 3ae4
;
; Inputs: A2 - pointer to the current drive queue entry (must not be nil!)
; D4 - default device's driver reference number
@ -1072,7 +1154,7 @@ ItsDefault RTS ; and return BEQ if so
;________________________________________________________________________________________
;
; Routine: IsItAnything
; Routine: IsItAnything 3aec
;
; Inputs: A2 - pointer to the current drive queue entry (must not be nil!)
; D4 - default device's driver reference number
@ -1085,14 +1167,23 @@ ItsDefault RTS ; and return BEQ if so
;________________________________________________________________________________________
IsItAnything
CMP D0,D0 ; return BEQ
CMP 8(A2), D4
BNE.S @beq
BSR ZeroD0
BNE.S @bne
@beq MOVEQ.L #0, D0
RTS
@bne MOVEQ.L #1, D0
RTS
;________________________________________________________________________________________
;
; Routine: VisualUpdate
; Routine: VisualUpdate 3b00
;
; Inputs: flashTime(A4) - the absolute time of the next flash of the ? or X
; D6 - the current state of the icons on the screen
@ -1129,15 +1220,18 @@ VisualUpdate
@NoSwitch BCHG #FlashParity,D6 ; Switch parity.
BNE.S @XorQ ; Branch if we need X or ? showing.
LEA DiskIcon,A0 ; plot the plain disk icon
MOVE #-20021,D0
BRA.S PlotMyIcon
@XorQ TST.B D6 ; Are we showing an ?
BEQ.S @ShowQ ; Branch if so.
SUBQ.B #1,D6 ; Eventually, we go back to a ?.
LEA XDiskIcon,A0 ; but for now, plot the disk icon with the X
MOVE #-20023,D0
BRA.S PlotMyIcon
@ShowQ LEA QDiskIcon,A0 ; plot the disk icon with the question mark
MOVE #-20022,D0
BRA.S PlotMyIcon
@DoneDisk RTS
@ -1145,7 +1239,7 @@ VisualUpdate
;________________________________________________________________________________________
;
; Routine: HappyMac
; Routine: HappyMac 3b54
;
; Inputs: none
;
@ -1158,39 +1252,15 @@ VisualUpdate
HappyMac BSR.S EraseMyIcon ; erase what's on the screen where the icon goes
LEA HappyIcon,A0 ; plot the happy mac icon
BSR.S PlotMyIcon
RTS
MOVE #-20020,D0
;________________________________________________________________________________________
;
; Routine: EraseMyIcon
;
; Inputs: none
;
; Outputs: none
;
; Trashes: none
;
; Function: erases the ICN# in the center of the main screen
;________________________________________________________________________________________
EraseMyIcon MOVEM.L D0-D2/A0-A1,-(SP)
BSR.S PushIconRect ; push the icon's rectangle onto the stack
MOVE.L SP,-(SP) ; and point to it
MOVE.L grafGlobals(A5),A0 ; point to the QuickDraw globals
PEA gray(A0) ; and use 50% gray as the background
_FillRect ; erase the rectangle with the desktop pattern
ADDQ.W #8,SP ; clean up the stack
MOVEM.L (SP)+,D0-D2/A0-A1
RTS
;________________________________________________________________________________________
;
; Routine: PlotMyIcon
; Routine: PlotMyIcon 3b5e
;
; Inputs: A0 - pointer to ICN# to plot
; D0 - ID of cicn to try first
;
; Outputs: none
;
@ -1199,7 +1269,27 @@ EraseMyIcon MOVEM.L D0-D2/A0-A1,-(SP)
; Function: plots an icon, centered on the main video device
;________________________________________________________________________________________
PlotMyIcon MOVE.L A0,D2 ; save the pointer to the ICN#
PlotMyIcon
MOVE.L A0,-(SP)
MOVE #$FFFF,ROMMapInsert
SUBQ #4,SP
MOVE D0,-(SP)
_GetCIcon
MOVE.L (SP)+,D2
MOVE.L (SP)+,A0
BEQ.S @useOld
MOVE.L D2,-(SP)
BSR PushIconRect
MOVE.L SP,-(SP)
MOVE.L D2,-(A7)
_PlotCIcon
ADDQ #8,SP
_DisposeCIcon
RTS
@useOld MOVE.L A0,D2 ; save the pointer to the ICN#
; put the source bitmap on the stack (icon's bit image)
@ -1232,6 +1322,46 @@ PlotMyIcon MOVE.L A0,D2 ; save the pointer to the ICN#
RTS
;________________________________________________________________________________________
;
; Routine: EraseMyIcon 3bbc
;
; Inputs: none
;
; Outputs: none
;
; Trashes: none
;
; Function: erases the ICN# in the center of the main screen
;________________________________________________________________________________________
EraseMyIcon MOVEM.L D0-D2/A0-A2,-(SP)
BSR.S PushIconRect ; push the icon's rectangle onto the stack
MOVE.L SP,-(SP) ; and point to it
MOVE.L grafGlobals(A5),A2 ; point to the QuickDraw globals
TST.B ($B3E)
BNE.S @anyway
MOVE.L ExpandMem,A0
TST.B $341(A0)
BEQ.B @otherthing
@anyway PEA.L @theColor
_RGBForeColor
PEA.L -16(A2)
BRA.S @ffs
@otherthing
PEA.L -24(A2)
@ffs
_FillRect ; erase the rectangle with the desktop pattern
ADDQ.W #8,SP ; clean up the stack
MOVEM.L (SP)+,D0-D2/A0-A2
RTS
@theColor DC.W $8888, $8888, $8888
;________________________________________________________________________________________
;
; Routine: PushIconRect
@ -1322,7 +1452,54 @@ XDiskIcon DC.L $7FFFFFF0,$81000108,$81007104,$81008902,$81008901,$81008901,$8100
DC.L $FFFFFFFF,$FFFFFFFF,$FFFFFFFF,$FFFFFFFF,$FFFFFFFF,$FFFFFFFF,$FFFFFFFF,$FFFFFFFE
ENDWITH
ENDPROC
; ENDPROC
DaFuq ; proc export ; but has no callers yet?
; IMPORT NextDQEntry
; IMPORT SelectDevice
; IMPORT GetStartupInfo
MOVEM.L D0-D2/A0-A2,-(SP)
SUB.L A2,A2
@loop
MOVE #$A002,D0
_GetOSTrapAddress
MOVE.L ROMBase,A1
CMP.L A0,A1
BCS.S @return
BSR NextDQEntry
BEQ.S @return
BSR SelectDevice
BSR GetStartupInfo
BRA.S @loop
@return
MOVEM.L (SP)+,D0-D2/A0-A2
RTS
; ALIGN 16
ZeroD0 PROC EXPORT
MOVEQ.L #0, D0
RTS
; ALIGN 16
@ -1335,6 +1512,7 @@ XDiskIcon DC.L $7FFFFFF0,$81000108,$81007104,$81008902,$81008901,$81008901,$8100
;
; Destroys D0-D2/A0-A1.
;----------------------------------------------------------------------
; 4070
InternalWait PROC EXPORT
@ -1373,6 +1551,7 @@ MaxDispVal EQU 9 ; Entries 0-9 exist.
;
; Destroys D0/A0.
;---------------------------------------------------------------------- <A345>
; 4098
iGetTimeOut
BSR.S GetRawTimeOut ; Get the current timeout parameter
@ -1387,6 +1566,7 @@ iGetTimeOut
;
; Destroys D0/A0.
;----------------------------------------------------------------------
; 40a0
iGetWaitFlags
BSR.S GetRawTimeOut ; Get the current timeout parameter
@ -1401,6 +1581,7 @@ iGetWaitFlags
;
; Destroys D0-D1/A0.
;----------------------------------------------------------------------
; 40a8
iSetTimeOut
MOVE.B D0,-(SP) ; Save timeout value
@ -1423,6 +1604,7 @@ iSetTimeOut
;
; Destroys D0-D1/A0.
;----------------------------------------------------------------------
; 40bc
iSetWaitFlags
MOVE.B D0,-(SP) ; Save wait flags
@ -1479,6 +1661,7 @@ GetRawTimeOut
;
; Destroys D0/A0.
;----------------------------------------------------------------------
; 40f0
iDisableDynWait
_GetWaitFlags ; Get the current wait flags.
@ -1492,6 +1675,7 @@ iDisableDynWait
;
; Destroys D0/A0.
;----------------------------------------------------------------------
; 4102
iEnableDynWait
_GetWaitFlags ; Get the current wait flags.
@ -1505,6 +1689,7 @@ iEnableDynWait
;
; Destroys D0/A0.
;----------------------------------------------------------------------
; 4114
iDisablePermWait
_GetWaitFlags ; Get the current wait flags.
@ -1518,6 +1703,7 @@ iDisablePermWait
;
; Destroys D0/A0.
;----------------------------------------------------------------------
; 4126
iEnablePermWait
_GetWaitFlags ; Get the current wait flags.
@ -1545,6 +1731,7 @@ iEnablePermWait
;
; Destroys D0-D2/A0-A1.
;----------------------------------------------------------------------
; 4140
GetDefaultStartup PROC EXPORT
@ -1575,6 +1762,7 @@ GetDefaultStartup PROC EXPORT
;
; Destroys D0-D2/A0-A1.
;----------------------------------------------------------------------
; 4150
SetDefaultStartup PROC EXPORT
@ -1603,6 +1791,7 @@ SetDefaultStartup PROC EXPORT
;
; Destroys D0-D2/A0-A1.
;----------------------------------------------------------------------
; 4160
GetOSDefault PROC EXPORT
@ -1642,6 +1831,7 @@ GetOSDefault PROC EXPORT
; creating Chaos.
;
;----------------------------------------------------------------------
; 4170
SetOSDefault PROC EXPORT
@ -1665,104 +1855,6 @@ AppPhne EQU $09961010
ENDPROC
;________________________________________________________________________________________
;
; Routine: Ck4LimitPRAMClear
;
; Inputs: none
;
; Outputs: Z: NE = only boot from Default device
; EQ = boot from Floppy or Default
; D0: NE = only boot from Default device
; EQ = boot from Floppy or Default
;
; Trashes: D0, A0
;
;________________________________________________________________________________________
Ck4LimitPRAMClear PROC EXPORT
IMPORT ValidatePRAM76 ; StartSearch.a
bsr ValidatePRAM76
subq.w #2,sp ; allocate buffer on stack
movea.l sp, A0 ; get buffer ptr
MOVE.L #$00010076, D0 ; Read 1 bytes starting at loc $76
_ReadXPRam
move.b (sp)+, D0
and.b #1, D0 ; low bit
rts
ENDPROC
;________________________________________________________________________________________
;
; Routine: ValidatePRAM76
;
; Inputs: none
;
; Outputs: none
;
; Trashes: none
;
; Function: Validates byte $76 of xpram: counts set bits in lower 6 and compares with
; upper two bits. If not equal, zeros out the byte.
;
; Note: Byte $76 (previously reserved but used by OSDefault stuff) is
; being defined as sensitive boot bits generally having to do with
; security issues driven by AIX but these functions can be used
; by other OSes as well. The upper two bits of byte $76 are a
; "checksum" of the other 6 bits (i.e. count of bits set). This
; is desired because of the danger if one of these bits is set
; accidentally by some bogus client. Failing this checksum will
; cause the byte to revert to 00 - a safe value. Currently defined
; bits are:
; 0: limit PRAM clear - don't clear PSWD, AUXPRAM, OSType, DefBoot
; 1: only load drivers from default device, don't boot from floppy
; 2: ignore CmdShiftOptDel
;
;________________________________________________________________________________________
vp76trashedRegs REG D0-D2/A0
ValidatePRAM76 PROC EXPORT
movem.l vp76trashedRegs, -(sp)
subq.w #2, sp ; allocate buffer on stack
movea.l sp, A0 ; get buffer ptr
MOVE.L #$00010076, D0 ; Read 1 bytes starting at loc $76
_ReadXPRam ; Get it from PRAM.
move.b (sp)+, D0
move.b #0, D2 ; zero reg for addx
moveq.l #0, D1 ; clear checksum
and.b #$3F, D0 ; get data bits (strip sum bits)
@bitloop
lsr.b #1, D0 ; get a bit
addx.b D2, D1 ; add that bit to checksum
tst.b D0 ; loop until no more bits
bne.s @bitloop
and.b #3, D1 ; only 2 low bits are valid
move.b (A0), D0 ; get byte 76 again
lsr.b #6, D0 ; get only checksum bits
cmp.b D0, D1 ; valid signature?
beq @valid ; Yes, don't clear all
move.b #00, -(sp) ; clean up bogus value
movea.l sp, A0 ; get buffer ptr
move.l #$00010076, D0 ; get #, addr PRAM bytes
_WriteXPram ; write out zeros to 76
move.b (sp)+, D0
@valid
movem.l (sp)+, vp76trashedRegs
rts
ENDP
;----------------------------------------------------------------------
; Get information about the current default video device.
;
@ -1779,6 +1871,7 @@ ValidatePRAM76 PROC EXPORT
;
; Destroys D0-D2/A0-A1.
;----------------------------------------------------------------------
; 4190
GetVideoDefault PROC EXPORT
@ -1808,6 +1901,7 @@ GetVideoDefault PROC EXPORT
;
; Destroys D0-D2/A0-A1.
;----------------------------------------------------------------------
; 41a0
SetVideoDefault PROC EXPORT

View File

@ -219,7 +219,7 @@ ASyncPatch ; <A368>
;______________________________________________________________________
;
; Routine: ReadParam
; Routine: ReadParam b332
; A0 (input) -- pointer to buffer which returns parameters
; D0 (input) -- bits 0-19 indicate which of parameter bytes
; 0-19 to return in the buffer. bytes are
@ -246,7 +246,7 @@ XPLoop LSR.L #1,D0 ; read a byte for each one set
;______________________________________________________________________
;
; Routine: WriteParam
; Routine: WriteParam b34c
; Input: A0 (input) -- pointer to PRAM buffer
; Arguments: D0 (output) -- result code
; Function: This routine writes the parameter ram copy in SysParam
@ -273,7 +273,7 @@ WriteParamTrap
;______________________________________________________________________
;
; Routine: ReadDateTime
; Routine: ReadDateTime b374
; A0 (input) -- pointer to buffer in which time is returned
; Arguments: D0 (output) -- result code
; Function: This routine updates Time in memory and then writes
@ -288,7 +288,7 @@ ReadDateTimeTrap
;______________________________________________________________________
;
; Routine: SetDateTime
; Routine: SetDateTime b37e
; Arguments: D0 (input) -- 32-bit value to write to clock
; D0 (output) -- result code
; Function: This routine updates Time in memory and then writes
@ -302,7 +302,7 @@ SetDateTimeTrap
;______________________________________________________________________
;
; Routine: Delay
; Routine: Delay b386
; Arguments: A0 (input) -- number of tick counts to delay
; D0 (output) -- value of Ticks after delay
; interrupt level 0 is set
@ -311,19 +311,29 @@ SetDateTimeTrap
;
;______________________________________________________________________
DelayTrap ANDI.W #$F8FF,SR ; have to let interrupts in <SM7> rb
MOVE.L Ticks,D0
ADD.L A0,D0
DelayTrap MOVEM.L D1-D3/A0-A1,-(SP)
ANDI.W #$F8FF,SR ; have to let interrupts in <SM7> rb
MOVE.L Ticks,D3
ADD.L A0,D3
BRA.S @enter
@1 CMP.L Ticks,D0 ; have enough ticks ticked?
@1 CLR.L -(SP)
MOVE.L #$10,-(SP)
MOVE #$FFCB,-(SP)
DC.W $AA7F ; InternalWait?
ADDQ.L #4,SP
@enter CMP.L Ticks,D3 ; have enough ticks ticked?
BHI.S @1 ; -> No. Keep waiting. <SM9> (now use unsigned comparison)
MOVE.L D3,D0
MOVEM.L (SP)+,D1-D3/A0-A1
RTS
;______________________________________________________________________
;
; Routine: UprString
; Routine: UprString b3b4
; Arguments: D0.W (input) -- string length
; A0.L (input) -- pointer to string to canonize
; Opcode bit 10 -- 0 - map to upper case; 1 - case sensitive
@ -363,7 +373,7 @@ USLoopEntry
;______________________________________________________________________ <27Feb85>...
;
; Routine: CmpString, RelString
; Routine: CmpString b3ca, RelString b3e0
; Arguments: D0.L (input) -- high-order word = string 0 length
; low-order word = string 1 length
; A0.L (input) -- pointer to string 0
@ -952,7 +962,7 @@ CmpTab
;_______________________________________________________________________
;
; Routine: ReadPram
; Routine: ReadPram b856
;
; Arguments: A1 (input) -- pointer to buffer where 20 bytes are placed
; all regs preserved
@ -983,7 +993,7 @@ ReadPram MOVE.L A0,-(SP) ; <H2>
;_______________________________________________________________________
;
; Routine: InitUtil
; Routine: InitUtil b87c
;
; Arguments: D0 (output) -- result code (0 if clock was already initialized)
;
@ -1003,7 +1013,7 @@ InitUtil CLR.W -(SP) ; assume no reset of PRam values <30Oct85> LAK
MOVEQ #0,D0 ; assume valid clock data
CMP.B #$A8,(A1) ; is the clock data valid?
BEQ.S CkNewPram ; branch if so
BEQ.S POSTWRITE
MOVE.W #PRInitErr,(SP) ; report non-zero result <30Oct85> LAK
MOVEQ #4,D1
@ -1013,8 +1023,11 @@ InitUtil CLR.W -(SP) ; assume no reset of PRam values <30Oct85> LAK
BSR WritePram ; and put initial values into clk chip
CkNewPram BTST #6,HWCfgFlags ; new clock chip present? <30oct85> BBM
BEQ.S ClkXit ; exit if not <30oct85> BBM
CkNewPram LEA.L SysParam,A0
MOVE.B #$A8,(A0)
MOVE.L #$10010,D0
_WriteXPRam
POSTWRITE
LEA GetParam,A0 ; get pointer to useful buffer <30oct85> BBM
MOVE.L #$4000C,D0 ; Command to read 4 bytes at addr C <30oct85> BBM
@ -1026,10 +1039,6 @@ CkNewPram BTST #6,HWCfgFlags ; new clock chip present? <30oct85> BBM
BEQ.S ClkXit ; exit if so <30oct85> BBM
MOVE.W #PRInitErr,(SP) ; report non-zero result <30Oct85> LAK
MOVE.L D1,(A0) ; store out true validity bytes <30oct85> BBM
MOVE.L #$4000C,D0 ; Command to write 4 bytes at addr C <30oct85> BBM
_WriteXPRam ; <30oct85> BBM
MOVEQ #32,D1 ; starting address to clear out XPRam <30oct85> BBM
@0 MOVEQ #4,D0 ; number of bytes to write
SWAP D0 ; finish the command byte <30oct85> BBM
@ -1041,25 +1050,24 @@ CkNewPram BTST #6,HWCfgFlags ; new clock chip present? <30oct85> BBM
CMP.B #8,D1 ; Check if we wrote the last address <30oct85> BBM
BNE.S @0 ; if not loop back untill we are done <30oct85> BBM
MOVEM.L A1,-(SP) ;Save A1
LEA PRAMInitTbl,A0 ;Copy the data from the PRAMInit table. <C518>
LEA GetParam,A1 ; into the GetParam buffer. <C518>
MOVEQ #5-1,D0 ;Loop 5 times (20 bytes) <C518><C779>
@10 MOVE.L (A0)+,(A1)+ ;Copy 4 bytes <C518>
DBRA D0,@10 ;Branch if not done. <C518>
LEA ReadTime,A1
MOVE.L #$00140076,D0 ;Write 20 bytes beginning at PRAM address $76 <C518><C779>
LEA GetParam,A0 ; from the buffer <C518>
_WriteXPRam ; into the PRAM. <C518>
SUB.L A0,A1
MOVE.L A1,D0
SWAP D0
ORI #$76,D0
_WriteXPRam
; Write the default memory mgr flags to location $8A. Since this is the only xpram whose default
; is non zero, we write it explicitly (as opposed to writing a default table full of zeros) <MC2>
LEA.L GetParam,A0
MOVE.L #'NuMc',(A0)
MOVE.L #$4000C,D0
_WriteXPRam
LEA MMFlags,A0 ; Point A0 at the Memory Manager flags lomem <MC2>
MOVE.B #MMFlagsDefault,(A0) ; Put the default MMFlags into MMFlags
MOVE.L #MMPRAMloc,D0 ; Write MMFlags to PRAM
_WriteXPRam ; Store it.
MOVEM.L (SP)+,A1 ;Restore A1
IMPORT InterC_29c0_Wireless
MACHINE MC68030
BSR.L InterC_29c0_Wireless
; MACHINE MC68000
ClkXit MOVE.W (SP)+,D0 ; pass back error code <30oct85> LAK
BNE.S @1 ; br if we had to reset clock/pram <30oct85> LAK
@ -1070,7 +1078,7 @@ ClkXit MOVE.W (SP)+,D0 ; pass back error code <30oct85> LAK
; original 20-byte parameter RAM initialization values
PRAMInit DC.B $A8 ; old PRAM validity byte <2.7>
PRAMInit DC.B $77 ; old PRAM validity byte <2.7>
DC.B 0 ; AppleTalk node ID hint for modem port <2.7>
DC.B 0 ; AppleTalk node ID hint for printer port <2.7>
DC.B (0<<4)+(0<<0) ; serial port usage = neither port in use <2.7>
@ -1107,7 +1115,7 @@ PRAMInit DC.B $A8 ; old PRAM validity byte <2.7>
DC.B ((32/4)<<4)+ \ ; ¥ double-click time = 32 ticks <2.7>
(32/4) ; ¥ caret-blink time = 32 ticks <2.7>
DC.B 3 ; ram cache size in 32K blocks (96k default) <SM9>
DC.B 32 ; ram cache size in 32K blocks (96k default) <SM9>
DC.B (1<<7)+ \ ; ¥ color desk pattern = 1 (use if CQD around) <2.7><H5/6>
(1<<6)+ \ ; ¥ mouse scaling = 1 (on) <2.7>
@ -1118,7 +1126,7 @@ PRAMInit DC.B $A8 ; old PRAM validity byte <2.7>
;Start Manager <C518>
PRAMInitTbl DC.B 00 ; [$76] Reserved. <C518>
DC.B 01 ; [$77] Default OS. <C518>
DC.W $FFFF,$FFDF ; [$78-$7B] Default boot. <C774>
DC.W $0000,$6666 ; [$78-$7B] Default boot. <C774>
;Sound Manager? <C518>
DC.W 0 ; [$7C-$7D] Sound alert id <C518>
@ -1135,9 +1143,35 @@ PRAMInitTbl DC.B 00 ; [$76] Reserved. <C518>
;Reserved <C779>
DC.B 0,0 ; [$88-$89] <C779>
OtherDamnTable
DC.L $25000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000070
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000000
DC.L $00000001
DC.W $000A
;________________________________________________________________________________________
;
; Routine: ReadTime
; Routine: ReadTime b9a2
;
; Inputs: none
;
@ -1166,7 +1200,7 @@ ReadTime MOVEM.L A0/A2-A3/D1-D2/D4-D5,-(SP) ; <H4>
;________________________________________________________________________________________
;
; Routine: WriteTime
; Routine: WriteTime b9ca
;
; Inputs: "Time" contains the 32-bit time value to write to the clock
;
@ -1194,7 +1228,7 @@ WriteTime MOVEM.L A0/D1-D5,-(SP) ; <H4>
;________________________________________________________________________________________
;
; Routine: InitCPHardware
; Routine: InitCPHardware b9e6
;
; Inputs: none
;
@ -1220,7 +1254,7 @@ InitCPHardware ; <H4>
;_______________________________________________________________________
;
; Routine: WritePram
; Routine: WritePram ba06
;
; Arguments: SysParam contains the 20 bytes to write.
; all regs preserved
@ -1252,7 +1286,7 @@ WritePram MOVE.L A0,-(SP) ; <H2>
;-----------------------------------------------------------------------------
; SysEnvirons call.
; SysEnvirons call. ba30
;
; Fix File Date Patch# Fix Routine(s) Routine(s) Fixed
;AppleSystemPatch PatchIIROM.a 28Mar87 #PABM150 (SysEnvirons) (SysEnvirons)
@ -1485,163 +1519,4 @@ Exit MOVE.W D2,D0 ; put error number in D0
RTS ; return to caller (Return address should be on stack)
ENDPROC ; SysEnvirons <C982>
;----- <2.4>
;
; The Reliability Manager
;
; This new "manager" is responsible for monitoring the operation of the machine
; and recording pertinent information in parameter RAM.
;
; Written by Bob Herold, May 24, 1989
;
;-----
;-----
; InitReliability - sets time of 1st power on, and initializes the Usage Statistics time
; manager task
;
; The time of 1st power on is kept as the number of 48 hour periods since Jan 1 1989. To
; calculate this, we first get the number of seconds since Jan 1 1989. On 020 and higher
; machines, we could divide by the number of seconds in 48 hours. To work on 68000
; machines, we separate out factors of two to get the divisor into the 16 bit range:
;
; # 48 hrs since Jan 1 1989 = (# secs since Jan 1 1989) / (# secs in 48 hours)
; = (# secs) / (60 * 60 * 24 * 2)
; = (# secs) / (2*2*15) * (2*2*15) * (2*2*2*3) * 2
; = (# secs) / (15 * 15 * 3) * 2^^8
; = ((# secs) / 2^^8) / (15 * 15 * 3)
;---
InitReliability PROC EXPORT
IMPORT RelTimeTask, RelDeferredTimeTask
IF hasPowerMgr THEN
rts
ELSE
;---
; Initialize the 'time of 1st power on'
;---
subq #RelPram>>16,sp ; allocate buffer on stack
move.l Time,d1 ; get current # secs
sub.l #Jan1st89,d1 ; get # secs since Jan 1 1989
blo.s @doneStart ; if earlier, clock chip set wrong!
movea.l sp,a0 ; get buffer ptr
move.l #RelPram,d0 ; get #, addr PRAM bytes
_ReadXPram ; read 'em and weep
move.l (sp),d0 ; get 'da bytes
and.l #Rel1stMask,d0 ; mask all except 1st powered on time
bne.s @doneStart ; if already set, do nothing
lsr.l #8,d1 ; divide # secs by 2^^8
divu.w #15*15*3,d1 ; get # 48 hour periods (see comment above)
moveq #Rel1stBit,d0 ; get shift count
lsl.l d0,d1 ; shift our value into position
and.l #Rel1stMask,d1 ; mask unneeded high bits
and.l #-1-Rel1stMask,(sp) ; zero our bits in result
or.l d1,(sp) ; overlay our value into result
move.l #RelPram,d0 ; get #, addr PRAM bytes
_WriteXPram ; write out 1st power on time
@doneStart addq #RelPram>>16,sp ; de-allocate buffer
;---
; Set up time manager task for power on time measurement
;---
WITH RelGlobals
moveq #rlRecSize,d0 ; get size Reliability Mgr globals
move.b d0,d1 ; save for later
_NewPtr ,sys,clear ; allocate space for it
bne.s @done ; don't bother if no room
move.l ExpandMem,a1 ; get ptr to low memory expansion
move.l a0,ExpandMemRec.emReliability(a1) ; save ptr to Reliability globals there
move.b d1,rlGlobalsSize(a0) ; save size of globals
move.b #rlRecVers,rlGlobalsVers(a0); save version number of globals
bclr #usRelTaskRun,UnSwitchedFlags; signal we are timing
; Initialize a deferred task queue element to schedule execution of the original Time Manager
; task, now called RelDeferredTimeTask. Pass a pointer to the Time Manager task in dtParm so
; that the original code still gets its expected parameter in A1.
move.w #dtQType,rlDeferredTask.qType(a0)
lea RelDeferredTimeTask,a1
move.l a1,rlDeferredTask.dtAddr(a0)
lea rlTimeBlock(a0),a1
move.l a1,rlDeferredTask.dtParm(a0)
lea rlTimeBlock(a0),a0 ; point to time manager task block
lea RelTimeTask,a1 ; point to our time task
move.l a1,tmAddr(a0) ; stuff it into task block
_InsXTime ; install our task
move.l #RelMsCount,d0 ; get # ms between calls
clr.l tmWakeUp(a0) ; signal its the first time
_PrimeTime ; fire up time mgr task
@done rts
ENDWITH ; {RelGlobals}
ENDIF
ENDPROC ; {InitReliability}
;-----
; RelTimeTask - the time manager task for doing all this reliability stuff
;
; Called by the Time Manager
;
; Entry
; a0 - points to this routine (not too useful, huh?)
; a1 - points to task block (now there's something useful!)
;
;
; RelDeferredTimeTask - the deferred Time Manager task for doing all this reliability stuff
;
; Called by the Deferred Task Manager
;
; Entry
; A1 - dtParm points to the originating Time Manager task block
;---
RelTimeTask PROC EXPORT
; If PRAM is in Egret/CUDA, _ReadXPram and _WriteXPram require interrupts enabled
; to execute efficiently. Therefore, the periodic Reliability task now uses the
; Deferred Task Manager to be more interrupt-friendly.
; This helps MIDI SysEx dumps and other interrupt tasks run more punctually.
lea tmXQSize(a1),a0 ; deferred task element follows TM task element
_DTInstall
rts
entry RelDeferredTimeTask
RelDeferredTimeTask
subq #RelPram>>16,sp ; allocate buffer on stack
movea.l sp,a0 ; get buffer ptr
move.l #RelPram,d0 ; get #, addr PRAM bytes
_ReadXPram ; read 'em and weep
move.l (sp),d0 ; get 'da bytes
move.l d0,d1 ; save a copy
and.l #RelPwrMask,d0 ; mask to get power on time
addq.l #1,d0 ; increment power on time
and.l #RelPwrMask,d0 ; mask again, in case of rollover
and.l #-1-RelPwrMask,d1 ; zero power on time bits
or.l d0,d1 ; replace the power on time bits
move.l d1,(a0) ; put new PRAM value in buffer
move.l #RelPram,d0 ; get #, addr PRAM bytes
_WriteXPRAM ; write 'em back
addq #RelPram>>16,sp ; deallocate buffer
move.l a1,a0 ; get ptr to task block
move.l #RelMsCount,d0 ; get # ms between calls
_PrimeTime ; re-fire up time mgr task
rts
ENDPROC ; {RelTimeTask}
END

View File

@ -225,6 +225,7 @@ Dispatcher proc export
export BadTrap
import SysErr1
import BlockMove68020
import FLUSHCRANGE
If hasNewHeapMgr Then
import PramIO ; <SM8 BT>
endif
@ -233,7 +234,7 @@ Dispatcher proc export
;_______________________________________________________________________
;
; Routine: ATrap68020
; Routine: ATrap68020 dfa0
;
; Function: Dispatch A-line emulator traps to Mac system.
;
@ -328,7 +329,7 @@ EMT1010 equ ATrap68020
;_______________________________________________________________________
;
; Routine: FindTableEntry
; Routine: FindTableEntry e01c
;
; Function: Return address of trap entry in the dispatch table. (flushes Inst cache on 020).
;
@ -342,13 +343,21 @@ EMT1010 equ ATrap68020
FindTableEntry
_AssumeEq OldDisp,ToolDisp-1 ; OldDisp is next to, and lower than ToolDisp
lsl.w #16-ToolDisp,d1 ; ccr.c <- ToolDisp, ccr.n <- OldDisp
bpl.s @oldTrap ; if OldDisp = 0, it's an old style trap
bpl.s @newOldTrap ; if OldDisp = 0, it's an old style trap
bcc.s @osTrap ; if ToolDisp = 0, it's a new style OS trap
; otherwise, it's a new style ToolBox trap
@toolTrap andi.w #numTrapMask,d0 ; clear all but trap bits
lea (ToolTable,d0.w*4),a1 ; index into the Toolbox table
bra CacheFlush ; flush inst cache and return (destroys only reg D1) <SM14>
rts
@newOldTrap bcc.s @oldTrap
move.l d0,d1
btst.l #11,d1
bsr.s @toolTrapInstead
subi #$c000,d1
cmpi #$1000,d1
rts
@oldTrap andi.w #$01FF,d0 ; clear irrelevant bits
moveq.l #-$0057,d1 ; setup to check for ToolBox range
@ -358,17 +367,18 @@ FindTableEntry
addq.w #$0057-$004F,d1 ; d1 := TrapNum - $004F
ble.s @osTrap ; $0000 É $004F are OS traps
subq.w #$0054-$004F,d1 ; d1 := TrapNum - $0054
@toolTrapInstead
bne.s @toolTrap ; $0054 is an OS trap, $50É$53,$55,$56 are tool box
@osTrap andi.w #$00FF,d0 ; only 8 bits for OS trap numbers
lea (OSTable,d0.w*4),a1 ; index into the OS table
bra.s CacheFlush ; flush inst cache and return (destroys only reg D1)
rts
Title 'Dispatch - Get / Set Trap Address'
IMPORT TrapAddressBits ; <SM4> rb
;_______________________________________________________________________
;
; Routine: GetTrapAddress
; Routine: GetTrapAddress e062
;
; Function: Return trap address from dispatch table.
;
@ -383,10 +393,8 @@ kComeFromHeader equ (kBranchOverJMPLOpcode << 16) + kJMPLOpcode ; <SM14>
GetTrapAddressTrap ; <SM3> rb
bsr TrapAddressBits ; makes sure trap word is correct <SM14>begin
move ccr,-(sp) ; save condition register
bsr.s OldGetTrapAddress ; call the old GetTrapAddress
move (sp)+,ccr ; get condition codes back
bsr.s FindTableEntry
move.l (a1),a0
bcs.s @done ; come-from patches bypass our trickery
@next
cmp.l #kComeFromHeader,(a0) ; does this have the come-from header?
@ -397,17 +405,10 @@ GetTrapAddressTrap ; <SM3> rb
moveq #0,d0 ; must zero the result code again
rts
OldGetTrapAddress ; ; <SM14>end
bsr.s FindTableEntry ; locate the dispatch table entry
movea.l (a1),a0 ; get the routine address from the table
moveq.l #noErr,d0 ; return with success
rts ; all done
;_______________________________________________________________________
;
; Routine: SetTrapAddress
; Routine: SetTrapAddress e07a
;
; Function: Load new trap vector into dispatch table.
; On 020 machines, flush the cache as well.
@ -423,29 +424,28 @@ SetTrapAddressTrap ; <SM3> rb
move.l (a0),d2 ; get header of trap, and check for bus errors <5><SM14>begin
bsr TrapAddressBits ; makes sure trap word is correct <SM4> rb
bsr.s FindTableEntry ; locate the dispatch table entry
exg.l d0,a0
bcs.s OldSetTrapAddress ; come-from patches bypass our trickery
cmp.l #kComeFromHeader,d2 ; headers can only be used on come-from patches <5>
beq.s @illegalHeader ; saw a header, so I must system error <5>
movem.l d0-d1/a0,-(sp) ; save trap address, number, and bits
bsr OldGetTrapAddress ; call the old GetTrapAddress
move.l #0,a1 ; no come-froms found yet
@next
movea.l (a1),a0
cmp.l #kComeFromHeader,(a0)+ ; does this have the come-from header?
bne.s @done ; no we are done
bne.s OldSetTrapAddress
@next
move.l a0,a1 ; remember this address
move.l (a0),a0 ; go on to the next
bra.s @next
@done
movem.l (sp)+,d0-d1/a0 ; restore trap address, number, and bits
cmp.l #kComeFromHeader,(a0)+ ; does this have the come-from header?
beq.s @next
move.l d0,(a1)
cmp.l #0,a1 ; any come-froms found?
beq.s OldSetTrapAddress ; no, go do the real SetTrapAddress
move.l a0,(a1) ; set the trap address
move.l jCacheFlush,-(sp) ; get the cache flush vector <9>
rts ; call it, and then return to the trap dispatcher <9>
lea -2(a1),a0
lea 6,a1
bra.l FLUSHCRANGE
@illegalHeader
move.w #dsBadPatchHeader,d0 ; get error code <5>
@ -453,16 +453,13 @@ SetTrapAddressTrap ; <SM3> rb
OldSetTrapAddress
bsr.s FindTableEntry ; locate the dispatch table entry
move.l a0,(a1) ; install the new routine address into the table
move.l d0,(a1) ; install the new routine address into the table
moveq.l #noErr,d0 ; return with success
move.l jCacheFlush,-(sp) ; get the cache flush vector <9>
rts ; call it, and then return to the trap dispatcher <9><SM14>end
rts
;_______________________________________________________________________
;
; Macros: CacheFlush, vCacheFlush
; Macros: CacheFlush e0c2, vCacheFlush e0c2, DummyCacheFlush e0c6
;
; Function: Flush the 68020 Cache. For programs that do self modifying code, etc.
;
@ -481,13 +478,6 @@ CacheFlush
rts ; jump through the vector
vCacheFlush
move.l d1,-(SP) ; save this f*&%$ng register <5>
movec.l cacr,d1 ; get current cache state of 68020
addq.w #1<<3,d1 ; flush the instruction cache <1.4>
movec.l d1,cacr ; write back to the control register
move.l (SP)+,d1 ; restore register <5>
rts ; all done
vCacheFlush68040 ; 68040 cache flushing for self-modifying programs <3>
; NOTE - since the 040 I-Cache never gets "dirty", it only needs to be invalidated. <3>
@ -502,6 +492,9 @@ vCacheFlush68040 ; 68040 cache flushing for self-modifying programs <3>
rts ; return to caller - no registers destroyed <3>
MACHINE MC68020 ; reset to previous MACHINE directive <3>
DummyCacheFlush
rts
Title 'Dispatch - InitDispatcher'
;_______________________________________________________________________
@ -666,18 +659,14 @@ OSLoop move.l (a2)+,d1 ; get the next entry from the ROM dispatch table
EndIf ; Not NewBuildSystem
; now install the trap dispatcher
btst.b #2,$240a
beq.s @noInstallFlusher
lea DummyCacheFlush,a0
move.l a0,jCacheFlush
@noInstallFlusher
lea EMT1010,a0 ; point to the dispatcher
TestFor has68kEmulator ; Are we emulating a 68020? <SM7> SAM
beq.s @noEmu ; -> Nope. <SM7>
lea Rts020Disp,A1 ; Point A1 to an rts (hopefully near some cache resident code) <SM7>
bra.s @StuffFlush ; -> Install it <SM7>
@noEmu cmpi.b #cpu68040,CpuFlag ; check if we need to install 040 Cache Flush routine <3>
bne.s @notAn040 ; NO ... perform 020/030 cache-flush <3>
lea vCacheFlush68040,a1 ; YES ... get addr. of 040 cache flush routine <3>
@StuffFlush move.l a1,jCacheFlush ; ... and install it <3>
@notAn040 ; <3>
move.l a0,Line1010 ; install the Line-A exception handler
IF forRomulator THEN ; register the Line-A handler with the nub <SM6>
@ -711,60 +700,5 @@ BadTrap
; <SM4> rb, start from PatchProtector.a
TrapAddressBits proc export
; TrapAddressBits
;
; In:
; d0.w trap number
; d1.w [GS]etTrapAddress trap word
;
; Out:
; d1.w (modified) [GS]etTrapAddress trap word
; ccr CC if it is not a come-from, CS if it is a come-from
; bits in trap numbers and Set/GetTrapAddress opcodes
TrapNumber record 0
toolboxBit equ 11
endr
TrapAddressOpcode record 0
newBit equ 9
toolboxBit equ 10
endr
btst #TrapAddressOpcode.newBit,d1 ; is this N[GS]etTrapAddress?
bnz.s @notFullWord ; yes, donÕt handle it
btst #TrapAddressOpcode.toolboxBit,d1 ; is this normal [GS]etTrapAddress?
bz.s @notFullWord ; yes, donÕt handle it
@fullWord
; adjust the trap bits
bset #TrapAddressOpcode.newBit,d1 ; is this NGetTrapAddress?
btst #TrapNumber.toolboxBit,d0 ; is the trap a Toolbox trap?
bnz.s @toolbox ; yes, leave the bit set
bclr #TrapAddressOpcode.toolboxBit,d1 ; clear bit for OS
@toolbox
cmp.w #$C000,d0 ; is this a come-from trap word?
blo.s @notComeFrom ; no, it is not
cmp.w #$D000,d0 ; is it a come-from trap word?
bhs.s @notComeFrom ; no, it is not
@comeFrom
; oooh... carry is set for us, we can return
rts
@notFullWord
@notComeFrom
and #$FE,ccr ; clear the carry bit
rts
endproc
; <SM4> rb, end
end

File diff suppressed because it is too large Load Diff

View File

@ -86,7 +86,7 @@ VBLCore proc export
;_______________________________________________________________________
;
; Trap: _VINSTALL
; Trap: _VINSTALL bb40
;
; Arguments: A0 (input) : address of vertical retrace control block
; D0 (output): error code - 0 no error
@ -115,7 +115,18 @@ VBLCore proc export
; Registers Used: D0,D1,D2,A0,A1 <30Apr85>
;_______________________________________________________________________
VInstall lea VBLQueue,a1 ; get address of queue <1.4>
VInstall
lea VBLQueue+2,a1
@loop move.l (a1),d1
beq.s @dontflunk
move.l d1,a1
cmp.l a0,a1
bne.s @loop
moveq.l #0,d0
rts
@dontflunk lea VBLQueue,a1 ; get address of queue <1.4>
VInstallCommon ; common code shared with SlotVInstall
cmpi.w #vType,VBLType(a0) ; is it the proper type?
@ -159,7 +170,7 @@ VTypeError moveq.l #VTypErr,d0 ; flag the error
;_______________________________________________________________________
;
; The VREMOVE trap routine removes a vertical retrace control block from the
; The VREMOVE bba2 trap routine removes a vertical retrace control block from the
; VBL queue. On entry, A0 points to the control block. D0 returns the error
; code; all other registers are preserved.
;
@ -177,7 +188,7 @@ AnRTS rts ; return Dequeue error code
;_______________________________________________________________________ <1.3>
;
; we put the code for the VBL interrupt handler next
; we put the code for the VBL interrupt handler next bbb8
;
; NOTE: This handler expects that the interrupt is still pending, and clears
; it by clearing the CA1 interrupt flag on VIA 1 (base address passed
@ -199,6 +210,7 @@ PseudoVBLInt
VBLInt
eieioSTP
move.b #1<<ifCA1,vIFR(a1) ; clear and re-enable vertical retrace interrupts
nop
eieioSTP
BumpTicks
addq.l #1,Ticks ; bump tick count
@ -276,7 +288,7 @@ RunVBLs lea qHead-vblink(a1),a0 ; setup to fetch head of list
;_______________________________________________________________________
;
; Routine: GetSlotVBLQHdr
; Routine: GetSlotVBLQHdr bc2e
;
; Arguments: D0 (input) : video card slot ($0..$E possible)
; D0 (output): error code
@ -297,18 +309,41 @@ RunVBLs lea qHead-vblink(a1),a0 ; setup to fetch head of list
GetSlotVBLQHdr
ext.w d0 ; ignore high byte
cmpi.w #sLastSlot,d0 ; check for valid slot #
bgt.s @slotTooBig ; return error if too big
bhi.s @slotTooBig ; return error if too big
movea.l ([SlotQDT],d0.w*4,slotVBLPtrs),a1 ; point to the VBL queue header
@return
rts ; return with success
@slotTooBig move.w #smSlotOOBErr,d0 ; return with slot # error
@slotTooBig
move.l ([$2b6],$260),a1
move.l a1,d1
beq.s @skipthis
move.l (a1),d1
beq.s @skipthis
movem.l d0/d2/a0,-(sp)
sub.l a0,a0
move.l d1,a1
move.l #'vbl ',d1
jsr (a1)
move.l a0,a1
movem.l (sp)+,d0/d2/a0
move.l a1,d1
bne.s @return
@skipthis
addq.w #4,sp ; pop the return address
move.w #smSlotOOBErr,d0 ; return with slot # error
rts ; return to callers caller
endwith
;_______________________________________________________________________
;
; Trap: _SlotVINSTALL
; Trap: _SlotVINSTALL bc70
;
; Arguments: A0 (input) : address of vertical retrace control block
; D0 (input) : video card slot ($0..$E possible) <v1.2>
@ -332,7 +367,7 @@ SlotVInstall
;_______________________________________________________________________
;
; Trap: _SlotVRemove
; Trap: _SlotVRemove bc76
;
; Arguments: A0 (input) : address of vertical retrace control block
; D0 (input) : video card slot ($0..$E possible) <v1.2>
@ -353,7 +388,7 @@ SlotVRemove bsr.s GetSlotVBLQHdr ; find the VBL Queue for the slot
;_______________________________________________________________________
;
; Trap: _AttachVBL
; Trap: _AttachVBL bc86
;
; Arguments: D0 (input) : new video card slot for system VBL ($0..$E possible) <v1.2>
; D0 (output): error code
@ -371,7 +406,7 @@ AttachVBL bsr.s GetSlotVBLQHdr ; find the VBL Queue for the slot
;_______________________________________________________________________
;
; Trap: _DoVBLTask
; Trap: _DoVBLTask bc90
;
; Arguments: D0 (input) : video card slot ($0..$E possible) <v1.2>
; D0 (output): error code
@ -406,7 +441,7 @@ DoVBLTask bsr.s GetSlotVBLQHdr ; find the VBL Queue for the slot
;_______________________________________________________________________
;
; Routine: InitVBLQs
; Routine: InitVBLQs bcae
;
; Arguments: none
;
@ -415,7 +450,7 @@ DoVBLTask bsr.s GetSlotVBLQHdr ; find the VBL Queue for the slot
; Registers Used: A0
;_______________________________________________________________________
InitVBLQs LEA DoVBLTask,A0 ; and save hook to
InitVBLQs LEA.L DoVBLTask,A0 ; and save hook to
MOVE.L A0,JVBLTask ; VBL task execute routine
CLR.L ScrnVBLPtr ; init main screen ptr save global
RTS ; exit to caller

View File

@ -155,6 +155,8 @@
include 'fontPrivate.a' ; <CEL-41>
include 'universalEqu.a'
include 'PowerPrivEqu.a'
include 'Processes.a'
include 'TextServices.a'
PwrCycCount EQU $AA ; <1>
@ -168,7 +170,7 @@ PwrCycCount EQU $AA ; <1>
;___________________________________________________________________________________
;
; Routine: SynchIdleTime
; Routine: SynchIdleTime bcc0
;
; Inputs: none
;
@ -243,25 +245,52 @@ SynchIdleTimeProc PatchProc _SynchIdleTime
_PPC ; PPC trap <PN>
WITH PMgrRec,PowerDispRec ;
BRA.S @Done ; <PN> branch always because we are SM ROM
Testfor hwCbPwrMgr ; do we have a power manager?
BTST.B #0,$DD5
BEQ.S @Done ; no power cycling
MOVE.L PMgrBase,A0 ; Get the Power Manager Globals
MOVE.W PwrCycSyncCount(A0),D0 ; Get the number of syncIdle before IdleMind
ADDI.W #1,PMgrScratch.SyncCounter(A0) ; Increment scratch counter
CMP.W PMgrScratch.SyncCounter(A0),D0 ; Have we done enough SyncIdles
BLT.S @Done
CLR.W PMgrScratch.SyncCounter(A0) ; reset counter
MOVEQ #IdleMindDisp,D0 ; Set the selector to IdleMind
_PowerDispatch
@Done
rts
BTst.B #$1, ($2409)
BEQ.B @skipDriverCall
IMPORT PMIdleRelatedDriverCall
MACHINE MC68030
Bsr.L PMIdleRelatedDriverCall
@skipDriverCall
MoveA.L ([$2B6],$288), A0
Move.L A0, D0
BEQ.B @return
MoveM.L D1-D3/A1-A2, -(A7)
Move $6(A0), D1
MoveQ.L #$0, D2
@loop MoveA.L $14(A0,D2.L), A1
Move.L A1, D0
BEQ.B @continue
Move $C8(A1), D0
Clr D3
Cmp D3, D0
BEQ.B @continue
MoveA.L $C4(A1), A2
Move.L A2, D0
BEQ.B @continue
Jsr (A2)
Bra.B @exit
@continue AddQ #$4, D2
SubQ #$1, D1
BNE.B @loop
@exit MoveM.L (A7)+, D1-D3/A1-A2
@return Rts
ENDPROC ; SynchIdleTimeProc
;___________________________________________________________________________________
;
; Routine: InitApplication <1.6>
; Routine: InitApplication bd40 <1.6>
;
; Inputs: none
;
@ -314,30 +343,48 @@ CleanupApp PatchProc _CleanupApplication
MOVE.L applZone,A0 ; point to zone hdr
MOVE.L A0,-(SP) ; push start ptr
MOVE.L (A0),-(SP) ; push zone trailer
_sbKillSomeCaches
MOVE.W #sbKillSomeCaches,D0
_SplineMgr ; like _sbKillSomeCaches but with non-quick move
ADDQ #4,SP ; ignore result
IF hasCommToolbox THEN
;
; Clean up CommToolbox if necessary
;
import CleanUpCommToolbox
JSR CleanupCommToolbox
ENDIF
IF hasEditionMgr THEN ; <36>
;
; Check if app was doing Edition Manager stuff that needs cleaning up
;
MOVE.L ExpandMem, A0 ; get expanded memory area
MOVE.L ExpandMemRec.emDataPub(A0), D0 ; get dp globals
BEQ.S @noEditionMgr ; if not allocated, no need to do cleanup
SUBQ #2,SP ; place holder for result
_QuitEditionPack ; call pack11 clean up
TST.W (SP)+ ; ignore result
@noEditionMgr
ENDIF
MoveA.L ExpandMem, A0
MoveA.L $64(A0), A0
Tst.L $70(A0)
BEQ.B @skipAll
SubQ #$8, SP
Clr -(SP)
Pea.L $2(SP)
_GetCurrentProcess
Tst (SP)+
BNE.B @dont
Clr -(SP)
Pea.L $2(SP)
Clr -(SP)
_InlineAware
Tst.B (SP)+
BEQ.B @dont
Clr -(SP)
Move #$2, -(SP)
Pea.L $4(SP)
Move #$16, D0
_TSMDispatch
AddQ #$2, SP
@dont
AddQ #$8, SP
@skipAll
;
; Clean up Compoents and Component insetances belong to this app.
;
@ -346,10 +393,8 @@ CleanupApp PatchProc _CleanupApplication
;
; Clean up the Palette Manager if there is one.
;
CMP.W #$3FFF,ROM85 ; do we have color QD?
BHI.S @noPMgrExit
_PMgrExit
@noPmgrExit
MOVE.W #selectPMgrExit,D0 ; _PMgrExit
_PaletteDispatch
;
; Clean up Sound Manager
@ -409,107 +454,5 @@ CleanupApp PatchProc _CleanupApplication
ENDPROC ; CleanupApp
;___________________________________________________________________________________
;
; FUNCTION get70MgrAttr(selector : OSType; VAR response : LONGINT) : OSErr;
;
; Generic Gestalt function for testing for existence of System 7.0
; features. Since this patch is for 7.0 only, it always returns 1 in the
; response. If your particular feature requires more bits set in the
; response, don't use this routine. Currently, this is the function
; for the gestaltDBAccessMgrAttr and gestaltEditionMgrAttr selectors.
;
; Registers A0 and A1 are destroyed.
;
;___________________________________________________________________________________
get70MgrAttr PROC
MOVE.L (SP)+,A0 ; return address
MOVE.L (SP)+,A1 ; address of result
MOVE.L #1,(A1) ; 7.0 features always under 7.0!
ADDA.W #4,SP ; pop the selector type
MOVE.W #noErr,(SP) ; it always works
JMP (A0)
ENDPROC ; get70MgrAttr
;___________________________________________________________________________________
;
; Additional patch code goes here
;
;___________________________________________________________________________________
;___________________________________________________________________________________
;
; dimg entry - Dictionary Manager
;
;___________________________________________________________________________________
DictionaryDispatch PatchProc _DictionaryDispatch
DictionaryHandle EQU ExpandMemRec.emDictionaryMgrPackHandle
DictionaryUseCount EQU ExpandMemRec.emDictionaryMgrUseCount
MOVE.L ExpandMem,A1 ; get expand mem into A1
MOVE.L DictionaryHandle(A1),A0 ; move the handle to the code into A0
ADD.W #DictionaryUseCount,A1 ; A1 = pointer to use count
_ProcHelper ; let ProcHelper take over
ENDPROC ; DictionaryDispatch
;___________________________________________________________________________________
;
; Install Gestalt functions for gestaltDBAccessMgrAttr, gestaltEditionMgr,
; gestaltStandardFileAttr, and gestaltAppleEventsAttr
;
; !!!! all just return 1 for system 7.0 !!!!!
;
;___________________________________________________________________________________
MiscPatchesInstall InstallProc
IMPORT get70MgrAttr
IF hasDataAccessMgr THEN ; <37>
MOVE.L #gestaltDBAccessMgrAttr, D0 ; Data Access Manager
lea get70MgrAttr, A0
_NewGestalt
ENDIF
IF hasEditionMgr THEN ; <37>
MOVE.L #gestaltEditionMgrAttr, D0 ; Edition Manager
lea get70MgrAttr, A0
_NewGestalt
ENDIF
MOVE.L #gestaltStandardFileAttr, D0 ; Standard File
leaResident get70MgrAttr, A0
_NewGestalt
IF hasAppleEventMgr THEN ; <37>
MOVE.L #gestaltAppleEventsAttr, D0 ; AppleEvent Manager
lea get70MgrAttr, A0
_NewGestalt
ENDIF
;___________________________________________________________________________________
; Gestalt function for the dictionary manager.
; just returns 1 for CubeE
;____________________________________________________________________________________
MOVE.L #gestaltDictionaryMgrAttr, D0 ; Dictionary Manager
lea get70MgrAttr, A0
_NewGestalt
RTS
ENDPROC
END ; of file

View File

@ -28,8 +28,8 @@ CQDObjs = "{ObjDir}CheckDevicesINIT.a.o"
Rez {StdROpts} -o "{Targ}" "{ColorQDDir}CQD.r" -i "{QDPatchesDir}"
"{LibDir}CQD.lib" Ä {CQDObjs}
Lib {StdLibOpts} -o "{Targ}" {CQDObjs}
# "{LibDir}CQD.lib" Ä {CQDObjs}
# Lib {StdLibOpts} -o "{Targ}" {CQDObjs}
"{ObjDir}CheckDevicesINIT.a.o" Ä "{ColorQDDir}CheckDevicesINIT.a"

View File

@ -20,8 +20,8 @@ AliasMgrObjects = "{ObjDir}alDlogUtil.a.o"
"{ObjDir}FolderMgr.a.o"
"{LibDir}AliasMgr.lib" Ä {AliasMgrObjects}
Lib {StdLibOpts} -o "{Targ}" {AliasMgrObjects}
# "{LibDir}AliasMgr.lib" Ä {AliasMgrObjects}
# Lib {StdLibOpts} -o "{Targ}" {AliasMgrObjects}
"{ObjDir}alDlogUtil.a.o" Ä "{ObjDir}StandardEqu.d" ¶

View File

@ -22,8 +22,8 @@ ComponentMgrObjects = "{ObjDir}ThingManagerDispatcher.a.o"
"{ObjDir}ThingSearch.c.o" ¶
"{ObjDir}ThingFiles.c.o" ¶
"{LibDir}ComponentMgr.lib" Ä {ComponentMgrObjects}
Lib {StdLibOpts} {ComponentMgrObjects} -o "{Targ}"
# "{LibDir}ComponentMgr.lib" Ä {ComponentMgrObjects}
# Lib {StdLibOpts} {ComponentMgrObjects} -o "{Targ}"
"{ObjDir}ThingManagerDispatcher.a.o" Ä "{ComponentMgrDir}ThingManagerDispatcher.a" ¶

View File

@ -255,6 +255,7 @@ CMGR PROC EXPORT
; External Routines used by Control Manager
;
IMPORT GetNewRgn
IMPORT FlushCRange
;
; FUNCTION NewControl( window: windowPtr;
@ -302,8 +303,6 @@ NewControl
MOVE.L A0,(A4) ;also, its the function result
MOVE.L (A3),A2 ;handle -> pointer
TST.B MMU32Bit ; are we in 32-bit mode? <C777/09Feb87> DAF
BEQ.S @1 ; nope, so continue <C612/12Jan87> DAF
SF.B contrlVis(A2) ; set this temporarily, so SetCtlColor won't try to draw <C612/12Jan87> DAF
MOVE.L A3,-(SP) ; push controlHandle <C612/12Jan87> DAF
MOVE.L #-1,-(SP) ; push -1 to make a new rec with default CTab <C612/12Jan87> DAF
@ -371,8 +370,6 @@ GetCDefProc
MOVE.W (A4),D0 ;get resource ID
AND #$000F,D0 ;use only low 4 bits
TST.B MMU32Bit ; is it in 32-bit mode? <C777/09Feb87> DAF
BEQ.S @1 ; nope, so hide in hi-byte <C612/12Jan87> DAF
MOVE.L A0,-(SP) ; save A0 <C612/12Jan87> DAF
MOVE.L D0,-(SP) ; save D0 too <C612/12Jan87> DAF
SUBQ #6,SP ; get placeholder for auxCtlHndl, and boolean result <C612/12Jan87> DAF
@ -385,10 +382,7 @@ GetCDefProc
MOVE.L (SP)+,D0 ; restore D0 (with variant) <C612/12Jan87> DAF
MOVE.B D0,acReserved(A0) ; put variant in auxRec <C612/12Jan87> DAF<1.6>
MOVE.L (SP)+,A0 ; restore A0 <C612/12Jan87> DAF
BRA.S @2 ; all done <C612/12Jan87> DAF
@1
MOVE.B D0,(A0) ;keep in high byte of handle
@2
ADDQ #4,A0 ;bump to next field
CLR.L (A0)+ ;init dataHandle
@ -470,9 +464,7 @@ CallControl
MOVE.W (SP)+,10(SP) ; move from top of stack to placeholder <C491/08Dec86> DAF
MOVE.L (A3),A0 ;get pointer to control structure
MOVE.L ContrlDefHandle(A0),D0 ;get handle of controlProc <C491/08Dec86> DAF
_StripAddress ;clean variant code out of hi byte <C491/08Dec86> DAF
MOVE.L D0,A0 ;copy to an A-reg <C491/08Dec86> DAF
MOVE.L ContrlDefHandle(A0),A0 ;get handle of controlProc <C491/08Dec86> DAF
TST.L (A0) ;needs reloading?
BNE.S SkipCLoad ;if not,skip
@ -497,7 +489,12 @@ SkipCLoad
_GetHandleSize ; How big is our CDEF Handle <LW3> fau
cmp.l #32,D0 ; Is it "small" <LW6> chp
bhi.s @RealCDEF ; no, don't flush the cache <LW3> fau
jsr ([jCacheFlush]) ; else, flush the caches. <LW3> fau
move.l A0,-(SP)
move.l (A0),A0
move.l D0,A1
bsr.l FlushCRange ; else, flush the caches. <LW3> fau
move.l (SP)+,A0
@RealCDEF ; <LW3> fau
_HLock ; lock it down <C424/18Nov86>
MOVE.L (A0),A0 ;get cDefProc ptr
@ -527,8 +524,6 @@ NoDControl
GetCVariant ; <C491/08Dec86> DAF
MOVE.L 4(SP),A0 ; get ctl handle
TST.B MMU32Bit ; are we in 32-Bit mode? <C777/09Feb87> DAF
BEQ.S @1 ; no, so do it the old way <C612/12Jan87> DAF
SUBQ #6,SP ; leave room for result and boolean <C612/12Jan87> DAF
MOVE.L A0,-(SP) ; push the controlHandle <C612/12Jan87> DAF
PEA 6(SP) ; point to result placeholder <C612/12Jan87> DAF
@ -538,12 +533,7 @@ GetCVariant ; <C491/08Dec86> DAF
MOVE.L (A0),A0 ; get the auxRecPtr <C612/12Jan87> DAF
CLR.W D0 ; clear top byte <C612/12Jan87> DAF
MOVE.B acReserved(A0),D0 ; get variant code <C612/12Jan87> DAF<1.6>
BRA.S @2 ; <C612/12Jan87> DAF
@1
MOVE.L (A0),A0 ; get ctl ptr
MOVE.B ContrlDefHandle(A0),D0 ; get selector parameter
AND.W #$000F,D0 ; lo nybble only
@2
MOVE.W D0,8(SP) ; return result
MOVE.L (SP)+,A0 ; get return addr
ADDQ #4,SP ; flush parameters
@ -569,18 +559,10 @@ EraseControl
_NewRgn ;allocate a new region
MOVE.L (SP),A4 ;keep the region in A4, keep on stack
TST.B MMU32Bit ;are we in 32-bit mode? <1.3>
BEQ.S @24bit ;no, donÕt call new message <1.3>
MOVEQ #CalcWholeCtlMsg,D0 ;message is calculate whole regions <1.2>
MOVE.L A4,D1 ;the region is the parameter <1.2>
BSR.S CallControl ;send it the message <1.2>
BRA.S @doneCalc ; <1.2>
@24bit ; <1.3>
MOVEQ #CalcCtlMsg,D0 ;message is calculate regions
MOVE.L A4,D1 ;the region is the parameter
BCLR #31,D1 ;hi-bit clear means whole thing
BSR.S CallControl ;send it the message
@doneCalc
BSR CallControl ;send it the message <1.2>
;
; paint white to erase control and add it to the windowÕs update region
;
@ -657,9 +639,6 @@ DontEraseControl ; <3>
MOVE.L (A0),A0 ; get auxCtlRec ptr
MOVE.L acCTable(A0),-(SP) ; push default colors hndl <1.6>
TST.B MMU32Bit ; are we in 32-bit mode? <1.4/DAF>
BEQ.S @CtlRec24 ; nope, so get rid of it the easy, old-fashioned way <1.4/DAF>
LEA AuxCtlHead,A1 ; get the head of the auxCtlList (offset is zero so this works!)
@10
MOVE.L (A1),A2 ; get the handle to the auxCtlRec
@ -684,11 +663,6 @@ DontEraseControl ; <3>
MOVE.L A2,A0 ; release the auxCtlRec
_DisposHandle ;
ADDQ #4,SP ; get rid of the extra window pointer pushed above
BRA.S @CtlRecDone ;
@CtlRec24
_SetCtlColor ; set this controlÕs colors to default (and delete)
@CtlRecDone
;
; delete it from the windowÕs controlList
@ -991,7 +965,7 @@ GetCTitle
MOVEQ #0,D0 ;clear high part
MOVE.B (A0),D0 ;get length of string
ADDQ.L #1,D0 ;include the length byte, too
_BLOCKMOVE ;move it in place
_BLOCKMOVEDATA ;move it in place
RTS ;all done!
;
; PROCEDURE SetCTitle(theControl: controlHandle; theTitle: Str255);
@ -1034,7 +1008,7 @@ CopyCTitle ; <3>
MOVE.L (A3),A1 ;get control pointer
LEA ContrlTitle(A1),A1 ;point to title string
ADDQ #1,D0 ;dont forget the length byte
_BlockMove ;move it in
_BlockMoveData ;move it in
;
; make it visible if it used to be
;
@ -1221,8 +1195,6 @@ DragCon1
;
JSR GetNewRgn ;allocate a new region
TST.B MMU32Bit ;are we in 32-bit mode? <1.3>
BEQ.S @24bit ;no, donÕt call new message <1.3>
MOVEQ #CalcWholeCtlMsg,D0 ;message is calculate whole regions <1.2>
TST.W DragFlag ;if weÕre called as real MoveControl, <1.2>
BEQ.S @0 ;then we picked the right message <1.2>
@ -1230,16 +1202,7 @@ DragCon1
@0 ; <1.2>
MOVE.L (SP),D1 ;the region is the parameter <1.2>
BSR.S CallControl ;send it the message <1.2>
BRA.S @doneCalc ; <1.2>
@24bit ; <1.3>
TST.W DragFlag ;if weÕre called as real MoveControl,
SNE (SP) ;high bit off means we want whole thing
MOVE.L (SP),D1 ;parameter goes in D1
MOVEQ #CalcCtlMsg,D0 ;tell controlProc to calculate it regions
BSR CallControl ;tell the control about it
;
CLR.B (SP) ;clear high byte of region
@doneCalc
MOVE.L (SP)+,A4 ;keep it in A4
;
; set up the parameters for dragging the region around (careful -- extra reg

View File

@ -25,8 +25,8 @@ DataAccessRTTObjs = "{ObjDir}DataAccessResultsHandlers.a.o"
DataAccessCompObjs = "{ObjDir}DataAccessCompletion.a.o"
"{LibDir}DataAccessMgr.lib" Ä "{ObjDir}DataAccessPackEntry.a.o"
Lib {StdLibOpts} -o "{Targ}" "{ObjDir}DataAccessPackEntry.a.o"
# "{LibDir}DataAccessMgr.lib" Ä "{ObjDir}DataAccessPackEntry.a.o"
# Lib {StdLibOpts} -o "{Targ}" "{ObjDir}DataAccessPackEntry.a.o"
"{RsrcDir}DataAccessMgr.rsrc" ÄÄ {DataAccessMgrPackObjs}

View File

@ -47,7 +47,8 @@ Pack13Globals EQU ExpandMemRec.emPack13Globals
@globalsOK MOVE.L Pack13Handle,A0 ; A0 = handle to PACK
MOVE.L ExpandMem, A1 ; A1 = expanded memory area
ADD.W #Pack13Globals,A1 ; A1 = pointer to PACK use count
_ProcHelper ; let ProcHelper take over
MOVE.L $668, -(SP)
RTS
;
; Attempt to call Database Access Manager before InitDBPack

View File

@ -237,6 +237,8 @@ SearchWindow
MOVE windowKind(A0),D0 ; get the unit number from window
BPL.S noGoodSearch ; if not sys. kind, ignore it
NOT D0 ; flip it (bitwise)
CMP UnitNtryCnt,D0
BPL.S noGoodSearch
ASL #2,D0 ; * 4
MOVE.L UTableBase,A0 ; point to the driver table
MOVE.L 0(A0,D0),A0 ; get the handle
@ -255,12 +257,12 @@ SendDrvrMsg
MOVEQ #64,D0 ;message 64 is "feedEvent"
;
SendDCommon
LINK A6,#-32 ;get some space for the control p-block
LEA IORefNum-32(A6),A0 ;point A0 at the block
LINK A6,#-$32 ;get some space for the control p-block
LEA IORefNum-$32(A6),A0 ;point A0 at the block
MOVE.W DCtlRefNum(A1),(A0)+ ;set up the refNum
MOVE.W D0,(A0)+ ;set up the control "opCode"
MOVE.L A3,(A0) ;set up event ptr as parameter
LEA -32(A6),A0 ;point to pBlock
LEA -$32(A6),A0 ;point to pBlock
_Control ,IMMED ;make the control call
;
UNLK A6 ;de-allocate parameter block
@ -304,11 +306,11 @@ DiskHandler tst.w EvtMessage(A3) ;if an Eject event, <C150/09sep86>
jsr (A0) ;eject the disk <C150/09sep86>
bra.s DoneSysEvt ;mark as taken, no error <C150/09sep86>
@1 SUB.W #24,SP ;allocate 24 bytes on stack
@1 SUB.W #64,SP
MOVE.L SP,A0 ;point to it
MOVE.W EvtMessage+2(A3),IODrvNum(A0) ;get the "disk ID" parameter
_MountVol ;tell OS to do its thing
ADD.W #24,SP ;deallocate space on stack
ADD.W #64,SP ;deallocate space on stack
MOVE.W D0,EvtMessage(A3) ;return result to application
BRA DoneSEvt ;always return "FALSE"
@ -652,10 +654,14 @@ SystemTask
; begin roll-in HMSystemTaskPatch patch <11>
IMPORT ptchHMGetBalloons ; <11>
MOVE.L ExpandMem,A0
MOVE.L $78(A0),D0
BEQ.S @BalloonsOff
JSR ptchHMGetBalloons ; what is the state of What Is? mode? <11>
BEQ.S @BalloonsOff ; no, let's not scan for a content window <11>
CLR -(SP)
_HMGetBalloons
TST.B (SP)+
BEQ.S @BalloonsOff
SUBQ #2,SP ; make room for a dummy OSErr <11>
_HMBalloonBulk ; <11>
@ -668,7 +674,7 @@ SystemTask
IMPORT NMTask ; <V1.1>
JSR NMTask ;Give time to Notification Manager <V1.1>
MOVEM.L D3/A3,-(SP) ;save some work registers
MOVEM.L D2-D4/A3-A4,-(SP) ;save some work registers
;
; if this is a re-entrant call, just punt
;
@ -701,7 +707,9 @@ SystemTask
NotSWindow
MOVE.L UTableBase,A3 ;point to the driver table
MOVE.L A3,A4
MOVE.W UnitNtryCnt,D3 ;get number of entries
MOVE.L D3,D4
;
; here is the main loop for SystemTask. For each driver that's installed, see if
; it needs time. If so, send it the RUN message.
@ -729,9 +737,10 @@ SysTLoop
MOVEQ #0,D0 ;zero high part of D0
MOVE.W DCtlDelay(A1),D0 ;get delay tick count
BEQ.S DoItNow ;if zero, always do it
ADD.L DCtlCurTicks(A1),D0 ;figure out next time to call it
CMP.L Ticks,D0 ;has that time passed yet?
BGT.S NextTSys ;if not, don't call it
MOVE.L Ticks,D2
SUB.L DCtlCurTicks(A1),D2
CMP.L D0,D2
BCS.S NextTSys
;
; its time to give it a call
;
@ -741,12 +750,18 @@ DoItNow
;
; here is the bottom of the main loop. See if there are any more entries to process
;
CMP.L UTableBase,A4
BNE.S NotSWindow
CMP UnitNtryCnt,D4
BNE.S NotSWindow
NextTSys
SUBQ.W #1,D3
BGT.S SysTLoop ;loop if there's more to do
_SetPort ;restore it
CLR.B TaskLock ;flag that we're done
TaskDone MOVEM.L (SP)+,D3/A3 ;restore work registers
TaskDone MOVEM.L (SP)+,D2-D4/A3-A4 ;restore work registers
RTS ;return to caller
;
; PROCEDURE SystemMenu(menuResult: LongInt);
@ -774,8 +789,8 @@ SystemMenu
SWAP D1 ;put the high word back
MOVE.L D1,-(SP) ;move it onto the stack
PEA (SP) ;push the address
IMPORT CHANGEMENURESULTFORINPUTMETHOD
JSR CHANGEMENURESULTFORINPUTMETHOD ;and send it to the input method
MOVE #35,D0
_TSMDispatch ;and send it to the input method
ADDQ #4,SP ;get rid of space for menuresult
MOVE.L (SP)+,(SP) ;strip parameter
RTS ;return to caller
@ -893,8 +908,8 @@ DoneSEdit
OpenDeskAcc
CLR.W 8(SP) ;return 0 as the default
SUB #32,SP ;get 32 bytes for a parameter block
MOVE.L 36(SP),IOFileName(SP) ;set up name
SUB #$32,SP ;get 32 bytes for a parameter block
MOVE.L $36(SP),IOFileName(SP) ;set up name
CLR.W IODrvNum(SP) ;use default volume
MOVE.W #$0040, IOFileType(SP) ;clear type byte, special permissions to ID OpenDeskAcc
CLR.L IOOwnBuf(SP) ;use system buffer
@ -904,7 +919,7 @@ OpenDeskAcc
BNE.S DoneOpenDAcc ;if an error, don't return refNum
MOVE.W IORefNum(SP),D0 ;get the refNum
MOVE D0,40(SP) ;return the refNum
MOVE D0,$3A(SP) ;return the refNum
; figure out the DCE ptr
@ -926,7 +941,7 @@ OpenDeskAcc
_ShowWindow ;show it!
DoneOpenDAcc
ADD.W #32,SP ;strip the pBlock
ADD.W #$32,SP ;strip the pBlock
MOVE.L (SP)+,(SP) ;strip parameter
RTS
@ -935,11 +950,11 @@ DoneOpenDAcc
CloseDeskAcc
MOVE.W 4(SP),D0 ;get the refNum
SUB #30,SP ;get space for param block
SUB #$32,SP ;get space for param block
MOVE.W D0,IORefNum(SP) ;set up refNum
MOVE.L SP,A0
_Close ;close it!
ADD #30,SP ;pop off param block
ADD #$32,SP ;pop off param block
TwoByteExit
MOVE.L (SP)+,A0
ADDQ #2,SP

View File

@ -19,8 +19,8 @@ DialogMgrObjects = "{ObjDir}DialogMgr.a.o"
"{ObjDir}DialogDispatch.a.o"
"{LibDir}DialogMgr.lib" Ä {DialogMgrObjects}
Lib {StdLibOpts} -o "{Targ}" {DialogMgrObjects}
# "{LibDir}DialogMgr.lib" Ä {DialogMgrObjects}
# Lib {StdLibOpts} -o "{Targ}" {DialogMgrObjects}
"{ObjDir}DialogMgr.a.o" Ä "{ObjDir}StandardEqu.d" ś

View File

@ -52,8 +52,8 @@ DisplayMgrCOpts = -b2 {StdCOpts} -i {DisplayMgrDir} -i {ProcessMgrDir}
DisplayMgrAOpts = {StdAOpts}
"{DispalyMgrLibDir}DisplayMgr.lib" Ä {DisplayObjs}
Lib {LibWarnings} -o {Targ} {DisplayObjs}
# "{DispalyMgrLibDir}DisplayMgr.lib" Ä {DisplayObjs}
# Lib {LibWarnings} -o {Targ} {DisplayObjs}
"{DispalyMgrLibDir}DisplayMgrExtensionLib.o" Ä {DisplayExtensionObjs}

View File

@ -24,8 +24,8 @@ ExpansionBusObjs = "{ObjDir}ExpansionBusMgr.a.o"
ExpansionBusMgrCOpts = -b2 {StdCOpts} -i {ExpansionBusMgrDir}
ExpansionBusMgrAOpts = {StdAOpts}
"{ExpansionBusMgrLibDir}ExpansionBusMgr.lib" Ä {ExpansionBusObjs}
Lib {LibWarnings} -o {Targ} {ExpansionBusObjs}
# "{ExpansionBusMgrLibDir}ExpansionBusMgr.lib" Ä {ExpansionBusObjs}
# Lib {LibWarnings} -o {Targ} {ExpansionBusObjs}
"{ObjDir}ExpansionBusMgr.a.o" Ä "{ObjDir}StandardEqu.d" ¶
"{ExpansionBusMgrDir}ExpansionBusMgr.a"

View File

@ -61,8 +61,8 @@ FontMgrObjs = "{ObjDir}fnt.c.o"
"{ObjDir}FontMgr.a.o"
"{LibDir}FontMgr.lib" Ä {FontMgrObjs}
Lib {StdLibOpts} {FontMgrObjs} -o "{Targ}"
# "{LibDir}FontMgr.lib" Ä {FontMgrObjs}
# Lib {StdLibOpts} {FontMgrObjs} -o "{Targ}"
"{ObjDir}FontFolderExtension.a.o" Ä "{IntAIncludes}LinkedPatchMacros.a" ¶

View File

@ -181,13 +181,14 @@ VisState EQU -1 ; flag for resource's vis state <C314/31Oct86> DAF
Align EQU -2 ; another byte to re-align stack frame <C666/22Jan87> DAF
IsACPort EQU -4 ; flag for color port
GetNewCWindow LINK A6,#IsACPort ; build stack frame <C106 EHB>
MOVE #-1,IsACPort(A6) ; flag the color port <C106 EHB>
GetNewCWindow MOVEQ.L #-1,D0 ; color port
BRA.S GNWShare ; =>dive into common code <C106 EHB>
GetNewWindow LINK A6,#IsACPort ; build stack frame
CLR IsACPort(A6) ; flag black and white port <C106 EHB>
GNWShare MOVE.L A3,-(SP) ; preserve a work register
GetNewWindow MOVEQ.L #0,D0 ; black and white port
GNWShare LINK A6,#IsACPort ; build stack frame
MOVE D0,IsACPort(A6) ; flag port
MOVE.L A3,-(SP) ; preserve a work register
CLR.L result(A6) ; set result to NIL
SUBQ #4,SP ; make space for result
@ -496,18 +497,18 @@ LoadMDEF
MOVE.W #MapTRUE,ROMMapInsert ; get the MDEF from the ROM map <EHB 10 Jul 85>
_GetResource ; get it!
MOVE.L (A3),A0 ; get pointer to menu
MOVE.L (SP)+,MenuDefHandle(A0) ; install the defProc handle (which may be NIL)
MOVE.L A3,-(SP) ; push the menu handle
_CalcMenuSize ; calculate the size of the menu
;
; Now try to load a menu color table with the same ID as the menu's <FJL C408/C417>
;
move.b #1, -(sp) ; force Resource Load to true
_SetResLoad
MOVE.L (A3),A0 ; get pointer to menu
MOVE.L (SP)+,MenuDefHandle(A0) ; install the defProc handle (which may be NIL)
MOVE.L A3,-(SP) ; push the menu handle
_CalcMenuSize ; calculate the size of the menu
subq #4, sp ; make room for the result
move.l #'mctb', -(sp) ; push resource type
move.w 8(a6), -(sp) ; push menuID
@ -584,6 +585,7 @@ GetNewMBar
; loop, getting and inserting one menu at a time
BRA.S skipAllThis
GetMBLoop
SUBQ #4,SP ;make room for result
MOVE.L (A3),A0 ;get pointer to mBarDef
@ -595,8 +597,9 @@ GetMBLoop
CLR.W -(SP) ;insert at end of menuBar
_InsertMenu
MOVE.L (A3),A0 ;get ptr to mBarDef
ADDQ #1,D3 ;bump to next menu
skipAllThis
MOVE.L (A3),A0 ;get ptr to mBarDef
CMP (A0),D3 ;done yet
BLT.S GetMBLoop ;loop until done

Some files were not shown because too many files have changed in this diff Show More