;
;	File:		FPEQUS.a
;
;	Contains:	xxx put contents here xxx
;
;	Written by:	xxx put writers here xxx
;
;	Copyright:	© 1990 by Apple Computer, Inc., all rights reserved.
;
;   This file is used in these builds:   Mac32
;
;	Change History (most recent first):
;
;	Terror Change History:
;
;		 <1>	11/14/90	BG		Added to BBS for the first time.
;
;	To Do:
;


;-----------------------------------------------------------
; 04JUL82: WRITTEN BY JEROME COONEN
; Copyright Apple Computer, Inc., 1983,1984,1985,1989,1990
; All Rights Reserved
; 10AUG82: REMOVE OPWORD ERROR MASKS AND SET UP OPWORD
;	TESTS ON WORD, RATHER THAN LONG, BOUNDARY. (JTC)
; 28AUG82: REMOVE FLAGS FOR STATE AREA ACCESS. (JTC)
; 30AUG82: UNDERFLOW AND DIVBYZERO FLAGS SWAPPED (JTC)
; 01SEP82: RND ENCODINGS CHANGED (JTC)
; 03SEP82: FLAG ORDER REVERSED (JTC)
; 13OCT82: ADD ROUND UP BIT (JTC)
; 12DEC82: REMOVE PROJECTIVE MODE MATERIAL (JTC)
; 13APR83: EXPAND COMMENT ABOUT STKREM... (JTC)
; 29APR83: ADD OPHIBIT CONSTANT FOR DISTINGUISHING CLASS AND
;	COMPARE IN NANHANDLER.  ADD NEXT CONSTANTS. (JTC)
; 09MAY83: REPLACE STACK CONSTANTS WITH LINK CONSTANTS (JTC)
; 26AUG83: MOVED FOR... EQUS FROM FPDRIVER TO HERE (JTC)
; 01NOV83: PRECISION CONTROL TO MODE BITS (JTC)
; 15APR84: MOVED FOR... EQUS BACK OUT TO FPDRIVER FROM HERE (JTC&DGH)
; 26MAR85: ADDED QNANBIT=30 FOR CHANGE OF QUIET/SIGNAL NAN SENSE (JTC)
; 24JAN90: MODIFICATIONS FOR 68020 SOFTWARE SANE (JPO)
;
; SOME BITS ARE ACCESSIBLE BY <TST; BMI> SEQUENCES BECAUSE
; THEY OCCUR AT THE HIGH END OF A BYTE, WORD, OR LONG
; SUBPIECE.  WHENEVER SUCH TESTS ARE EXPLOITED (PREFERABLE
; TO BTST), THE BIT NUMBER IS USED IN THE COMMENT.
;-----------------------------------------------------------

;-----------------------------------------------------------
; STACK FRAME INFORMATION.  AFTER ENTRY DO A "LINK A6,#0"
; TO GET STACK:
;	OLD A6  <  RET  <  OP  <  ADR1  <  ADR2...
; WITH A6 POINTING TO OLD A6.  THEN THE FOLLOWING LINK
; OFFSETS ACCESS STACK ELEMENTS.
;-----------------------------------------------------------
LKA6	EQU	 0	; SAVED A6
LKRET	EQU	 4	; RETURN ADDRESS
LKOP	EQU	 8	; OPWORD
LKADR1	EQU	10	; FIRST ADDRESS
LKADR2	EQU	14	; SECOND ADDRESS
LKADR3	EQU	18	; THIRD ADDRESS

;-----------------------------------------------------------
; WHEN A HALT EXIT IS TAKEN, THE STACK CONSISTS OF:
;	RET TO FP020  <  OP  <  ADR1  <  ADR2  <  ADR3  <   PTR
; WHERE PTR REFERS TO THE THREE WORD STRUCTURE:	 CCR | D0
; TO BE STUFFED AFTER RETURN TO PACKAGE.
; TO RETURN TO EXECUTING PROGRAM JUST DO
;	MOVEA.L	(SP)+,A0	; RETURN ADRS
;	ADDA.W	#18,SP		; KILL OP, 4 ADRS'S
;	JMP	(A0)
;-----------------------------------------------------------
STKREM1	EQU	 6	; BYTES TO TOSS IF 1 (USING RTD)
STKREM2	EQU	10	; BYTES TO TOSS IF 2
STKREM3	EQU	14	; BYTES TO TOSS IF 3

;-----------------------------------------------------------
; POSITION OF ERROR BITS IN BYTE.  W-MASKS ARE FOR SETTING
; MULTIPLE EXCEPTIONS IN BITS $1F00 OF A WORD.
;-----------------------------------------------------------
ERRX	EQU	4	; INEXACT
ERRZ	EQU	3	; DIVISION BY ZERO
ERRO	EQU	2	; OVERFLOW
ERRU	EQU	1	; UNDERFLOW
ERRI	EQU	0	; INVALID

ERRWXO	EQU	$1400	; INEXACT AND OVERFLOW
ERRWXU 	EQU	$1200	; INEXACT AND UNDERFLOW

;-----------------------------------------------------------
; RESULTS OF COMPARISONS, BASED ON CPU MAP: XNZVC.
;-----------------------------------------------------------
CMPE	EQU	$04	; EQUAL
CMPL	EQU	$19	; LESS
CMPG	EQU	$00	; GREATER
CMPU	EQU	$02	; UNORDERED

;-----------------------------------------------------------
; CLASS OPERATOR RETURN CODES
;-----------------------------------------------------------
CLSNAN	EQU	1	; SIGNALING NAN
CLQNAN	EQU	2	; QUIET NAN
CLINF	EQU	3	; INFINITY
CLZERO	EQU	4	; ZERO
CLNORM	EQU	5	; NORMAL NUMBER
CLDENORM EQU	6	; DENORMAL NUMBER

;-----------------------------------------------------------
; OPWORD BITS, BASED ON WORD VALUE.
;-----------------------------------------------------------
TWOADRS	EQU	00	; 1 IFF 2 ADDRESSES
OPHIBIT	EQU	04	; 0010 = OPCODE LEAD BIT
DSTOUT	EQU	05	; 1 IFF NOT COMPARISON
SRCIN	EQU	06	; 1 IFF SRC INPUT
DSTIN	EQU	07	; 1 IFF DST INPUT
DSTLO	EQU	08	; LO BIT OF DST FORMAT
DSTMD	EQU	09	; MED BIT OF DST FORMAT
DSTINT	EQU	10	; 1 IFF INTEGER OUTPUT
SRCLO	EQU	11	; LO BIT OF SRC FORMAT
SRCMD	EQU	12	; MED BIT OF SRC FORMAT
SRCHI	EQU	13	; HI BIT OF SRC FORMAT
DPREC	EQU	14	; DOUBLE OPERATION
SPREC	EQU	15	; SINGLE OPERATION (TST.L)

;-----------------------------------------------------------
; TESTS FOR OPERATIONS, ALL AS WORD TESTS.  AND SOME
; USEFUL OPCODES FOR B<->D CONVERSIONS.
;-----------------------------------------------------------
OPIFCPX	EQU	1	; 1 IFF CMPX VS CMP
OPIFTR	EQU	1	; 1 IFF TRUNC VS ROUND
OPAMASK	EQU	$001E	; ISOLATE OPCODE BITS
OPFOMASK EQU	$3800	; TO GET SRC FORMAT BITS
OPADD	EQU	$0000	; ADD OPCODE
OPMUL	EQU	$0004	; MULTIPLY OPCODE
OPDIV	EQU	$0006	; DIVIDE OPCODE
OPCMP	EQU	$0008	; COMPARE WITHOUT EXCEPTIONS
OP2EXT	EQU	$000E	; CONVERT TO EXTENDED
OPEXT2	EQU	$0010	; CONVERT FROM EXTENDED
OPRINT	EQU	$0014	; ROUND TO INTEGER
OPCLASS	EQU	$001C	; CLASS

;-----------------------------------------------------------
; MODE BITS AND MASKS IN BYTE.
;-----------------------------------------------------------
RNDMSK	EQU	$60	; AS THOUGH IN LOW WORD
RNDUP	EQU	$20
RNDDN	EQU	$40
RND0	EQU	$60
RNDLO	EQU	5
RNDHI	EQU	6	; LEAD RND BIT

DBRMSK	EQU	$8f	; KILL RND BITS AND INEXACT

RNDINC	EQU	7	; IN LOW BYTE OF WORD
PRECMSK	EQU	RNDMSK	; IN LOW BYTE OF WORD

;-----------------------------------------------------------
; CONSTANT TO TWEAK NAN BIT IN HIGH LONG WORD OF SIG FIELD	<26MAR85>
;-----------------------------------------------------------
QNANBIT	EQU	30	; 1-QUIET 0-SIGNALING		<26MAR85>

;-----------------------------------------------------------
; ADDRESS OF ENVIRONMENT WORD AND HALTVECTOR IN LOW MEMORY
;-----------------------------------------------------------
FPSTATE	EQU	$A4A
FPHV	EQU	$A4C