; ; File: VSCEqu.a ; ; Contains: VSC Equates ; ; Written by: Russ Emmons ; ; Copyright: © 1992-1993 by Apple Computer, Inc., all rights reserved. ; ; Change History (most recent first): ; ; 12/13/93 PN Roll in KAOs and Horror changes to support Malcom and AJ ; machines ; <1> 12-04-92 jmp first checked in ; ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ; Pre-SuperMario comments begin here. ; ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ ;

6/30/92 HJR Changed vidPowerSelect to cscLowPwrSelect. Turned on hasMotPLL ; since Dartanian has a Motorola part. ;

5/7/92 HJR Added vidPowerSelect to the Control Call list. ; <1> 4/24/92 HJR first checked in ; <6> 3/3/92 RLE add some scc equates ; <5> 2/27/92 RLE add register defs to support new scsi disk mode scheme ; <4> 2/20/92 RLE changes to registers for scsi disk mode, eject, lock ; <3> 2/13/92 RLE add more vsc registers ; <2> 2/12/92 RLE add clock/power signals ; <1> 2/12/92 RLE first checked in ; ; ;-------------------------------------------------------------------- ; chip base addresses ;-------------------------------------------------------------------- hasMotPLL EQU 1 ; Dartanian does have a Motorola PLL kDBLiteVBLTime EQU -16626 ; 60.14742 Hz using the microsecond timer. vscBase EQU $FEE00000 ; base of the VSC on Deskbar/Gemini vscSCSIAddr EQU $FEE02000 ; SCSI registers base address vscSCSIDMAAddr EQU $FEE04000 ; SCSI DMA base address (if any) vscSCSIHskAddr EQU $FEE06000 ; SCSI handshake base address vscSCCAddr EQU $FEE08000 ; SCC base address ;-------------------------------------------------------------------- ; miscellaneous control/status ;-------------------------------------------------------------------- vscPortB EQU $00 ; VSC Port B Data Register busLock EQU $01 ; 0=prevent NuBus from asking for processor bus tma1 EQU $04 ; NuBus error code tma0 EQU $05 ; NuBus error code ;-------------------------------------------------------------------- ; VSC Interrupts ;-------------------------------------------------------------------- vscIFR EQU $03 ; VSC interrupt flag register scsiDRQ EQU $00 ; 1=DMA request from SCSI chip anySlot EQU $01 ; 1=interrupt pending from VBL or NuBus slot scsiIRQ EQU $03 ; 1=interrupt pending from SCSI chip vscIRQ EQU $07 ; 1=one or more bits 0-6 are set ;-------------------------------------------------------------------- ; VSC Interrupt Enables ;-------------------------------------------------------------------- vscIER EQU $13 ; VSC interrupt enable register scsiDRQEn EQU $00 ; 1=interrupts enabled from SCSI DMA Requests anySlotEn EQU $01 ; 1=interrupts enabled from VBL or NuBus slot ejectEn EQU $02 ; 1=interrupts enabled from eject mechanism scsiEn EQU $03 ; 1=interrupts enabled from SCSI chip enetEn EQU $04 ; 1=interrupts enabled from SONIC setEnable EQU $07 ; /1=set interrupt enables corresponding to 1's in bits 0-6 ; \0=clear interrupt enables corresponding to 1's in bits 0-6 ;-------------------------------------------------------------------- ; VSC Configuration ;-------------------------------------------------------------------- vscConfig EQU $10 ; VSC configuration register ;-------------------------------------------------------------------- ; power and clock control ;-------------------------------------------------------------------- vscClockPower EQU $21 ; VSC register vscVideoPower EQU $00 ; 1=turn on video power vscSCCclock EQU $01 ; 1=turn on SCC clock vscSCSIreset EQU $02 ; 1=let SCSI chip run vscSWIMctl EQU $03 ; 1=SWIM signals active, 0=SWIM signals tri-stated ; Misc equatesÉ ; CurVSCDrvrVersion EQU $0002 ; Dart is 0.0; Disk is 0.1; BB is 0.2. ROMSize EQU $10000 ; config ROM section size in bytes, required for fHeader block ROMRevLevel Equ CurVSCDrvrVersion seSuccess EQU 1 ; sucessful sExec ClrDepthBitsMask EQU $F8 ; bit mask to clear Ariel control register screen ; depth bits (top 5 bits) indexEntries EQU -1 ; -1 mode for Get/SetEntries. burnInSiz EQU $0004 ; Number of bytes in pRAM for burn-in signature. burnInLoc EQU $00FC ; Where burn-in signature starts in pRAM. burnInSig EQU 'RNIN' ; The burn-in signature. burnInSigAlt Equ 'SRNN' ; The alternate burn-in signature. burnInSig12 Equ 'RN12' ; These are the new burn-in signatures. They burnInSig13 Equ 'RN13' ; define all the Apple-produced displays. burnInSig15 Equ 'RN15' ; We could define similar signatures for burnInSig16 Equ 'RN16' ; things like VGA, NTSC, and PAL, but the burnInSig19 Equ 'RN19' ; factory probably couldnÕt use them anyway. burnInSig21 Equ 'RN21' ; Timing mode constants for Display Manager MultiMode support ; Corresponding .h equates are in DisplaysPriv.h ; .a equates are in DepVideoEqu.a ; .r equates are in DepVideoEqu.r timingInvalid Equ 0 ; Unknown timingÉ force user to confirm. timingApple12 Equ 130 ; 512x384 (60 Hz) Rubik timing. timingApple12x Equ 135 ; 560x384 (60 Hz) Rubik-560 timing. timingApple13 Equ 140 ; 640x480 (67 Hz) HR timing. timingApple13x Equ 145 ; 640x400 (67 Hz) HR-400 timing. timingAppleVGA Equ 150 ; 640x480 (60 Hz) VGA timing. timingApple15 Equ 160 ; 640x870 (75 Hz) FPD timing. timingApple15x Equ 165 ; 640x818 (75 Hz) FPD-818 timing. timingApple16 Equ 170 ; 832x624 (75 Hz) GoldFish timing. timingAppleSVGA Equ 180 ; 800x600 (56 Hz) SVGA timing. timingApple1Ka Equ 190 ; 1024x768 (60 Hz) VESA 1K-60Hz timing. timingApple1Kb Equ 200 ; 1024x768 (70 Hz) VESA 1K-70Hz timing. timingApple19 Equ 210 ; 1024x768 (75 Hz) Apple 19" RGB. timingApple21 Equ 220 ; 1152x870 (75 Hz) Apple 21" RGB. timingAppleNTSC_ST Equ 230 ; 512x384 (60 Hz, interlaced, non-convolved). timingAppleNTSC_FF Equ 232 ; 640x480 (60 Hz, interlaced, non-convolved). timingAppleNTSC_STconv Equ 234 ; 512x384 (60 Hz, interlaced, convolved). timingAppleNTSC_FFconv Equ 236 ; 640x480 (60 Hz, interlaced, convolved). timingApplePAL_ST Equ 238 ; 640x480 (50 Hz, interlaced, non-convolved). timingApplePAL_FF Equ 240 ; 768x576 (50 Hz, interlaced, non-convolved). timingApplePAL_STconv Equ 242 ; 640x480 (50 Hz, interlaced, non-convolved). timingApplePAL_FFconv Equ 244 ; 768x576 (50 Hz, interlaced, non-convolved). MACRO _CLUTDelay ; tst.b ([VIA],0) Nop ENDM ; Various extra Control/Status calls used by built-in video ; cscSyncOnGreen Equ 128 ; Used for enabling/disabling sync on green. cscAltSense Equ 131 ; Used for enabling sRsrcs via the alternate sense pRAM byte. cscPowerSelect Equ 132 ; Turn on/off power to the video circuitry (VSC/Jet/Keystone). cscSleepWake Equ 134 ; Sleep/Wake the video circuitry (in some cases, could be the same as cscPowerSelect). powerSelSig Equ 'powr' ; Signature returned in csData by the cscPowerSelect status call. sleepWakeSig Equ 'slwk' ; Signature returned in csData by the cscSleepWake status call. ; Slot pRAM ; ; Slot pRam is used in various ways. The first two bytes are used by the Slot Manager to record ; the slotÕs boardID. The remaining bytes are left undefined by the Slot Manager. Built-in ; video uses Slot pRam as follows: ; SP_Params RECORD 0 SP_BoardID ds.w 1 ; BoardID. SP_Depth ds.b 1 ; spID of Depth (Mode). (vendorUse1) SP_LastConfig ds.b 1 ; spID of last boot-up configuration. (vendorUse2) SP_DfltConfig ds.b 1 ; spID of default configurationÉ (vendorUse3) SP_MonID ds.b 1 ; Sense code of last display. (vendorUse4) SP_Flags ds.b 1 ; Various flags. (vendorUse5) SP_AltSense Ds.b 1 ; Alternate senseID byte. (vendorUse6) SP_Size EQU * ; Slot pRAM flag bits ; spSyncOnGreen Equ 0 ; True if weÕre supposed to put sync on green. spAltSenseEnb Equ 1 ; True if AltSense was used before (for keeping SOG state). spVRAMBit0 Equ 2 ; These two bits are used to encode the amount ofÉ spVRAMBit1 Equ 3 ; ÉvRAM currently available. numSPVRamBits Equ 2 ; Width for Bfins/Bfext of spVRAMBits spVRAMBits Equ 31-spVRAMBit1 ; Offset for Bfins/Bfext. spUseAltClk Equ 4 ; True if we have a Puma instead of a Clifton/Clifton+. spFamilyChanged Equ 5 ; True if the family mode changed; always reset during PrimaryInit. spAltSenseValidMask Equ $40 ; Upper two bits must be valid in order to use lower six. spAltSenseMask Equ $3F ; Lower six bits are the indexed (mapped) sense code. spAltSenseDisable Equ $80 ; Bits used for temporarily disabling the alternate senseID. ENDR ; Definition of each of the entries in the ÔscrnÕ resource. ; ScrnRecord RECORD 0 srDrvrHW ds.w 1 ; Hardware id of video card. srSlot ds.w 1 ; Slot number. srDCtlDevBase ds.l 1 ; DCtlDevBase (baseAddr) from AuxDCE. srMode ds.w 1 ; Mode (spID) of depth. srFlagMask ds.w 1 ; ???? srFlags ds.w 1 ; GDevice flags. srColorTable ds.w 1 ; RsrcID of desired ÔclutÕ. srGammaTable ds.w 1 ; RsrcID of desicred ÔgamaÕ. srRect ds.w 4 ; GDevice rectangle. srCtlCount ds.w 1 ; ???? ScrnRecSize EQU * ENDR ; ; Various VSC equatesÉ ; ; The following record describes the video parameters for VSC built-in video. The first ; set of parameters are for the PLL (clock generator) chip. The other parameters are ; for graying the screen, setting up sRsrcs, etcÉ. ; VSCVidParams RECORD 0 vvpClockWord ds.l 1 ; PLL serial bit config word vvpBitCount ds.w 1 ; # bits to send in config word VVPClkSize Equ * vvpHFP ds.b 1 ; horiz. front porch vvpHS ds.b 1 ; horiz. sync vvpHBP ds.b 1 ; horiz. back porch vvpHA ds.b 1 ; horiz. active dots vvpSyncA ds.b 1 ; SyncA vvpVFP ds.b 2 ; vert. front porch vvpVS ds.b 2 ; vert. sync vvpVBP ds.b 2 ; vertical back porch vvpVA ds.b 2 ; vertical active lines vvpMaxModeBase EQU * vvp512Max ds.b 1 ; max mode for 512K VRAM vvp1024Max ds.b 1 ; max mode for 1024K VRAM ds.b 1 ; vvpNumRows ds.w 1 ; Number of rows (-1). vvPHdrSize EQU * vvp1bppRowBytes ds.w 1 ; 1bpp rowbytes. vvp2bppRowBytes ds.w 1 ; 2bpp rowbytes. vvp4bppRowBytes ds.w 1 ; 4bpp rowbytes. vvp8bppRowBytes ds.w 1 ; 8bpp rowbytes. vvp16bppRowBytes ds.w 1 ; 16bpp rowbytes. VVPSize EQU * ENDR ;-------------------------------------------------------------------------------------- ; The senselines for VSC-based systems are very similar to Sonora. Bits 0-2, when set, ; are active, and are driven to the state of bit 3. When bits 0-2 are clear, the sense line ; outputs are tri-stated. ;-------------------------------------------------------------------------------------- VSCSenseLineA EQU 2 ; Numbers for bit-I/O on VSC senselines. VSCSenseLineB EQU 1 ; VSCSenseLineC EQU 0 ; VSCAMask EQU %0100 ; Masks for reading/writing VSC senselines. VSCBMask EQU %0010 ; VSCCMask EQU %0001 ; ;-------------------------------------------------------------------------------------- ; VSC supports several displays that are in the ÒextendedÓ sense line range. Since the raw ; values that come back from doing the extended sense-line algorithm do not map into a nice ; tablular form like the ÒnormalÓ sense line codes do, we map the few extended-sense-line displays ; that we support into the bottom of the normal sense line table. ; ; Notes: The ÒnormalÓ sense displays fall in the range of 0..7, where 7 means Ògo try the ; extended sense codes.Ó So, we map the extended sense codes from 8 (yeah, we have ; blank entry). ; ; Radius exploits the fact that the extended sense algorithm is generally only tried ; when a 7 is read back. That is, for their two TPD displays (one color, the other ; monochrome), they use 3 as the trigger for doing the extended sense algorithm. To ; distinguish the two displays from each other, they just reverse the polarity of the ; the diode on sense lines b & c. (Note: This technique could be used for sense ; codes 5 and 6, too.) ; ; So, it should be noted, that there are four types of extended sense codes. We ; just use types 3, 6, and 7; type 5 is reserved. ; ;-------------------------------------------------------------------------------------- extended2P Equ $35 ; Raw Extended Sense for the Two-Page Display. extended2PRdRGB Equ $31 ; Raw Extended Sense for RadiusÕ Color TPD. extended2PRdMono Equ $34 ; Raw Extended Sense for RadiusÕ Mono TPD. extendedRGBFP Equ $1E ; Raw Extended Sense for the RGB Full-Page Display. extendedHR Equ $2B ; Raw Extended Sense for the Hi-Res Display (type-6 extended sense). extendedMSB1 Equ $03 ; Raw Extended Sense for Band-1 Multiscan Displays (14", GS thru GF). extendedMSB2 Equ $0B ; Raw Extended Sense for Band-2 Multiscan Displays (17", HR thru 19). extendedMSB3 Equ $23 ; Raw Extended Sense for Band-3 Multiscan Displays (20", HR thru 2P). extendedNoConnect Equ $3F ; Raw Extended Sense for no connect. extendedSensePALBox Equ $00 ; Raw Extended Sense for PAL Encoder. extendedSenseNTSC Equ $14 ; Raw Extended Sense for NTSC Encoder. extendedSenseVGA Equ $17 ; Raw Extended Sense for VGA. extendedSenseLP Equ $2D ; Raw Extended Sense for GoldFish. extendedSenseGF Equ $2D ; Raw Extended Sense for GoldFish. extendedSensePAL Equ $30 ; Raw Extended Sense for PAL. extendedSense19 Equ $3A ; Raw Extended Sense for Third-Party 19Ó Displays. indexedSenseRGB2P Equ 0 ; For switching to 16bpp. indexedSenseFP Equ 1 ; For Mono-Only configs. indexedSenseRubik Equ 2 ; For factory burn-in testing. indexedSense2P Equ 3 ; For Mono-Only configs. indexedSenseNTSC Equ 4 ; To Map NTSC encoder boxes to NTSC displays. indexedSenseRGBFP Equ 5 ; For switching to 16bpp. indexedSenseHR Equ 6 ; DAF said we should do HR for the factory. indexedNoConnect Equ 7 ; (Here for consistency only.) indexedSenseVGA Equ 8 ; Mapped Sense For VGA. indexedSensePAL Equ 9 ; Mapped Sense For PAL. indexedSenseLP Equ 10 ; Mapped Sense For GoldFish. indexedSenseGF Equ 10 ; Mapped Sense For GoldFish. indexedSense19 Equ 11 ; Mapped Sense For 19" Displays. indexedSenseMSB1 Equ 12 ; Mapped Sense For Band-1 Multiscan Displays. indexedSenseMSB2 Equ 13 ; Mapped Sense For Band-2 Multiscan Displays. indexedSenseMSB3 Equ 14 ; Mapped Sense For Band-3 Multiscan Displays. ; Flags within GFlags word GrayFlag EQU 15 ; luminance mapped if GFlags(GrayFlag) = 1 IntDisFlag EQU 14 ; interrupts disabled if GFlags(IntFlag) =1 IsMono EQU 13 ; true if monochrome only display (Portrait) UseSeq EQU 12 ; true if sequence mode SetEntries PsuedoIndex EQU 11 ; true if SetEntries request was mapped to indexed from sequential ; (due to screen depth hardware requirements) IsDirect EQU 10 ; true if direct video mode, else chunkyIndexed IsSleeping Equ 9 ; True if CPU is sleeping. ;--------------------------------------------------- ; ; Rowbytes, page count, and bounds constants ; ;--------------------------------------------------- ; rowbytes constants for the Mac II Hi-Res monitor/VGA monitor ; OBMHRRB EQU 80 ; rowbytes for one-bit mode TBMHRRB EQU 160 ; rowbytes for two-bit mode FBMHRRB EQU 320 ; rowbytes for four-bit mode EBMHRRB EQU 640 ; rowbytes for eight-bit mode ; rowbytes constants for the Mono/RGB Full-Page Display ; OBMFPRB EQU 80 ; rowbytes for one-bit mode TBMFPRB EQU 160 ; rowbytes for two-bit mode FBMFPRB EQU 320 ; rowbytes for four-bit mode EBMFPRB EQU 640 ; rowbytes for eight-bit mode ; rowbytes constants for the noninterlaced Apple // GS (Rubik) Monitor ; OBMGSRB EQU 64 ; rowbytes for one-bit mode TBMGSRB EQU 128 ; rowbytes for two-bit mode FBMGSRB EQU 256 ; rowbytes for four-bit mode EBMGSRB EQU 512 ; rowbytes for eight-bit mode ; rowbytes constants for the GoldFish Display ; OBMGFRB EQU 104 ; rowbytes for one-bit mode TBMGFRB EQU 208 ; rowbytes for two-bit mode FBMGFRB EQU 416 ; rowbytes for four-bit mode EBMGFRB EQU 832 ; rowbytes for eight-bit mode ; rowbytes constants for the SuperVGA Display ; OBMSVGARB EQU 100 ; rowbytes for one-bit mode TBMSVGARB EQU 200 ; rowbytes for two-bit mode FBMSVGARB EQU 400 ; rowbytes for four-bit mode EBMSVGARB EQU 800 ; rowbytes for eight-bit mode ; rowbytes constants for VESA 1024x768 60Hz ; OBM1KRB Equ 128 ; rowbytes for one-bit mode TBM1KRB Equ 256 ; rowbytes for two-bit mode FBM1KRB Equ 512 ; rowbytes for four-bit mode ; page counts for all (maybe one of these days weÕll support more than one page?) ; OBMPagesHR EQU 1 TBMPagesHR EQU 1 FBMPagesHR EQU 1 EBMPagesHR EQU 1 OBMPagesFP EQU 1 TBMPagesFP EQU 1 FBMPagesFP EQU 1 EBMPagesFP EQU 1 OBMPagesGS EQU 1 TBMPagesGS EQU 1 FBMPagesGS EQU 1 EBMPagesGS EQU 1 OBMPagesGF EQU 1 TBMPagesGF EQU 1 FBMPagesGF EQU 1 EBMPagesGF EQU 1 OBMPagesSVGA EQU 1 TBMPagesSVGA EQU 1 FBMPagesSVGA EQU 1 EBMPagesSVGA EQU 1 OBMPages1K EQU 1 TBMPages1K EQU 1 FBMPages1K EQU 1 EBMPages1K EQU 1 ;------------------------ ; Bounds constants ;------------------------ ; for the Mac II Hi-Res Monitor ; defmBounds_THR EQU 0 ; top defmBounds_LHR EQU 0 ; left defmBounds_BHR EQU 480 ; bottom defmBounds_RHR EQU 640 ; right ; for the Full Page Display ; defmBounds_TFP EQU 0 ; top defmBounds_LFP EQU 0 ; left defmBounds_BFP EQU 870 ; bottom defmBounds_RFP EQU 640 ; right ; for the Full Page Display (alternate size) ; defmBounds_TFPb EQU 0 ; top defmBounds_LFPb EQU 0 ; left defmBounds_BFPb EQU 818 ; bottom defmBounds_RFPb EQU 640 ; right ; for the noninterlaced Apple // GS Monitor ; defmBounds_TGS EQU 0 ; top defmBounds_LGS EQU 0 ; left defmBounds_BGS EQU 384 ; bottom defmBounds_RGS EQU 512 ; right ; for VGA-compatible displays ; defmBounds_TVGA EQU 0 ; top defmBounds_LVGA EQU 0 ; left defmBounds_BVGA EQU 480 ; bottom defmBounds_RVGA EQU 640 ; right ; for SuperVGA-compatible displays ; defmBounds_TSVGA EQU 0 ; top defmBounds_LSVGA EQU 0 ; left defmBounds_BSVGA EQU 600 ; bottom defmBounds_RSVGA EQU 800 ; right ; for Landscape Page (Goldfish) displays ; defmBounds_TGF EQU 0 ; top defmBounds_LGF EQU 0 ; left defmBounds_BGF EQU 624 ; bottom defmBounds_RGF EQU 832 ; right ; for 19Ó displays ; defmBounds_T1K EQU 0 ; top defmBounds_L1K EQU 0 ; left defmBounds_B1K EQU 768 ; bottom defmBounds_R1K EQU 1024 ; right ; ; screen resolution in dpi (fixed format) ; HResHR EQU $480000 ; 72 HPixels/inch VResHR EQU $480000 ; 72 VPixels/inch HResFP EQU $500000 ; 80 HPixels/inch VResFP EQU $500000 ; 80 VPixels/inch HResGS EQU $480000 ; 72 HPixels/inch VResGS EQU $480000 ; 72 VPixels/inch HResLP EQU $480000 ; 72 HPixels/inch VResLP EQU $480000 ; 72 VPixels/inch HResGF EQU $480000 ; 72 HPixels/inch VResGF EQU $480000 ; 72 VPixels/inch HResSVGA EQU $480000 ; 72 HPixels/inch VResSVGA EQU $480000 ; 72 VPixels/inch HRes1K EQU $480000 ; 72 HPixels/inch VRes1K EQU $480000 ; 72 VPixels/inch ;--------------------------------------------------- ; ; Miscellaneous constants ; ;--------------------------------------------------- IndexedBlack EQU -1 ; black for indexed modes DirectBlack EQU 0 ; black for direct modes IndexedWhite EQU 0 ; white for indexed modes DirectWhite EQU -1 ; white for direct modes OneBitGray EQU $AAAAAAAA TwoBitGray EQU $CCCCCCCC FourBitGray EQU $F0F0F0F0 EightBitGray EQU $FF00FF00 SixteenBitGray EQU $0000FFFF GrayPatSize EQU 4 defVersion EQU 0 ; Version = 0 defPixelType EQU 0 ; pixeltype=chunky ChunkyDirect EQU 16 ; pixelType=ChunkyDirect defCmpCount EQU 1 ; Number of components in pixel defmPlaneBytes EQU 0 ; Offset from one plane to the next defmDevType EQU clutType ; clutType = 0 defMinorBase EQU 0 ; Video RAM Offset is 0 ;---------------------------------------------------------------------------------- ; Here are the minor lengths for VSC ;---------------------------------------------------------------------------------- MinorLength_VSC_FPa EQU (FBMFPRB*defmBounds_BFP) MinorLength_VSC_FPb EQU (EBMFPRB*defmBounds_BFPb) MinorLength_VSC_GS EQU (EBMGSRB*defmBounds_BGS) MinorLength_VSC_HR EQU (EBMHRRB*defmBounds_BHR) MinorLength_VSC_GF EQU (EBMGFRB*defmBounds_BGF) MinorLength_VSC_SVGA EQU (EBMSVGARB*defmBounds_BSVGA) MinorLength_VSC_1K Equ (FBM1KRB*defmBounds_B1K) defmBaseOffset EQU $100000 ; Offset to base of video RAM ;-------------------------------------------------------------------- ; Various hardware equates. ;-------------------------------------------------------------------- AIV3Base EQU $FEE00000 ; base address of AIV3 (Apple Integrated VIA 3) AIV3SlotInt EQU $0002 slotC EQU 3 slotD EQU 4 slotVBL EQU 6 AIV3PortBData Equ $0000 pumaId Equ 0 syncOnGreenCtl Equ 6 AIV3PortBDir Equ $0001 pumaIdDir Equ 0 syncOnGreenDir Equ 6 AIV3Int EQU $0003 AIV3cfg EQU $0010 ; configuration register in AIV3 SpeedCtl Equ 0 ; If set, adds wait states for 33MHz CPUs. BufCtl Equ 1 ; If set, combines video and general purpose buffers. SClock Equ 5 ; Used to clock in serial data. SData Equ 6 ; The data to be clocked in. AIV3SlotEn EQU $0012 ; slot interrupt enable register VBLIntEn EQU 6 ; enable bit for VSC video's VBL AIV3IntEn EQU $0013 ; interrupt enable register AIV3PwrEn EQU $0021 ; Power/clock control register VidPwrEn EQU 0 ; enables video power plane. SCCClkEn EQU 1 ; enables SCC 3.67 MHZ clock SCSIRstEn EQU 2 ; enables SCSI Reset line FloppyCtlEn EQU 3 ; enables SWIM II signals FloppyPwrEn EQU 4 ; enables floppy power plane VDACBase EQU AIV3Base+$0E000 ; Base address of our VDAC VSCVideoBase EQU $FEEFE000 ; Base address of video registers in VSC VSC_MonID EQU $0004 ; monitor ID register VSC_Depth EQU $0008 ; pixel depth register VSC_BusInt EQU $000C ; RAM cycle timing parameters VSC_VidCtrl EQU $0010 ; video enable register VSCEnB0 EQU 0 ; bank 0 enable VSCEnB1 EQU 1 ; bank 1 enable VSCEnHSync EQU 2 ; horiz. sync enable VSCEnVSync EQU 3 ; vert. sync enable VSCEnCSync EQU 4 ; comp. sync enable VSCblankBit EQU 5 ; video blank enable VSCEnDotClk EQU 6 ; video dot clock enable VSCExtMuxDelay EQU 7 ; no external mux delay VSC_IntClear EQU $0014 ; any write will clear VBL interrupt VSC_HFP EQU $0040 VSC_HS EQU $0044 VSC_HBP EQU $0048 VSC_HA EQU $004C VSC_SyncA EQU $0050 VSC_VFP EQU $0054 VSC_VS EQU $0058 VSC_VBP EQU $005C VSC_VA EQU $0060 VSC_Test EQU $0070 vidReset Equ 5 VRAMBase EQU $FE100000 ; Base address of VRAM (512K-1Meg) Nuchip33Base EQU $50F28000 ; Base address of Nuchip33 NormalTrans EQU 0 ; pass addresses with normal nubus translation NoTrans EQU 1 ; pass addresses without translation IF hasMotPLL THEN firstCtrl EQU $1E05 ; Start PLL program sequence postCtrl EQU $1E04 ; Indicate end of user data finalCtrl EQU $1E00 ; Terminate sequence ctrlCount EQU $D ; Bit count for each control data word ELSE firstCtrl EQU $1E0D ; Start PLL program sequence postCtrl EQU $1E0C ; Indicate end of user data finalCtrl EQU $1E08 ; Terminate sequence ctrlCount EQU $D ; Bit count for each control data word ENDIF ;-------------------------------------------------------------------- ; sResource ID's for the config ROM ;-------------------------------------------------------------------- sRsrc_Board EQU $01 ; The Board sRsrc ID sRsrc_Vid_VSC_FPb EQU $80 ; Full-Page 1,2,4,8 sRsrc_Vid_VSC_FPa EQU $81 ; Full-Page 1,2,4 sRsrc_Vid_VSC_GS EQU $82 ; Rubik 1,2,4,8 sRsrc_Vid_VSC_RGBFPb EQU $84 ; RGB Full-Page 1,2,4,8 sRsrc_Vid_VSC_RGBFPa EQU $85 ; RGB Full-Page 1,2,4 sRsrc_Vid_VSC_HR EQU $86 ; HiRes 1,2,4,8 sRsrc_Vid_VSC_MSB1 Equ $87 ; MSB1 -> HR sRsrc_Vid_VSC_VGA EQU $88 ; VGA 1,2,4,8 sRsrc_Vid_VSC_SVGA EQU $89 ; Super VGA 1,2,4,8 sRsrc_Vid_VSC_GF EQU $8A ; GoldFish 1,2,4,8 sRsrc_Vid_VSC_MSB2 Equ $8B ; MSB2 -> MSB3 -> GF sRsrc_Vid_VSC_1K Equ $8C ; VESA (1024x768, 60 Hz), 1,2,4 sRsrc_Docking EQU $F0 ; docking functional sRsrc sRsrc_VSC_NeverMatch EQU $FE ; The ÒnullÓ VSC sRsrc.