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Resource forks are included only for .rsrc files. These are DeRezzed into their data fork. 'ckid' resources, from the Projector VCS, are not included. The Tools directory, containing mostly junk, is also excluded.
244 lines
8.9 KiB
Plaintext
244 lines
8.9 KiB
Plaintext
;
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; File: TFBPrimaryInit.a
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;
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; Contains: PrimaryInit code for the original Macintosh II Video Card.
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;
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; Written by: Ernie Beernik, George Norman, Dave Fung, Mike Puckett.
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;
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; Copyright: © 1990-1992 by Apple Computer, Inc. All rights reserved.
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;
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; This file is used in these builds: ROM
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;
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; Change History (most recent first):
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;
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; <SM2> 11/18/92 SWC Changed SlotEqu.a->Slots.a and VideoEqu.a->Video.a.
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; <2> 1/15/92 KC Repair "uncompleted conditional directive" error.
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; <1> 1/8/92 RB first checked in
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; ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
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; Terror ROM comments begin here.
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; ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
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; <5> 4/4/91 jmp Cleaned up the conditional assembly stuff (i.e., now use ForRom
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; instead of PadForOverPatch).
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; <4> 2/10/91 jmp Added interrupt disabling code during write to the CLUT (like
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; the driver code).
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; <3> 1/7/91 jmp Replaced an RTS that was accidently deleted.
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; <2> 1/6/91 jmp Cleaned up conditional assembly stuff.
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; <1> 11/19/90 jmp Checked into TERROR ROM build for the first time.
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; ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
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; Pre-Terror ROM comments begin here.
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; ÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑÑ
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; <C804> 2/13/87 DAF Changed CPUType to 68020
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; <C773> 2/9/87 GWN Set mode to One-bit (Copied from Driver). Disabled interrupts.
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; <C737> 2/2/87 DAF Added test for amount of RAM and adjusted slot rsrc table for
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; appropriate size.
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; <C510> 12/11/86 GWN Modified for new seBlock.
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; <C336> 11/3/86 GWN Changed to new Video parameters as described in video card spec.
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; (1,2,4 and 8-bit modes supported). Added mVertRefRate to video
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; parameters. Changed to new SDM format header (ByteLanes field).
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; Changed to 4-k ROM. Video driver is on ROM. Fixed video driver
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; bugs: (1) SetEntries trash A0, (2) SetEntries/GetEntries Data NOT.;
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; 9/19/86 GWN Removed interrupt handler.
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; 7/21/86 EHB TFB support.
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;
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If ForRom THEN
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LOAD 'StandardEqu.d'
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PRINT OFF
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INCLUDE 'ROMEqu.a'
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INCLUDE 'Slots.a'
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INCLUDE 'Video.a'
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INCLUDE 'TFBDepVideoEqu.a'
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PRINT ON
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TFBPrimaryInit Proc Export
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Bra.s Begin
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Else
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;-------------------------------------------------------------------
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; Header
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;-------------------------------------------------------------------
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DC.B sExec2 ;Code revision (Primary init)
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DC.B sCPU68020 ;CPU type is 68020 <C804/13Feb87 DAF>
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DC.W 0 ;Reserved
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DC.L Begin-* ;Offset to code.
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Endif
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;-------------------------------------------------------------------
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; Tables
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;-------------------------------------------------------------------
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; TFB Initialization. This data comes from the Macintosh II Video Card Theory of Operations, dated
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; 02/16/87, page 7. These values should only be loaded into TFB (from CardBase+TFBIBase) at system
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; reset time.
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;
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InitTbl DC.B $DF,$B8,$FF,$FF,$E1,$1A,$88,$B9,$FA,$FD,$FD,$FE,$F0,$BE,$FA,$37
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EndInitTbl
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SizeInitTbl EQU EndInitTbl-InitTbl
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; One-bit Mode Table. These values are given on page 6 of the Macintosh II Video Card Theory of
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; Opertaions document.
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;
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OneBitTbl DC.B $20,$47,$00,defmBaseOffset/4,$1E,$E5,$77,$46,$05,$02,$02,$01,$0F,$41,$05,$C8
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End1BitTbl
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Size1BitTbl EQU End1BitTbl-OneBitTbl
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;-------------------------------------------------------------------
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; PrimaryInit
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;-------------------------------------------------------------------
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; Set initial vendor status and save vars.
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;
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WITH seBlock
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Begin
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If ForRom Then ; For Terror ROM, PrimaryInit is NOT executed thru _sExec.
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SaveRegs Reg A0-A2/D0-D3 ; So, we need to save our work registers.
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Movem.l SaveRegs,-(Sp)
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Endif
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MOVE.W #1,seStatus(A0) ;VendorStatus <- 1 {Code was executed}
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MOVE.L A0,A3 ;save param block {A0 is destroyed}
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; Turn the slot number into a base address. Note: When finished, A2 contains slotBase.
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;
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MOVEQ #0,D0 ;D0 <- 00000000
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MOVE.B seSlot(A0),D0 ;D0 <- 0000000s
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LSL.W #4,D0 ;D0 <- 000000s0
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OR.B seSlot(A0),D0 ;D0 <- 000000ss
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OR.W #$F00,D0 ;D0 <- 00000Fss
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SWAP D0 ;D0 <- 0Fss0000
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LSL.L #4,D0 ;D0 <- Fss00000
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MOVE.L D0,A2 ;A2 <- Base address to the slot.
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; Reset the hardware.
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;
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MOVE.L A2,A0 ;get slot base
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ADD.L #TFBIBase,A0 ;point to registers
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LEA InitTbl,A1 ;get data pointer
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MOVEQ #(SizeInitTbl-1),D0 ;set init table size
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@0 MOVE.B (A1)+,(A0) ;set one byte
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SUBQ #4,A0 ;back up to prev register
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DBRA D0,@0 ;repeat until done
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; Set mode to one bit per pixel.
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;
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MOVE.L A2,A0 ;get slot base <C773>
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ADD.L #TFBBase,A0 ;point to registers <C773>
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LEA OneBitTbl,A1 ;point to depth data <C773>
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MOVEQ #(Size1BitTbl-1),D0 ;set 1-bit table size <C773>
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@1 MOVE.B (A1)+,D1 ;get a byte <C773>
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NOT.B D1 ;invert it <C773>
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MOVE.B D1,(A0) ;write one byte <C773>
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ADDQ #4,A0 ;bump to next register <C773>
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DBRA D0,@1 ;=>repeat until done <C773>
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; Disable interrupts.
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;
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MOVE.L A2,A0 ;get slot base <C773>
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ADD.L #DisableVInt,A0 ;Adjust the base <C497><C773>
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CLR.B (A0) ;Disable interrupt from card <C497><C773>
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MOVE.W SR,-(SP) ; preserve the status register
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MOVEQ #7,D0 ; get mask in D0
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AND.B (SP),D0 ; get the interrupt level
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SUBQ.B #2,D0 ;
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BGE.S @OK ; if ³, then don't change
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ORI.W #$0200,SR ; raise above level-2
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ANDI.W #$FAFF,SR ; make it level-2
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@OK
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; Load CLUT as half-white/half-black.
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;
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DoTbl MOVE.L A2,A0 ;get slot base
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Add.l #ClrTbl,A0 ;point to clut address space.
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Moveq #0,D0 ;Start at address 0 in the CLUT:
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Not.b D0 ; Invert for Nubus, and
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Move.b D0,wClutAddReg(A0) ; write it out.
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Add.l #wClutDataReg,A0 ;point to clut data reg.
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MOVEQ #-1,D1 ;first half of table is FF (-1)
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MOVE #128*3-1,D0 ;do all values in table (*3 for r,g,b)
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@0 MOVE.B D1,(A0) ;write next byte
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DBRA D0,@0 ;=>repeat until done
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MOVEQ #$00,D1 ;second half of table is 00
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MOVE #128*3-1,D0 ;do all values in table (*3 for r,g,b)
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@1 MOVE.B D1,(A0) ;write next byte
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DBRA D0,@1 ;=>repeat until done
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MOVE.W (SP)+,SR ; restore status register.
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; Size the RAM on the video card. To do this, we look for a nice longword in the second
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; half of the frame buffer array that doesn't show up on the screen. I've selected the
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; last longword of the first scanline that is a multiple of 8 in the second RAM bank (line 264).
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; This alignment guarantees that this memory is off the right edge in all pixel depths
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; when the frame buffer base addr is on a normal page boundary.
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;
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; <C737/02Feb87> DAF
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;
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WITH spBlock ;use the template
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SizeTestVRAM
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SUBA #spBlockSize,SP ;make an SDM parameter block on stack
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MOVE.L SP,A0 ;get pointer to parm block now
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MOVE.B seSlot(A3),spSlot(A0) ;put slot in pBlock
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CLR.B spExtDev(A0) ;external device = 0
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MOVE.L #TFBTestPos,D1 ;get offset in D1
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MOVE.L #TFBTestPat,(A2,D1.L) ;write to alleged RAM
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MOVE.L #-1,-(SP) ;write out some garbage to clear data lines
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ADDQ #4,SP ;and pitch it
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MOVE.L (A2,D1.L),D0 ;read pattern back
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CMP.L #TFBTestPat,D0 ;did it stick?
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BEQ.S @1 ;if equal, we have ram
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MOVE.B #sRsrcVideo8,spID(A0) ;if not, remove 8-bit table
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BRA.S @2
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@1
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CLR.B (A2,D1.L) ;clear RAM of test pattern (for MaxAppleZoom)
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MOVE.B #sRsrcVideo4,spID(A0) ;remove 4-bit table if we have ram
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@2
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_sDeleteSRTRec ;remove the invalid entry
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BNE.S @3 ;
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MOVE #2,seStatus(A3) ;mark the change
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@3 ADDA #spBlockSize,SP ;clean up the caca...
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; Clear video RAM to a nice grayÉ
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;
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MOVE.L #$AAAAAAAA,D0 ;1-bit graypattern ($A=b1010)
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MOVE.L D0,D1
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NOT.L D1
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MOVE.W #defScrnRow,D4 ;sRow := defScrnRow {Bytes per pixel line}
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MOVE.W #$200*4-1,D3 ;sHei := defScrnHeight {Screen Height in pixels}
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MOVE.L A2,A1 ;init row pointer ;REPEAT
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@nxtRow MOVE.L A1,A0 ;get next row
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MOVE.W #defScrnRow/4-1,D2 ; rowlongs := defScrnRow/4 - 1 {How many Longs there are}
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@nxtLong MOVE.L D0,(A0)+ ; (A0) := graypat(1/2)
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DBF D2,@nxtLong ; UNTIL rowlongs < 0
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EXG D0,D1 ; graypat1 <-> graypat2
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ADD.W D4,A1 ; A2 := A2 + sRow
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DBF D3,@nxtRow ;UNTIL sHei < 0
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If ForRom Then
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Movem.l (Sp)+,SaveRegs
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Endif
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RTS
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If ForRom Then
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Endp
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Endif
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End ; <2>
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