2018-07-24 04:56:38 +00:00
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; Indexing this table:
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; bits 0-23 MRCode
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; bits 24-26 number of bytes to access minus one
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; bit 27 one for load, zero for store
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; bits 28-30 alignment modulus
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; bit 31 zero (entries are 2b)
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; "Alignment modulus":
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; If the "string" to be accessed is right-aligned to an 8b boundary, modulus is 0.
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; Modulus then increases by 1 for every increase in the address of the "string".
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; Interpreting this table:
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; Each entry refers to a routine
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MACRO
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memtabRow &label
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2018-07-24 11:43:17 +00:00
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DC.W (&label-MRBase) - (*-MRMemtab)
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2018-07-24 04:56:38 +00:00
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ENDM
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MRMemtab
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2018-07-24 11:43:17 +00:00
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memtabRow MRStore8 ; 8-byte stores
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memtabRow MRStore1241 ; mod 1
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memtabRow MRStore242 ; mod 2
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memtabRow MRStore1421 ; mod 3
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memtabRow MRStore44 ; mod 4
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memtabRow MRStore1241 ; mod 5
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memtabRow MRStore242 ; mod 6
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memtabRow MRStore1421 ; mod 7
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memtabRow MRLoad8 ; 8-byte loads
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memtabRow MRLoad1241 ; mod 1
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memtabRow MRLoad242 ; mod 2
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memtabRow MRLoad1421 ; mod 3
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memtabRow MRLoad44 ; mod 4
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memtabRow MRLoad1241 ; mod 5
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memtabRow MRLoad242 ; mod 6
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memtabRow MRLoad1421 ; mod 7
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2018-07-24 04:56:38 +00:00
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memtabRow MRStore1 ; 1-byte stores
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memtabRow MRStore1 ; mod 1
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memtabRow MRStore1 ; mod 2
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memtabRow MRStore1 ; mod 3
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memtabRow MRStore1 ; mod 4
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memtabRow MRStore1 ; mod 5
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memtabRow MRStore1 ; mod 6
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memtabRow MRStore1 ; mod 7
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memtabRow MRLoad1 ; 1-byte loads
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memtabRow MRLoad1 ; mod 1
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memtabRow MRLoad1 ; mod 2
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memtabRow MRLoad1 ; mod 3
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memtabRow MRLoad1 ; mod 4
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memtabRow MRLoad1 ; mod 5
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memtabRow MRLoad1 ; mod 6
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memtabRow MRLoad1 ; mod 7
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memtabRow MRStore2 ; 2-byte stores
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memtabRow MRStore11 ; mod 1
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memtabRow MRStore2 ; mod 2
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memtabRow MRStore11 ; mod 3
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memtabRow MRStore2 ; mod 4
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memtabRow MRStore11 ; mod 5
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memtabRow MRStore2 ; mod 6
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memtabRow MRStore11 ; mod 7
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2018-07-24 11:43:17 +00:00
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memtabRow MRLoad2 ; 2-byte loads
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2018-07-24 04:56:38 +00:00
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memtabRow MRLoad11 ; mod 1
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2018-07-24 11:43:17 +00:00
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memtabRow MRLoad2 ; mod 2
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2018-07-24 04:56:38 +00:00
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memtabRow MRLoad11 ; mod 3
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2018-07-24 11:43:17 +00:00
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memtabRow MRLoad2 ; mod 4
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2018-07-24 04:56:38 +00:00
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memtabRow MRLoad11 ; mod 5
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2018-07-24 11:43:17 +00:00
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memtabRow MRLoad2 ; mod 6
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2018-07-24 04:56:38 +00:00
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memtabRow MRLoad11 ; mod 7
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memtabRow MRStore12 ; 3-byte stores
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memtabRow MRStore21 ; mod 1
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memtabRow MRStore12 ; mod 2
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memtabRow MRStore21 ; mod 3
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memtabRow MRStore12 ; mod 4
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memtabRow MRStore21 ; mod 5
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memtabRow MRStore12 ; mod 6
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memtabRow MRStore21 ; mod 7
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memtabRow MRLoad12 ; 3-byte loads
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memtabRow MRLoad21 ; mod 1
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memtabRow MRLoad12 ; mod 2
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memtabRow MRLoad21 ; mod 3
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memtabRow MRLoad12 ; mod 4
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memtabRow MRLoad21 ; mod 5
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memtabRow MRLoad12 ; mod 6
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memtabRow MRLoad21 ; mod 7
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memtabRow MRStore4 ; 4-byte stores
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memtabRow MRStore121 ; mod 1
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2018-07-24 11:43:17 +00:00
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memtabRow MRStore22 ; mod 2
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2018-07-24 04:56:38 +00:00
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memtabRow MRStore121 ; mod 3
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memtabRow MRStore4 ; mod 4
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memtabRow MRStore121 ; mod 5
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2018-07-24 11:43:17 +00:00
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memtabRow MRStore22 ; mod 6
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2018-07-24 04:56:38 +00:00
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memtabRow MRStore121 ; mod 7
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memtabRow MRLoad4 ; 4-byte loads
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memtabRow MRLoad121 ; mod 1
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2018-07-24 11:43:17 +00:00
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memtabRow MRLoad22 ; mod 2
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2018-07-24 04:56:38 +00:00
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memtabRow MRLoad121 ; mod 3
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memtabRow MRLoad4 ; mod 4
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memtabRow MRLoad121 ; mod 5
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2018-07-24 11:43:17 +00:00
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memtabRow MRLoad22 ; mod 6
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2018-07-24 04:56:38 +00:00
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memtabRow MRLoad121 ; mod 7
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memtabRow MRStore14 ; 5-byte stores
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memtabRow MRStore41 ; mod 1
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2018-07-24 11:43:17 +00:00
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memtabRow MRStore122 ; mod 2
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2018-07-24 04:56:38 +00:00
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memtabRow MRStore221 ; mod 3
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memtabRow MRStore14 ; mod 4
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memtabRow MRStore41 ; mod 5
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2018-07-24 11:43:17 +00:00
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memtabRow MRStore122 ; mod 6
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2018-07-24 04:56:38 +00:00
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memtabRow MRStore221 ; mod 7
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memtabRow MRLoad14 ; 5-byte loads
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memtabRow MRLoad41 ; mod 1
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memtabRow MRLoad122 ; mod 2
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memtabRow MRLoad221 ; mod 3
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memtabRow MRLoad14 ; mod 4
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memtabRow MRLoad41 ; mod 5
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memtabRow MRLoad122 ; mod 6
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memtabRow MRLoad221 ; mod 7
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memtabRow MRStore24 ; 6-byte stores
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memtabRow MRStore141 ; mod 1
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memtabRow MRStore42 ; mod 2
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memtabRow MRStore1221 ; mod 3
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memtabRow MRStore24 ; mod 4
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memtabRow MRStore141 ; mod 5
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memtabRow MRStore42 ; mod 6
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memtabRow MRStore1221 ; mod 7
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memtabRow MRLoad24 ; 6-byte loads
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memtabRow MRLoad141 ; mod 1
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memtabRow MRLoad42 ; mod 2
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memtabRow MRLoad1221 ; mod 3
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memtabRow MRLoad24 ; mod 4
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memtabRow MRLoad141 ; mod 5
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memtabRow MRLoad42 ; mod 6
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memtabRow MRLoad1221 ; mod 7
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memtabRow MRStore124 ; 7-byte stores
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memtabRow MRStore241 ; mod 1
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memtabRow MRStore142 ; mod 2
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memtabRow MRStore421 ; mod 3
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memtabRow MRStore124 ; mod 4
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memtabRow MRStore241 ; mod 5
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memtabRow MRStore142 ; mod 6
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memtabRow MRStore421 ; mod 7
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memtabRow MRLoad124 ; 7-byte loads
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memtabRow MRLoad241 ; mod 1
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memtabRow MRLoad142 ; mod 2
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memtabRow MRLoad421 ; mod 3
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memtabRow MRLoad124 ; mod 4
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memtabRow MRLoad241 ; mod 5
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memtabRow MRLoad142 ; mod 6
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memtabRow MRLoad421 ; mod 7
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