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powermac-rom/NanoKernel/NKSleep.s

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ArmAsm
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Auto-generate per-file function lists
2018-06-30 08:00:35 +00:00
; AUTO-GENERATED SYMBOL LIST
; IMPORTS:
; NKInterrupts
; SIGP
; NKMPCalls
; CommonMPCallReturnPath
; ReturnMPCallOOM
; ReturnParamErrFromMPCall
; ReturnZeroFromMPCall
; NKPaging
; PagingFlushTLB
; PagingFunc2AndAHalf
; PagingL2PWithBATs
; NKScheduler
; Save_f0_f31
; Save_v0_v31
; SchSwitchSpace
; NKThud
; panic
Initial commit
2017-11-19 04:11:07 +00:00
; Implements two MPCalls that seem to have something to do with COHGs
; Make conditional calls easier
Local_Panic set *
b panic
Local_ReturnParamErrFromMPCall
b ReturnParamErrFromMPCall
Local_ReturnInsufficientResourcesErrFromMPCall
b ReturnMPCallOOM
Local_CommonMPCallReturnPath
b CommonMPCallReturnPath
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
; RET OSStatus r3, something r4, something r4
DeclareMPCall 102, MPGetKernelStateSize
MPGetKernelStateSize
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r9, 0
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Fix a mistake with the coherence group structure There is a global linked list of all coherence groups. Coherence groups and CPUs have a one-to-many relationship.
2018-02-17 16:43:03 +00:00
lwz r8, EWA.CPUBase + CPU.LLL + LLL.Freeform(r9)
Initial commit
2017-11-19 04:11:07 +00:00
lwz r9, CoherenceGroup.ScheduledCpuCount(r8)
cmpwi r9, 1
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bgt Local_ReturnInsufficientResourcesErrFromMPCall
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
bl KernelStateSize
Initial commit
2017-11-19 04:11:07 +00:00
mr r4, r8
mr r5, r9
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
b ReturnZeroFromMPCall
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
; ARG r3/r4/r5
; RET OSStatus r3
DeclareMPCall 103, MPGetKernelState
MPGetKernelState
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r9, 0
Fix a mistake with the coherence group structure There is a global linked list of all coherence groups. Coherence groups and CPUs have a one-to-many relationship.
2018-02-17 16:43:03 +00:00
lwz r8, EWA.CPUBase + CPU.LLL + LLL.Freeform(r9)
Initial commit
2017-11-19 04:11:07 +00:00
lwz r9, CoherenceGroup.ScheduledCpuCount(r8)
cmpwi r9, 1
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bgt Local_ReturnInsufficientResourcesErrFromMPCall
Initial commit
2017-11-19 04:11:07 +00:00
clrlwi. r8, r5, 20
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne Local_ReturnParamErrFromMPCall
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
bl KernelStateSize
Initial commit
2017-11-19 04:11:07 +00:00
cmpw r3, r8
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
blt Local_ReturnParamErrFromMPCall
Initial commit
2017-11-19 04:11:07 +00:00
cmpw r4, r9
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
blt Local_ReturnParamErrFromMPCall
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
bl PagingFlushTLB
mfsprg r9, 0
mfxer r8
stw r13, 0x00dc(r6)
stw r8, 0x00d4(r6)
stw r12, 0x00ec(r6)
mfctr r8
stw r10, 0x00fc(r6)
stw r8, 0x00f4(r6)
mfpvr r8
rlwinm. r8, r8, 0, 0, 14
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne @not_601
Initial commit
2017-11-19 04:11:07 +00:00
mfspr r8, mq
stw r8, ContextBlock.MQ(r6)
@not_601
lwz r8, EWA.r1(r9)
stw r8, ContextBlock.r1(r6)
stw r2, ContextBlock.r2(r6)
stw r3, ContextBlock.r3(r6)
andi. r8, r11, MSR_FP
stw r4, ContextBlock.r4(r6)
lwz r8, EWA.r6(r9)
stw r5, ContextBlock.r5(r6)
stw r8, ContextBlock.r6(r6)
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bnel Save_f0_f31
Reverse PPC-68k context switching (incomplete)
2018-03-31 08:17:23 +00:00
rlwinm. r8, r7, 0, EWA.kFlagVec, EWA.kFlagVec ; flags
bnel+ Save_v0_v31
Initial commit
2017-11-19 04:11:07 +00:00
lwz r3, ContextBlock.r3(r6)
lwz r4, ContextBlock.r4(r6)
lwz r5, ContextBlock.r5(r6)
stw r11,ContextBlock.MSR(r6)
mr r27, r5
Reverse PPC-68k context switching (incomplete)
2018-03-31 08:17:23 +00:00
addi r29, r1, KDP.BATs + 0xa0
bl PagingL2PWithBATs
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq Local_ReturnInsufficientResourcesErrFromMPCall
Initial commit
2017-11-19 04:11:07 +00:00
rlwimi r27, r31, 0, 0, 19
mr r17, r27
addi r15, r17, 0x34
srwi r3, r3, 12
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0xc8
Initial commit
2017-11-19 04:11:07 +00:00
mr r27, r5
Reverse PPC-68k context switching (incomplete)
2018-03-31 08:17:23 +00:00
addi r29, r1, KDP.BATs + 0xa0
bl PagingL2PWithBATs
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq Local_ReturnInsufficientResourcesErrFromMPCall
Initial commit
2017-11-19 04:11:07 +00:00
rlwimi r27, r31, 0, 0, 19
stwu r27, 0x0004(r15)
addi r3, r3, -0x01
addi r5, r5, 0x1000
cmpwi r3, 0x00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bge MPGetKernelState_0xc8
Initial commit
2017-11-19 04:11:07 +00:00
addi r15, r15, 0x04
subf r15, r17, r15
stw r15, 0x0034(r17)
mfsprg r15, 0
stw r15, 0x0024(r17)
mfsprg r8, 3
stw r8, 0x0028(r17)
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
@retry_time
Initial commit
2017-11-19 04:11:07 +00:00
mftbu r8
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
mftb r9
Initial commit
2017-11-19 04:11:07 +00:00
mftbu r16
cmpw r16, r8
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
bne- @retry_time
stw r8, EWA.SpacesSavedLR(r15)
stw r9, EWA.SpacesSavedCR(r15)
Initial commit
2017-11-19 04:11:07 +00:00
mr r29, r17
Reverse the CPU plugin mechanism CPU plugins are code fragment resources that allow the NanoKernel to perform CPU-specific functions, such as starting or stopping a processor core or getting core temperature. They live in the Apple CPU Plugins file. The Power Manager selects a plugin at boot (or doesn't), prepares and holds it in memory, and registers it with the NanoKernel using MPRegisterCpuPlugin(). The NanoKernel can then call any of the plugin's entry points synchronously using its SIGP() function, which is also exposed via the MPCpuPlugin() call. The plugin return path is tricky, but involved the ReturnFromInterrupt trap instruction in the emulator ROM code. The CPU plugin calling convention is described in the SIGP comments. CPU plugins operate in the blue address space, but with interrupts disabled and supervisor mode on. This code was reversed to get the Mac mini working. It is not clear how the Power Manager determines CPU temperature when there are no CPU registers to do this.
2018-03-05 11:00:11 +00:00
li r16, kSIGP6
stw r16, EWA.SIGPSelector(r15)
Reverse userspace sync primitives Namely queues, semaphores, critical regions, event groups and "notifications". The MP calls implementing these services have been named after their MPLibrary wrapper functions. This convention will be followed in the future (no more NKCreateEvent).
2018-02-17 16:57:01 +00:00
lhz r16, EWA.CPUIndex(r15)
Reverse the CPU plugin mechanism CPU plugins are code fragment resources that allow the NanoKernel to perform CPU-specific functions, such as starting or stopping a processor core or getting core temperature. They live in the Apple CPU Plugins file. The Power Manager selects a plugin at boot (or doesn't), prepares and holds it in memory, and registers it with the NanoKernel using MPRegisterCpuPlugin(). The NanoKernel can then call any of the plugin's entry points synchronously using its SIGP() function, which is also exposed via the MPCpuPlugin() call. The plugin return path is tricky, but involved the ReturnFromInterrupt trap instruction in the emulator ROM code. The CPU plugin calling convention is described in the SIGP comments. CPU plugins operate in the blue address space, but with interrupts disabled and supervisor mode on. This code was reversed to get the Mac mini working. It is not clear how the Power Manager determines CPU temperature when there are no CPU registers to do this.
2018-03-05 11:00:11 +00:00
stw r16, EWA.SIGPCallR4(r15)
li r8, 2 ; args in EWA
Initial commit
2017-11-19 04:11:07 +00:00
bl SIGP
mr r17, r29
mfsdr1 r8
stw r8, 0x002c(r17)
rlwinm r9, r8, 16, 7, 15
cntlzw r18, r9
li r9, -0x01
srw r9, r9, r18
addi r9, r9, 0x01
stw r9, 0x000c(r17)
rlwinm r8, r8, 0, 0, 15
stw r8, 0x0010(r17)
lis r8, 0x00
ori r8, r8, 0xc000
stw r8, 0x0018(r17)
lis r9, 0x00
ori r9, r9, 0xa000
subf r8, r9, r1
stw r8, 0x001c(r17)
addi r9, r1, 120
lis r31, 0x00
li r14, 0x00
lwz r29, 0x0034(r17)
add r29, r29, r17
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0x1a0
Initial commit
2017-11-19 04:11:07 +00:00
lwzu r30, 0x0008(r9)
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0x1a4
Initial commit
2017-11-19 04:11:07 +00:00
lwz r18, 0x0004(r30)
lhz r15, 0x0000(r30)
andi. r19, r18, 0xe00
lhz r16, 0x0002(r30)
cmplwi r19, 0xc00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne MPGetKernelState_0x1dc
Initial commit
2017-11-19 04:11:07 +00:00
addi r16, r16, 0x01
slwi r16, r16, 2
stw r16, 0x0000(r29)
rlwinm r18, r18, 22, 0, 29
stw r18, 0x0004(r29)
addi r29, r29, 0x0c
addi r14, r14, 0x01
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
b MPGetKernelState_0x1fc
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0x1dc
Initial commit
2017-11-19 04:11:07 +00:00
cmpwi r15, 0x00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne MPGetKernelState_0x1fc
Initial commit
2017-11-19 04:11:07 +00:00
cmplwi r16, 0xffff
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne MPGetKernelState_0x1fc
Initial commit
2017-11-19 04:11:07 +00:00
addis r31, r31, 0x1000
cmpwi r31, 0x00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne MPGetKernelState_0x1a0
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
b MPGetKernelState_0x204
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0x1fc
Initial commit
2017-11-19 04:11:07 +00:00
addi r30, r30, 0x08
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
b MPGetKernelState_0x1a4
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0x204
Reverse the NanoKernel pool allocator
2018-03-23 09:22:56 +00:00
lwz r16, PSA.FirstPoolSeg(r1)
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0x208
Initial commit
2017-11-19 04:11:07 +00:00
lwz r31, 0x0000(r16)
add r18, r31, r16
lwz r19, 0x0000(r18)
addi r31, r31, 0x18
stw r31, 0x0000(r29)
stw r16, 0x0004(r29)
addi r29, r29, 0x0c
addi r14, r14, 0x01
cmpwi r19, 0x00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq MPGetKernelState_0x238
Initial commit
2017-11-19 04:11:07 +00:00
add r16, r19, r18
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
b MPGetKernelState_0x208
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0x238
Identify all accesses to the Primary System Area Whenever a field was added to the end of the Primary System Area (PSA) record, the offsets of all other fields would change. When reversing NK version 02.27, I noticed that 32 bytes had been added to the end of the PSA between 02.27 and 02.28. To build a byte-perfect 02.27, all references to PSA fields must therefore use the record definition in NKPublic.s instead of a numeric offset. In this commit, all PSA references are identified by field name (_FFF if the field has not yet been reversed).
2018-04-22 09:13:30 +00:00
addi r19, r1, PSA.FreeList
lwz r31, PSA.FreeList + LLL.Next(r1)
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0x240
Initial commit
2017-11-19 04:11:07 +00:00
cmpw r31, r19
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq MPGetKernelState_0x264
Initial commit
2017-11-19 04:11:07 +00:00
li r18, 0x10
stw r18, 0x0000(r29)
stw r31, 0x0004(r29)
addi r29, r29, 0x0c
addi r14, r14, 0x01
lwz r31, 0x0008(r31)
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
b MPGetKernelState_0x240
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0x264
Initial commit
2017-11-19 04:11:07 +00:00
stw r14, 0x0030(r17)
lwz r30, 0x0034(r17)
add r30, r30, r17
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
MPGetKernelState_0x270
Initial commit
2017-11-19 04:11:07 +00:00
subf r8, r17, r29
stw r8, 0x0008(r30)
lwz r24, 0x0004(r30)
mr r25, r8
lwz r26, 0x0000(r30)
add r29, r29, r26
bl AnotherCoherenceFunc
addi r30, r30, 0x0c
addi r14, r14, -0x01
cmpwi r14, 0x00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne MPGetKernelState_0x270
Initial commit
2017-11-19 04:11:07 +00:00
subf r8, r17, r29
stw r8, 0x0020(r17)
lwz r24, 0x001c(r17)
mr r25, r8
lwz r26, 0x0018(r17)
add r29, r29, r26
bl AnotherCoherenceFunc
subf r8, r17, r29
stw r8, 0x0014(r17)
lwz r24, 0x0010(r17)
mr r25, r8
lwz r26, 0x000c(r17)
add r29, r29, r26
bl AnotherCoherenceFunc
bl LoadStateRestoreFunc
mflr r9
stw r9, 0x0000(r17)
Identify all accesses to the Primary System Area Whenever a field was added to the end of the Primary System Area (PSA) record, the offsets of all other fields would change. When reversing NK version 02.27, I noticed that 32 bytes had been added to the end of the PSA between 02.27 and 02.28. To build a byte-perfect 02.27, all references to PSA fields must therefore use the record definition in NKPublic.s instead of a numeric offset. In this commit, all PSA references are identified by field name (_FFF if the field has not yet been reversed).
2018-04-22 09:13:30 +00:00
lwz r8, PSA.NoIdeaR23(r1)
Initial commit
2017-11-19 04:11:07 +00:00
stw r8, 0x0008(r17)
li r8, 0x00
stw r8, 0x0004(r17)
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r15, 0
Reverse the CPU plugin mechanism CPU plugins are code fragment resources that allow the NanoKernel to perform CPU-specific functions, such as starting or stopping a processor core or getting core temperature. They live in the Apple CPU Plugins file. The Power Manager selects a plugin at boot (or doesn't), prepares and holds it in memory, and registers it with the NanoKernel using MPRegisterCpuPlugin(). The NanoKernel can then call any of the plugin's entry points synchronously using its SIGP() function, which is also exposed via the MPCpuPlugin() call. The plugin return path is tricky, but involved the ReturnFromInterrupt trap instruction in the emulator ROM code. The CPU plugin calling convention is described in the SIGP comments. CPU plugins operate in the blue address space, but with interrupts disabled and supervisor mode on. This code was reversed to get the Mac mini working. It is not clear how the Power Manager determines CPU temperature when there are no CPU registers to do this.
2018-03-05 11:00:11 +00:00
li r16, kSIGP17
stw r16, EWA.SIGPSelector(r15)
Reverse userspace sync primitives Namely queues, semaphores, critical regions, event groups and "notifications". The MP calls implementing these services have been named after their MPLibrary wrapper functions. This convention will be followed in the future (no more NKCreateEvent).
2018-02-17 16:57:01 +00:00
lhz r16, EWA.CPUIndex(r15)
Reverse the CPU plugin mechanism CPU plugins are code fragment resources that allow the NanoKernel to perform CPU-specific functions, such as starting or stopping a processor core or getting core temperature. They live in the Apple CPU Plugins file. The Power Manager selects a plugin at boot (or doesn't), prepares and holds it in memory, and registers it with the NanoKernel using MPRegisterCpuPlugin(). The NanoKernel can then call any of the plugin's entry points synchronously using its SIGP() function, which is also exposed via the MPCpuPlugin() call. The plugin return path is tricky, but involved the ReturnFromInterrupt trap instruction in the emulator ROM code. The CPU plugin calling convention is described in the SIGP comments. CPU plugins operate in the blue address space, but with interrupts disabled and supervisor mode on. This code was reversed to get the Mac mini working. It is not clear how the Power Manager determines CPU temperature when there are no CPU registers to do this.
2018-03-05 11:00:11 +00:00
stw r16, EWA.SIGPCallR4(r15)
li r8, 2 ; args in EWA
Initial commit
2017-11-19 04:11:07 +00:00
bl SIGP
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
li r3, 0
Initial commit
2017-11-19 04:11:07 +00:00
b Local_CommonMPCallReturnPath
LoadStateRestoreFunc
blrl
mr r17, r3
lwz r24, 0x0014(r17)
lwz r25, 0x0010(r17)
lwz r26, 0x000c(r17)
bl YetAnotherCoherenceFunc
lwz r24, 0x002c(r17)
mtsdr1 r24
lwz r24, 0x0020(r17)
lwz r25, 0x001c(r17)
lwz r26, 0x0018(r17)
bl YetAnotherCoherenceFunc
lwz r14, 0x0030(r17)
lwz r30, 0x0034(r17)
add r30, r30, r17
RestoreKernelState_0x38
lwz r24, 0x0008(r30)
lwz r25, 0x0004(r30)
lwz r26, 0x0000(r30)
bl YetAnotherCoherenceFunc
addi r30, r30, 0x0c
addi r14, r14, -0x01
cmpwi r14, 0x00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne RestoreKernelState_0x38
Initial commit
2017-11-19 04:11:07 +00:00
lwz r16, 0x0024(r17)
mtsprg 0, r16
lwz r8, 0x0028(r17)
mtsprg 3, r8
lwz r1, -0x0004(r16)
lwz r6, -0x0014(r16)
lwz r7, -0x0010(r16)
li r8, -0x01
stw r8, 0x0004(r17)
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
lwz r8, EWA.SpacesSavedLR(r16)
lwz r9, EWA.SpacesSavedCR(r16)
Initial commit
2017-11-19 04:11:07 +00:00
li r16, 0x01
mttb r16
mttbu r8
mttb r9
mtdec r16
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
_log 'Resuming saved kernel state^n'
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
lwz r8, 0x00d4(r6)
lwz r13, 0x00dc(r6)
mtxer r8
lwz r12, 0x00ec(r6)
lwz r8, 0x00f4(r6)
lwz r10, 0x00fc(r6)
mtctr r8
lwz r11, 0x00a4(r6)
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
mfpvr r8
rlwinm. r8, r8, 0, 0, 14
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne RestoreKernelState_0xf8
Initial commit
2017-11-19 04:11:07 +00:00
lwz r8, 0x00c4(r6)
DIALECT POWER
mtmq r8
DIALECT PowerPC
RestoreKernelState_0xf8
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
lwz r4, -0x0020(r1)
li r2, 0x01
sth r2, 0x0910(r1)
li r2, -0x01
stw r2, 0x0912(r1)
stw r2, 0x0f90(r4)
xoris r2, r2, 0x100
stw r2, 0x0f8c(r4)
li r2, 0x00
stw r2, 0x0f28(r4)
stw r2, 0x0f2c(r4)
lwz r2, 0x0114(r6)
lwz r4, 0x0124(r6)
lwz r5, 0x012c(r6)
lwz r29, 0x00d8(r6)
cmpwi r29, 0x00
lwz r8, 0x0210(r29)
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq RestoreKernelState_0x144
Initial commit
2017-11-19 04:11:07 +00:00
mtspr vrsave, r8
RestoreKernelState_0x144
bl PagingFlushTLB
addi r29, r1, 0x5e0
bl PagingFunc2AndAHalf
mfsprg r15, 0
lwz r8, -0x001c(r15)
li r9, 0x00
Work on the scheduler and interrupt handling code
2018-03-23 09:23:06 +00:00
bl SchSwitchSpace
Initial commit
2017-11-19 04:11:07 +00:00
isync
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r15, 0
Reverse the CPU plugin mechanism CPU plugins are code fragment resources that allow the NanoKernel to perform CPU-specific functions, such as starting or stopping a processor core or getting core temperature. They live in the Apple CPU Plugins file. The Power Manager selects a plugin at boot (or doesn't), prepares and holds it in memory, and registers it with the NanoKernel using MPRegisterCpuPlugin(). The NanoKernel can then call any of the plugin's entry points synchronously using its SIGP() function, which is also exposed via the MPCpuPlugin() call. The plugin return path is tricky, but involved the ReturnFromInterrupt trap instruction in the emulator ROM code. The CPU plugin calling convention is described in the SIGP comments. CPU plugins operate in the blue address space, but with interrupts disabled and supervisor mode on. This code was reversed to get the Mac mini working. It is not clear how the Power Manager determines CPU temperature when there are no CPU registers to do this.
2018-03-05 11:00:11 +00:00
li r16, kSIGP7
stw r16, EWA.SIGPSelector(r15)
Reverse userspace sync primitives Namely queues, semaphores, critical regions, event groups and "notifications". The MP calls implementing these services have been named after their MPLibrary wrapper functions. This convention will be followed in the future (no more NKCreateEvent).
2018-02-17 16:57:01 +00:00
lhz r16, EWA.CPUIndex(r15)
Reverse the CPU plugin mechanism CPU plugins are code fragment resources that allow the NanoKernel to perform CPU-specific functions, such as starting or stopping a processor core or getting core temperature. They live in the Apple CPU Plugins file. The Power Manager selects a plugin at boot (or doesn't), prepares and holds it in memory, and registers it with the NanoKernel using MPRegisterCpuPlugin(). The NanoKernel can then call any of the plugin's entry points synchronously using its SIGP() function, which is also exposed via the MPCpuPlugin() call. The plugin return path is tricky, but involved the ReturnFromInterrupt trap instruction in the emulator ROM code. The CPU plugin calling convention is described in the SIGP comments. CPU plugins operate in the blue address space, but with interrupts disabled and supervisor mode on. This code was reversed to get the Mac mini working. It is not clear how the Power Manager determines CPU temperature when there are no CPU registers to do this.
2018-03-05 11:00:11 +00:00
stw r16, EWA.SIGPCallR4(r15)
li r8, 2 ; args in EWA
Initial commit
2017-11-19 04:11:07 +00:00
bl SIGP
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
mfsprg r15, 0
Reverse the CPU plugin mechanism CPU plugins are code fragment resources that allow the NanoKernel to perform CPU-specific functions, such as starting or stopping a processor core or getting core temperature. They live in the Apple CPU Plugins file. The Power Manager selects a plugin at boot (or doesn't), prepares and holds it in memory, and registers it with the NanoKernel using MPRegisterCpuPlugin(). The NanoKernel can then call any of the plugin's entry points synchronously using its SIGP() function, which is also exposed via the MPCpuPlugin() call. The plugin return path is tricky, but involved the ReturnFromInterrupt trap instruction in the emulator ROM code. The CPU plugin calling convention is described in the SIGP comments. CPU plugins operate in the blue address space, but with interrupts disabled and supervisor mode on. This code was reversed to get the Mac mini working. It is not clear how the Power Manager determines CPU temperature when there are no CPU registers to do this.
2018-03-05 11:00:11 +00:00
li r16, kSIGP17
stw r16, EWA.SIGPSelector(r15)
Reverse userspace sync primitives Namely queues, semaphores, critical regions, event groups and "notifications". The MP calls implementing these services have been named after their MPLibrary wrapper functions. This convention will be followed in the future (no more NKCreateEvent).
2018-02-17 16:57:01 +00:00
lhz r16, EWA.CPUIndex(r15)
Reverse the CPU plugin mechanism CPU plugins are code fragment resources that allow the NanoKernel to perform CPU-specific functions, such as starting or stopping a processor core or getting core temperature. They live in the Apple CPU Plugins file. The Power Manager selects a plugin at boot (or doesn't), prepares and holds it in memory, and registers it with the NanoKernel using MPRegisterCpuPlugin(). The NanoKernel can then call any of the plugin's entry points synchronously using its SIGP() function, which is also exposed via the MPCpuPlugin() call. The plugin return path is tricky, but involved the ReturnFromInterrupt trap instruction in the emulator ROM code. The CPU plugin calling convention is described in the SIGP comments. CPU plugins operate in the blue address space, but with interrupts disabled and supervisor mode on. This code was reversed to get the Mac mini working. It is not clear how the Power Manager determines CPU temperature when there are no CPU registers to do this.
2018-03-05 11:00:11 +00:00
stw r16, EWA.SIGPCallR4(r15)
li r8, 2 ; args in EWA
Initial commit
2017-11-19 04:11:07 +00:00
bl SIGP
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
li r3, 0
Initial commit
2017-11-19 04:11:07 +00:00
b Local_CommonMPCallReturnPath
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
; RET r8/r9
KernelStateSize
; Counter
li r24, 0
; Start with hash table
; Also inits counter r8 (bytes!)
Initial commit
2017-11-19 04:11:07 +00:00
mfsdr1 r16
rlwinm r16, r16, 16, 7, 15
cntlzw r17, r16
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
li r16, -1
Initial commit
2017-11-19 04:11:07 +00:00
srw r16, r16, r17
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
addi r8, r16, 1
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
addi r9, r1, KDP.SegMaps - 8
lis r31, 0 ; segment address counter
li r19, 0 ; page counter (to use later)
li r14, 0 ; entry counter (to use later)
@next_segment
lwzu r17, 8(r9)
@next_entry
lwz r18, PMDT.PBaseAndFlags(r17) ; PhysicalPage(20b) || pageAttr(12b)
lhz r15, PMDT.LBase(r17) ; LogicalPageIndexInSegment(16b)
; Same as usual: if
andi. r18, r18, PMDT.TopFieldMask ; r18 = 3b field at top of pageAttr
lhz r16, PMDT.PageCount(r17) ; PageCountMinus1(16b)
cmplwi r18, PMDT.DaddyFlag | PMDT.CountingFlag
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne @entry_seems_blank
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
addi r16, r16, 1
Initial commit
2017-11-19 04:11:07 +00:00
add r19, r19, r16
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
addi r14, r14, 1
b @continue_next_entry
@entry_seems_blank
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
cmpwi r15, 0 ; if not full-segment, might not be blank?
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne @continue_next_entry
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
cmplwi r16, 0xffff
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne @continue_next_entry
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
; This is the "normal" way to loop to the next segment
addis r31, r31, 0x1000
cmpwi r31, 0
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne @next_segment
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
b @exit
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
@continue_next_entry
addi r17, r17, 8
b @next_entry
@exit
slwi r19, r19, 2 ; 4 bytes per mapped page
Initial commit
2017-11-19 04:11:07 +00:00
add r8, r8, r19
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
cmpwi r14, 0x00 ; no entries? fail!
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq Local_ReturnInsufficientResourcesErrFromMPCall
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
mulli r9, r14, 12
add r8, r8, r9 ; 12 bytes per SegMap entry
add r24, r24, r9 ; also in the secondary counter?
; Count pool segments
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
li r9, 0 ; total size of pool segments
li r14, 0 ; count of pool segments
lwz r16, PSA.FirstPoolSeg(r1) ; current pool segment
@next_pool_segment
lwz r17, Block.OffsetToNext(r16) ; of Begin block
Initial commit
2017-11-19 04:11:07 +00:00
add r18, r17, r16
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
lwz r19, Block.OffsetToNext(r18) ; of End block
Initial commit
2017-11-19 04:11:07 +00:00
add r9, r9, r17
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
addi r9, r9, Block.kEndSize
addi r14, r14, 1
cmpwi r19, 0 ; last segment?
Initial commit
2017-11-19 04:11:07 +00:00
add r16, r19, r18
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @exit_pool_counter
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
b @next_pool_segment ; odd... what happened here?
@exit_pool_counter
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
; Count pages in the system free list
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
addi r16, r1, PSA.FreeList
lwz r18, PSA.FreeList + LLL.Next(r1)
@next_page_in_freelist
Initial commit
2017-11-19 04:11:07 +00:00
cmpw r18, r16
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beq @exit_freelist_counter
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
addi r9, r9, 16
addi r14, r14, 1
lwz r18, LLL.Next(r18)
b @next_page_in_freelist
@exit_freelist_counter
Initial commit
2017-11-19 04:11:07 +00:00
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
add r8, r8, r9 ; byte counter
mulli r9, r14, 12 ; 12 bytes per thing
Initial commit
2017-11-19 04:11:07 +00:00
add r8, r8, r9
add r24, r24, r9
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
lisori r9, 0xc000
Initial commit
2017-11-19 04:11:07 +00:00
add r8, r8, r9
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
lisori r9, 0x3c
Initial commit
2017-11-19 04:11:07 +00:00
add r8, r8, r9
add r24, r24, r9
srwi r9, r8, 12
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
slwi r9, r9, 2
addi r9, r9, 4
Initial commit
2017-11-19 04:11:07 +00:00
add r8, r8, r9
add r24, r24, r9
mr r9, r24
blr
Reverse part of the kernel state-save code
2018-03-23 13:06:36 +00:00
Initial commit
2017-11-19 04:11:07 +00:00
CoherenceFunc_0x138 ; OUTSIDE REFERER
srwi r23, r28, 12
slwi r23, r23, 2
add r23, r23, r17
lwz r23, 0x0038(r23)
rlwimi r23, r28, 0, 20, 31
blr
AnotherCoherenceFunc ; OUTSIDE REFERER
cmpwi r26, 0x00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beqlr
Initial commit
2017-11-19 04:11:07 +00:00
mflr r22
addi r24, r24, -0x01
mr r28, r25
AnotherCoherenceFunc_0x14
bl CoherenceFunc_0x138
clrlwi r25, r23, 0x14
subfic r25, r25, 0x1000
cmplw r25, r26
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
blt AnotherCoherenceFunc_0x2c
Initial commit
2017-11-19 04:11:07 +00:00
mr r25, r26
AnotherCoherenceFunc_0x2c
mr r19, r23
mr r20, r25
addi r23, r23, -0x01
mtctr r25
AnotherCoherenceFunc_0x3c
lbzu r27, 0x0001(r24)
stbu r27, 0x0001(r23)
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bdnz AnotherCoherenceFunc_0x3c
Initial commit
2017-11-19 04:11:07 +00:00
bl YetAnotherCoherenceFunc_0x64
subf r26, r25, r26
add r28, r28, r25
cmpwi r26, 0x00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne AnotherCoherenceFunc_0x14
Initial commit
2017-11-19 04:11:07 +00:00
mtlr r22
blr
YetAnotherCoherenceFunc ; OUTSIDE REFERER
cmpwi r26, 0x00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
beqlr
Initial commit
2017-11-19 04:11:07 +00:00
mr r19, r25
mr r20, r26
mflr r22
addi r25, r25, -0x01
mr r28, r24
YetAnotherCoherenceFunc_0x1c
bl CoherenceFunc_0x138
clrlwi r24, r23, 0x14
subfic r24, r24, 0x1000
cmplw r24, r26
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
blt YetAnotherCoherenceFunc_0x34
Initial commit
2017-11-19 04:11:07 +00:00
mr r24, r26
YetAnotherCoherenceFunc_0x34
addi r23, r23, -0x01
mtctr r24
YetAnotherCoherenceFunc_0x3c
lbzu r27, 0x0001(r23)
stbu r27, 0x0001(r25)
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bdnz YetAnotherCoherenceFunc_0x3c
Initial commit
2017-11-19 04:11:07 +00:00
add r28, r28, r24
subf r26, r24, r26
cmpwi r26, 0x00
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
bne YetAnotherCoherenceFunc_0x1c
Initial commit
2017-11-19 04:11:07 +00:00
bl YetAnotherCoherenceFunc_0x64
mtlr r22
blr
YetAnotherCoherenceFunc_0x64 ; OUTSIDE REFERER
sync
isync
lhz r21, 0x0f4a(r1)
addi r15, r21, -0x01
add r20, r19, r20
add r20, r20, r15
neg r15, r21
and r19, r19, r15
and r20, r20, r15
YetAnotherCoherenceFunc_0x88
dcbst 0, r19
sync
icbi 0, r19
add r19, r19, r21
cmpw r19, r20
Remove unnecessary static branch hints These + and - characters in a branch mnemonic can cause the assembler to produce conditional branch instructions with that hint the branch predictor. The default for forward branches is -, and for backward branches is +. If a mnemonic is issued with the opposite sign, then bit 10 of the instruction (the LSB of the BO field) is set. My long-retired "ppcdisasm" script inserted these hints unconditionally, despite 98% of them not being required. The code is much cleaner now. I read in some old MPW release notes that PPCAsm and PPCLink together exhibit a quirk when linking conditional branches to imported symbols. PPCAsm always assembles these conditional branches as if they were forward branches (that is, a + hint will always set the hint bit, and a - hint will never). I hoped to use this property to divine whether the NanoKernel was linked from one or many assembly files, but I was frustrated by the lack of conditional branches between files.
2018-04-15 07:05:02 +00:00
blt YetAnotherCoherenceFunc_0x88
Initial commit
2017-11-19 04:11:07 +00:00
sync
isync
blr
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