mirror of
https://github.com/elliotnunn/powermac-rom.git
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structs and makefiles
This commit is contained in:
Elliot Nunn
parent
e11b02a8a8
commit
fb782befb6
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@ -89,134 +89,3 @@ BootstrapVersion ds.b 16 ; f00:f10 ; Bootstrap loader version info, from Config
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; Move this!
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CB record 0,INCR
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Flags ds.l 1 ; 000 ; (SPAC) copied from kdp by CreateTask
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Enables ds.l 1 ; 004
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ds.l 1 ; 008
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ds.l 1 ; 00c
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ds.l 1 ; 010
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ds.l 1 ; 014
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ds.l 1 ; 018
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ds.l 1 ; 01c
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ds.l 1 ; 020
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LowSave17 ds.l 1 ; 024
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LowSave20 ds.l 1 ; 028
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LowSave21 ds.l 1 ; 02c
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ds.l 1 ; 030
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LowSave19 ds.l 1 ; 034
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ds.l 1 ; 038
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LowSave18 ds.l 1 ; 03c
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ExceptionOriginFlags ds.l 1 ; 040 ; from before exception
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ExceptionOriginEnables ds.l 1 ; 044 ; from before exception
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ds.l 1 ; 048
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ExceptionHandler ds.l 1 ; 04c
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ds.l 1 ; 050
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ExceptionHandlerR4 ds.l 1 ; 054
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ds.l 1 ; 058
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ExceptionHandlerRetAddr ds.l 1 ; 05c
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ds.l 1 ; 060
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PropagateR17 ds.l 1 ; 064
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PropagateR20 ds.l 1 ; 068
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PropagateR21 ds.l 1 ; 06c
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ds.l 1 ; 070
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PropagateR19 ds.l 1 ; 074
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ds.l 1 ; 078
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PropagateR18 ds.l 1 ; 07c
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ds.l 1 ; 080
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ExceptionOriginAddr ds.l 1 ; 084 ; Entry pt of emulator; set by NK Init.s
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ds.l 1 ; 088
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ExceptionOriginLR ds.l 1 ; 08c
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ds.l 1 ; 090
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ExceptionOriginR3 ds.l 1 ; 094
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ds.l 1 ; 098
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ExceptionOriginR4 ds.l 1 ; 09c
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ds.l 1 ; 0a0
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MSR ds.l 1 ; 0a4 ; (SPAC) copied from kdp by CreateTask
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ds.l 1 ; 0a8
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ds.l 1 ; 0ac
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ds.l 1 ; 0b0
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ds.l 1 ; 0b4
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ds.l 1 ; 0b8
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ds.l 1 ; 0bc
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ds.l 1 ; 0c0
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MQ ds.l 1 ; 0c4 ; 601 only
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EDPOffsetSWIRelated ds.l 1 ; 0c8
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PriorityShifty ds.l 1 ; 0cc ; if low nybble is empty, SchInit sets this to 2
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SWIEventGroupID ds.l 1 ; 0d0 ; what?
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XER ds.l 1 ; 0d4
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VectorSaveArea ds.l 1 ; 0d8 ; AltiVec hack: vector registers don't fit in CB!
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CR ds.l 1 ; 0dc ; from heartbeat code, unsure of meaning (ANDed with PostIntMaskInit) r13
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PageInSystemHeap ds.l 1 ; 0e0 ; these are set by StartInit.a:FiddleWithEmulator
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OtherPageInSystemHeap ds.l 1 ; 0e4
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FE000000 ds.l 1 ; 0e8 ; also LR?
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LR ds.l 1 ; 0ec
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CTR ds.l 1 ; 0f0
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KernelCTR ds.l 1 ; 0f4
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ds.l 1 ; 0f8
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CodePtr ds.l 1 ; 0fc ; probably goes in SRR0?
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ds.l 1
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r0 ds.l 1 ; 104
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ds.l 1
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r1 ds.l 1 ; 10c
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ds.l 1
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r2 ds.l 1 ; 114
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ds.l 1
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r3 ds.l 1 ; 11c
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ds.l 1
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r4 ds.l 1 ; 124
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ds.l 1
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r5 ds.l 1 ; 12c
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ds.l 1
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r6 ds.l 1 ; 134
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ds.l 1
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r7 ds.l 1 ; 13c
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ds.l 1
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r8 ds.l 1 ; 144
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ds.l 1
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r9 ds.l 1 ; 14c
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ds.l 1
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r10 ds.l 1 ; 154
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ds.l 1
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r11 ds.l 1 ; 15c
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ds.l 1
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r12 ds.l 1 ; 164
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ds.l 1
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r13 ds.l 1 ; 16c
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ds.l 1
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r14 ds.l 1 ; 174
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ds.l 1
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r15 ds.l 1 ; 17c
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ds.l 1
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r16 ds.l 1 ; 184
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ds.l 1
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r17 ds.l 1 ; 18c
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ds.l 1
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r18 ds.l 1 ; 194
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ds.l 1
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r19 ds.l 1 ; 19c
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ds.l 1
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r20 ds.l 1 ; 1a4
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ds.l 1
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r21 ds.l 1 ; 1ac
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ds.l 1
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r22 ds.l 1 ; 1b4
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ds.l 1
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r23 ds.l 1 ; 1bc
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ds.l 1
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r24 ds.l 1 ; 1c4
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ds.l 1
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r25 ds.l 1 ; 1cc
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ds.l 1
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r26 ds.l 1 ; 1d4
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ds.l 1
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r27 ds.l 1 ; 1dc
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ds.l 1
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r28 ds.l 1 ; 1e4
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ds.l 1
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r29 ds.l 1 ; 1ec
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ds.l 1
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r30 ds.l 1 ; 1f4
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ds.l 1
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r31 ds.l 1 ; 1fc
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FloatRegisters ds.d 32 ; 200:300
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endr
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2
MakeFile
2
MakeFile
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@ -36,7 +36,7 @@ NKDir = :NanoKernel:
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NKIncDir = :Internal:
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NKBin = {ResultDir}NanoKernel.x
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NKOpts =
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#include "{NKDir}InnerMakeFile"
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#include "{NKDir}NKMakeFile"
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@ -1,17 +0,0 @@
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# I expect these variables to be set already:
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# NKDir, NKIncDir, NKBin
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NKFiles = ¶
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{NKDir}NanoKernel.s ¶
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NKIncludes = ¶
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{NKDir}NKMacros.s ¶
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{NKDir}NKEquates.s ¶
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{NKIncDir}InfoRecords.a ¶
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{NKIncDir}EmulatorPublic.a ¶
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{NKIncDir}NKPublic.a ¶
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{NKIncDir}NKOpaque.a ¶
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# We get warning 3202 from ALIGN directives -- kill it
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{NKBin} Ä {NKDir}NanoKernel.s {NKFiles} {NKIncludes}
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PPCAsm -o {Targ} -w 3202 -i {NKIncDir} -i "{AIncludes}" {NKDir}NanoKernel.s
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@ -1,9 +0,0 @@
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# Lets you just run Make in this directory,
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# while ignoring the rest of the build system
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NKDir = :
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NKIncDir = {NKDir}:Internal:
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NKBin = {NKDir}NanoKernel.s.x
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NKOpts =
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#include "{NKDir}InnerMakeFile"
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@ -267,8 +267,8 @@ SwitchContext ; OldCB *r6, NewCB *r9
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stw r8, CB.XER(r6)
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stw r12, CB.LR(r6)
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mfctr r8
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stw r10, CB.CodePtr(r6)
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stw r8, CB.KernelCTR(r6)
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stw r10, CB.SRR0(r6)
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stw r8, CB.CTR(r6)
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bc BO_IF_NOT, bitFlagHasMQ, @no_mq
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lwz r8, CB.MQ(r9)
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@ -329,8 +329,8 @@ SwitchContext ; OldCB *r6, NewCB *r9
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lwz r8, CB.XER(r6)
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lwz r12, CB.LR(r6)
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mtxer r8
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lwz r8, CB.KernelCTR(r6)
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lwz r10, CB.CodePtr(r6)
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lwz r8, CB.CTR(r6)
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lwz r10, CB.SRR0(r6)
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mtctr r8
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bnel ReloadFPU ; FP exceptions enabled, so load FPU
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21
NanoKernel/NKMakeFile
Normal file
21
NanoKernel/NKMakeFile
Normal file
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@ -0,0 +1,21 @@
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# I expect these variables to be set already:
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# NKDir, NKIncDir, NKBin
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NKFiles = ¶
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{NKDir}NanoKernel.s ¶
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{NKDir}NKStructs.s ¶
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{NKDir}NKEquates.s ¶
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{NKDir}NKMacros.s ¶
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{NKDir}NKInit.s ¶
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{NKDir}NKSystemCrash.s ¶
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{NKDir}NKIntHandlers.s ¶
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{NKDir}NKMemory.s ¶
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{NKDir}NKExceptions.s ¶
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{NKDir}NKFloatingPt.s ¶
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{NKDir}NKSoftInt.s ¶
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{NKDir}NKReset.s ¶
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{NKDir}NKLegacyVM.s ¶
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# We get warning 3202 from ALIGN directives -- kill it
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{NKBin} Ä {NKDir}NanoKernel.s {NKFiles}
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PPCAsm -o {Targ} -w 3202 -i {NKIncDir} -i "{AIncludes}" {NKDir}NanoKernel.s
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@ -1,18 +1,4 @@
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BAT RECORD 0, INCR
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U ds.l 1
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L ds.l 1
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ENDR
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########################################################################
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MemLayout RECORD 0, INCR
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SegMapPtr ds.l 1
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BatMap ds.l 1 ; packed array of 4-bit indices into BATs
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ENDR
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########################################################################
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VecTbl RECORD 0, INCR
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VecTbl RECORD 0, INCR ; SPRG3 vector table (looked up by ROM vectors)
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ds.l 1 ; 00 ; scratch for IVT?
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SystemResetVector ds.l 1 ; 04 ; called by IVT+100 (system reset)
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MachineCheckVector ds.l 1 ; 08 ; called by IVT+200 (machine check)
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@ -66,7 +52,7 @@ Size equ *
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########################################################################
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KCallTbl RECORD 0, INCR
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KCallTbl RECORD 0, INCR ; NanoKernel call table
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ReturnFromException ds.l 1 ; 00, trap 0
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RunAlternateContext ds.l 1 ; 04, trap 1
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ResetSystem ds.l 1 ; 08, trap 2 ; 68k RESET
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@ -109,7 +95,21 @@ Size equ *
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########################################################################
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KDP RECORD 0x80, INCR
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BAT RECORD 0, INCR
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U ds.l 1
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L ds.l 1
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ENDR
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########################################################################
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MemLayout RECORD 0, INCR
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SegMapPtr ds.l 1
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BatMap ds.l 1 ; packed array of 4-bit indices into BATs
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ENDR
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########################################################################
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KDP RECORD 0x80, INCR ; Kernel Data Page
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r0 ds.l 1 ; 000 ; used for quick register saves at interrupt time
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r1 ds.l 1 ; 004
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r2 ds.l 1 ; 008
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@ -338,3 +338,137 @@ ProcInfo ds NKProcessorInfo ; f80:fc0
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InfoRecBlk ds.b 64 ; fc0:1000 ; Access using ptr equates in InfoRecords
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ENDR
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########################################################################
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CB RECORD 0,INCR ; ContextBlock (Emulator/System or Native/Alternate)
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Flags ds.l 1 ; 000
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Enables ds.l 1 ; 004
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ds.l 1 ; 008
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ds.l 1 ; 00c
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ds.l 1 ; 010
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ds.l 1 ; 014
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ds.l 1 ; 018
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ds.l 1 ; 01c
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ds.l 1 ; 020
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LowSave17 ds.l 1 ; 024
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LowSave20 ds.l 1 ; 028
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LowSave21 ds.l 1 ; 02c
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ds.l 1 ; 030
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LowSave19 ds.l 1 ; 034
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ds.l 1 ; 038
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LowSave18 ds.l 1 ; 03c
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ExceptionOriginFlags ds.l 1 ; 040 ; from before exception
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ExceptionOriginEnables ds.l 1 ; 044 ; from before exception
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ds.l 1 ; 048
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ExceptionHandler ds.l 1 ; 04c
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ds.l 1 ; 050
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ExceptionHandlerR4 ds.l 1 ; 054
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ds.l 1 ; 058
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ExceptionHandlerRetAddr ds.l 1 ; 05c
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ds.l 1 ; 060
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PropagateR17 ds.l 1 ; 064
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PropagateR20 ds.l 1 ; 068
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PropagateR21 ds.l 1 ; 06c
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ds.l 1 ; 070
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PropagateR19 ds.l 1 ; 074
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ds.l 1 ; 078
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PropagateR18 ds.l 1 ; 07c
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ds.l 1 ; 080
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ExceptionOriginAddr ds.l 1 ; 084
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ds.l 1 ; 088
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ExceptionOriginLR ds.l 1 ; 08c
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ds.l 1 ; 090
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ExceptionOriginR3 ds.l 1 ; 094
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ds.l 1 ; 098
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ExceptionOriginR4 ds.l 1 ; 09c
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ds.l 1 ; 0a0
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MSR ds.l 1 ; 0a4
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ds.l 1 ; 0a8
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ds.l 1 ; 0ac
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ds.l 1 ; 0b0
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ds.l 1 ; 0b4
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ds.l 1 ; 0b8
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ds.l 1 ; 0bc
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ds.l 1 ; 0c0
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MQ ds.l 1 ; 0c4 ; 601 only
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ds.l 1 ; 0c8
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ds.l 1 ; 0cc
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ds.l 1 ; 0d0
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XER ds.l 1 ; 0d4
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ds.l 1 ; 0d8
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CR ds.l 1 ; 0dc
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ds.l 1 ; 0e0
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ds.l 1 ; 0e4
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ds.l 1 ; 0e8
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LR ds.l 1 ; 0ec
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ds.l 1 ; 0f0
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CTR ds.l 1 ; 0f4
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ds.l 1 ; 0f8
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SRR0 ds.l 1 ; 0fc
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ds.l 1
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r0 ds.l 1 ; 104
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ds.l 1
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r1 ds.l 1 ; 10c
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ds.l 1
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r2 ds.l 1 ; 114
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ds.l 1
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r3 ds.l 1 ; 11c
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ds.l 1
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r4 ds.l 1 ; 124
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ds.l 1
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r5 ds.l 1 ; 12c
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ds.l 1
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r6 ds.l 1 ; 134
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ds.l 1
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r7 ds.l 1 ; 13c
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ds.l 1
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r8 ds.l 1 ; 144
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ds.l 1
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r9 ds.l 1 ; 14c
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ds.l 1
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r10 ds.l 1 ; 154
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ds.l 1
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r11 ds.l 1 ; 15c
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ds.l 1
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r12 ds.l 1 ; 164
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ds.l 1
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r13 ds.l 1 ; 16c
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ds.l 1
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r14 ds.l 1 ; 174
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ds.l 1
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r15 ds.l 1 ; 17c
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ds.l 1
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r16 ds.l 1 ; 184
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ds.l 1
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r17 ds.l 1 ; 18c
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ds.l 1
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r18 ds.l 1 ; 194
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ds.l 1
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r19 ds.l 1 ; 19c
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ds.l 1
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r20 ds.l 1 ; 1a4
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ds.l 1
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r21 ds.l 1 ; 1ac
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ds.l 1
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r22 ds.l 1 ; 1b4
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ds.l 1
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r23 ds.l 1 ; 1bc
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ds.l 1
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r24 ds.l 1 ; 1c4
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ds.l 1
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r25 ds.l 1 ; 1cc
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ds.l 1
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r26 ds.l 1 ; 1d4
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ds.l 1
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r27 ds.l 1 ; 1dc
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ds.l 1
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r28 ds.l 1 ; 1e4
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ds.l 1
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r29 ds.l 1 ; 1ec
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ds.l 1
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r30 ds.l 1 ; 1f4
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ds.l 1
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r31 ds.l 1 ; 1fc
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FloatRegisters ds.d 32 ; 200:300
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endr
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@ -1,11 +1,6 @@
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include 'MacErrors.a'
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include 'Multiprocessing.a'
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include 'InfoRecords.a'
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include 'EmulatorPublic.a'
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include 'NKPublic.a'
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include 'NKOpaque.a'
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include 'NKStructs.a'
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include 'NKEquates.s'
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include 'NKMacros.s'
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