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https://github.com/elliotnunn/powermac-rom.git
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141 lines
3.5 KiB
ArmAsm
141 lines
3.5 KiB
ArmAsm
;_______________________________________________________________________
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; Equates for the whole NanoKernel
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;_______________________________________________________________________
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; Helps with making equates
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; X = 0x00008000, Xbit=16, Xshift=15
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macro
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_bitEqu &bit, &name
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&name equ 1 << (31-&bit)
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bit&name equ &bit
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shift&name equ 31 - &bit
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endm
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kNanoKernelVersion equ $0228
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; PowerPC Machine Status Register (MSR) bits
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; (borrowing the _bitEqu macro from NKInfoRecordsPriv.s)
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_bitEqu 13, MsrPOW
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_bitEqu 15, MsrILE
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_bitEqu 16, MsrEE
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_bitEqu 17, MsrPR
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_bitEqu 18, MsrFP
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_bitEqu 19, MsrME
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_bitEqu 20, MsrFE0
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_bitEqu 21, MsrSE
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_bitEqu 22, MsrBE
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_bitEqu 23, MsrFE1
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_bitEqu 25, MsrIP
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_bitEqu 26, MsrIR
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_bitEqu 27, MsrDR
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_bitEqu 30, MsrRI
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_bitEqu 31, MsrLE
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; Special Purpose Registers (SPRs) not understood by MPW
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l2cr equ 1017
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; Alignment for NanoKernel interrupt routines (mostly Interrupts.s)
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kIntAlign equ 5
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; Junk
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; IRP is 10 pages below KDP (measured start to start)
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; This should be neatened up to describe the kernel global area
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IRPOffset equ (-10) * 4096
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kKDPfromIRP equ 10 * 4096
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kPoolOffsetFromGlobals equ (-7) * 4096 ; goes all the way up to 24 bytes short of PSA
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; Branch instruction BO fields
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; (disregarding static prediction :)
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BO_IF equ 12
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BO_IF_NOT equ 4
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Z equ 0x80000000
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; SIGP (SIGnal Plugin) selectors used by the kernel:
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kStartProcessor equ 1 ; r4 = target CPU idx, r5 = cpu's entry point, r6 = entry point's r3 (CPU struct ptr)
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kStopProcessor equ 3 ; r4 = target CPU idx
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kResetProcessor equ 4 ; r4 = target CPU idx
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kAlert equ 5 ; r4 = target CPU idx? ; my name, has something to do with timers
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kSIGP6 equ 6 ; r4 = target CPU idx?
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kSIGP7 equ 7 ; r4 = target CPU idx?
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kSynchClock equ 8 ; r4 = target CPU idx,
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kSIGP9 equ 9 ; no args?
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kGetProcessorTemp equ 12 ; r4 = selector (ignored on Core99), r5 = cpu ID ; my name
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kSIGP17 equ 17 ; r4 = target CPU idx?
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; Exception cause equates
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; System = FFFFFFFF, Alt = 7DF2F700 (ecInstPageFault and ecDataPageFault disabled), same +/- VM
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ecNoException equ 0 ; Exception
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ecSystemCall equ 1 ; ?
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ecTrapInstr equ 2 ; Exception
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ecFloatException equ 3 ; Exception
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ecInvalidInstr equ 4 ; Exception
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ecPrivilegedInstr equ 5 ; ?
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ecMachineCheck equ 7 ; Exception
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ecInstTrace equ 8 ; Exception
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ecInstInvalidAddress equ 10 ; Exception
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ecInstHardwareFault equ 11 ; Exception
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ecInstPageFault equ 12 ; Exception
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ecInstSupAccessViolation equ 14 ; Exception
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; Usually from MemRetryDSI (also IntAlignment and IntMachineCheck)
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ecDataInvalidAddress equ 18 ; ExceptionMemRetried
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ecDataHardwareFault equ 19 ; ExceptionMemRetried
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ecDataPageFault equ 20 ; ExceptionMemRetried
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ecDataWriteViolation equ 21 ; ExceptionMemRetried
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ecDataSupAccessViolation equ 22 ; ExceptionMemRetried
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ecDataSupWriteViolation equ 23 ; ?
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ecUnknown24 equ 24 ; ExceptionMemRetried
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; Runtime Flag equates
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_bitEqu 0, Flag0
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_bitEqu 1, Flag1
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_bitEqu 2, Flag2
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_bitEqu 3, Flag3
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_bitEqu 4, Flag4
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_bitEqu 5, Flag5
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_bitEqu 6, Flag6
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_bitEqu 7, Flag7
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_bitEqu 8, FlagEmu
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_bitEqu 9, Flag9
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_bitEqu 10, FlagBlue
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_bitEqu 11, Flag11
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_bitEqu 12, FlagVec
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_bitEqu 13, FlagHasMQ
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_bitEqu 14, Flag14
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_bitEqu 15, Flag15
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_bitEqu 16, FlagSIGP
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_bitEqu 17, Flag17
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_bitEqu 18, Flag18
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_bitEqu 19, Flag19
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_bitEqu 20, FlagFE0
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_bitEqu 21, FlagSE
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_bitEqu 22, FlagBE
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_bitEqu 23, FlagFE1
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_bitEqu 24, Flag24
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_bitEqu 25, Flag25
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_bitEqu 26, Flag26
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_bitEqu 27, FlagLowSaves
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_bitEqu 28, Flag28
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_bitEqu 29, Flag29
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_bitEqu 30, Flag30
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_bitEqu 31, Flag31
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