mirror of
https://github.com/elliotnunn/powermac-rom.git
synced 2024-07-06 08:28:58 +00:00
435 lines
11 KiB
ArmAsm
Executable File
435 lines
11 KiB
ArmAsm
Executable File
; AUTO-GENERATED SYMBOL LIST
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########################################################################
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; These registers will be used throughout
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rCI set r26
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lwz rCI, KDP.ConfigInfoPtr(r1)
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rNK set r25
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lwz rNK, KDP.CodeBase(r1)
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rPgMap set r18
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lwz rPgMap, KDP.PageMapStartPtr(r1)
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rXER set r17
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mfxer rXER
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########################################################################
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InitVectorTables
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; System/Alternate Context tables
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_kaddr r23, rNK, SystemCrash
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addi r8, r1, KDP.VecTblSystem
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li r22, 3 * VecTbl.Size
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@vectab_initnext_segment
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subic. r22, r22, 4
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stwx r23, r8, r22
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bne @vectab_initnext_segment
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rSys set r9 ; to clarify which table is which
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rAlt set r8
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addi rSys, r1, KDP.VecTblSystem
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mtsprg 3, rSys
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addi rAlt, r1, KDP.VecTblAlternate
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_kaddr r23, rNK, SystemCrash
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stw r23, VecTbl.SystemReset(rSys)
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stw r23, VecTbl.SystemReset(rAlt)
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_kaddr r23, rNK, MachineCheckInt
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stw r23, VecTbl.MachineCheck(rSys)
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stw r23, VecTbl.MachineCheck(rAlt)
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_kaddr r23, rNK, DataStorageInt
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stw r23, VecTbl.DSI(rSys)
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stw r23, VecTbl.DSI(rAlt)
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_kaddr r23, rNK, InstStorageInt
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stw r23, VecTbl.ISI(rSys)
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stw r23, VecTbl.ISI(rAlt)
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lbz r22, NKConfigurationInfo.InterruptHandlerKind(rCI)
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cmpwi r22, 0
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_kaddr r23, rNK, ExternalInt0
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beq @chosenIntHandler
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cmpwi r22, 1
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_kaddr r23, rNK, ExternalInt1
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beq @chosenIntHandler
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cmpwi r22, 2
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_kaddr r23, rNK, ExternalInt2
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beq @chosenIntHandler
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@chosenIntHandler
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stw r23, VecTbl.External(rSys)
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_kaddr r23, rNK, ProgramInt
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stw r23, VecTbl.External(rAlt)
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_kaddr r23, rNK, AlignmentInt
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stw r23, VecTbl.Alignment(rSys)
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stw r23, VecTbl.Alignment(rAlt)
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_kaddr r23, rNK, ProgramInt
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stw r23, VecTbl.Program(rSys)
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stw r23, VecTbl.Program(rAlt)
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_kaddr r23, rNK, FPUnavailInt
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stw r23, VecTbl.FPUnavail(rSys)
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stw r23, VecTbl.FPUnavail(rAlt)
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_kaddr r23, rNK, DecrementerIntSys
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stw r23, VecTbl.Decrementer(rSys)
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_kaddr r23, rNK, DecrementerIntAlt
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stw r23, VecTbl.Decrementer(rAlt)
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_kaddr r23, rNK, SyscallInt
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stw r23, VecTbl.Syscall(rSys)
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stw r23, VecTbl.Syscall(rAlt)
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_kaddr r23, rNK, TraceInt
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stw r23, VecTbl.Trace(rSys)
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stw r23, VecTbl.Trace(rAlt)
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stw r23, VecTbl.OtherTrace(rSys)
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stw r23, VecTbl.OtherTrace(rAlt)
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; MemRetry vector table
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addi r8, r1, KDP.VecTblMemRetry
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_kaddr r23, rNK, MRMachineCheckInt
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stw r23, VecTbl.MachineCheck(r8)
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_kaddr r23, rNK, MRDataStorageInt
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stw r23, VecTbl.DSI(r8)
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########################################################################
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; Fill the KCallTbl, the ProgramInt interface to the NanoKernel
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InitKCalls
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_kaddr r23, rNK, KCallSystemCrash ; Uninited call -> crash
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addi r8, r1, KDP.KCallTbl
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li r22, KCallTbl.Size
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@loop
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subic. r22, r22, 4
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stwx r23, r8, r22
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bne @loop
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_kaddr r23, rNK, KCallReturnFromException
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stw r23, KCallTbl.ReturnFromException(r8)
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_kaddr r23, rNK, KCallRunAlternateContext
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stw r23, KCallTbl.RunAlternateContext(r8)
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_kaddr r23, rNK, KCallResetSystem
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stw r23, KCallTbl.ResetSystem(r8)
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_kaddr r23, rNK, KCallVMDispatch
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stw r23, KCallTbl.VMDispatch(r8)
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_kaddr r23, rNK, KCallPrioritizeInterrupts
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stw r23, KCallTbl.PrioritizeInterrupts(r8)
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_kaddr r23, rNK, KCallSystemCrash
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stw r23, KCallTbl.SystemCrash(r8)
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########################################################################
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; Init the NCB Pointer Cache
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_InvalNCBPointerCache scratch=r23
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########################################################################
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; Put HTABORG and PTEGMask in KDP, and zero out the last PTEG
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InitHTAB
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mfspr r8, sdr1
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rlwinm r22, r8, 16, 7, 15 ; Get settable HTABMASK bits
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rlwinm r8, r8, 0, 0, 15 ; and HTABORG
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ori r22, r22, (-64) & 0xffff; "PTEGMask" from upper half of HTABMASK
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stw r8, KDP.HTABORG(r1) ; Save
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stw r22, KDP.PTEGMask(r1)
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li r23, 0 ; Zero out the last PTEG in the HTAB
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addi r22, r22, 64
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@next_segment
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subic. r22, r22, 4
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stwx r23, r8, r22
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bgt @next_segment
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@skip_zeroing_pteg
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bl FlushTLB ; Flush the TLB after touching the HTAB
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########################################################################
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; Get a copy of the PageMap (and the SegMaps required to interpret it)
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; Each entry in the PageMap specifies a contiguous part of the MacOS
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; address space (or it has a special value). The four SegMaps (supervisor,
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; user, CPU, overlay) contain pointers that tell us which entries belong
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; in which 256 MB "segments".
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CopyPageMap
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; r9 = PageMap ptr, r22 = PageMap size
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lwz r9, NKConfigurationInfo.PageMapInitOffset(rCI)
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lwz r22, NKConfigurationInfo.PageMapInitSize(rCI)
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add r9, r9, rCI
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@copynext_segment_pagemap
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subi r22, r22, 4 ; load a word from the CI pagemap (top first)
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lwzx r21, r9, r22
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andi. r23, r21, PME.DaddyFlag | PME.PhysicalIsRelativeFlag
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cmpwi r23, PME.PhysicalIsRelativeFlag
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bne @physical_address_not_relative_to_config_info
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; if the physical address of the area is relative to the ConfigInfo struct:
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rlwinm r21, r21, 0, ~PME.PhysicalIsRelativeFlag
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add r21, r21, rCI
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@physical_address_not_relative_to_config_info
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stwx r21, rPgMap, r22 ; save in the KDP pagemap
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subic. r22, r22, 4
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lwzx r20, r9, r22 ; load another word, but no be cray
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stwx r20, rPgMap, r22 ; just save it in KDP
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bgt @copynext_segment_pagemap
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@skip_copying_pagemap
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; Edit three entries in the PageMap that the kernel "owns"
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lwz r8, NKConfigurationInfo.PageMapIRPOffset(rCI)
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add r8, rPgMap, r8
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lwz r23, PME.PBaseAndFlags(r8)
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rlwimi r23, r1, 0, 0xFFFFF000
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stw r23, PME.PBaseAndFlags(r8)
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lwz r8, NKConfigurationInfo.PageMapKDPOffset(rCI)
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add r8, rPgMap, r8
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lwz r23, PME.PBaseAndFlags(r8)
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rlwimi r23, r1, 0, 0xFFFFF000
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stw r23, PME.PBaseAndFlags(r8)
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lwz r19, KDP.EDPPtr(r1)
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lwz r8, NKConfigurationInfo.PageMapEDPOffset(rCI)
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add r8, rPgMap, r8
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lwz r23, PME.PBaseAndFlags(r8)
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rlwimi r23, r19, 0, 0xFFFFF000
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stw r23, PME.PBaseAndFlags(r8)
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; Copy the SegMap
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addi r9, rCI, NKConfigurationInfo.SegMaps - 4
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addi r8, r1, KDP.SegMaps - 4
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li r22, 4*16*8 ; 4 maps * 16 segments * (ptr+flags=8b)
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@segmap_copynext_segment
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lwzu r23, 4(r9)
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subic. r22, r22, 8
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add r23, rPgMap, r23 ; even-indexed words are PMDT offsets in PageMap
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stwu r23, 4(r8)
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lwzu r23, 4(r9)
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stwu r23, 4(r8)
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bgt @segmap_copynext_segment
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########################################################################
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; Copy "BATRangeInit" array
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CopyBATRangeInit
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addi r9, rCI, NKConfigurationInfo.BATRangeInit - 4
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addi r8, r1, KDP.BATs - 4
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li r22, 4*4*8 ; 4 maps * 4 BATs * (UBAT+LBAT=8b)
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@bat_copynext_segment
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lwzu r20, 4(r9) ; grab UBAT
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lwzu r21, 4(r9) ; grab LBAT
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stwu r20, 4(r8) ; store UBAT
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_clear r23, r21, 22 ; if LBAT[22] (reserved) is set:
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cmpw r21, r23
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beq @bitnotset
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add r21, r23, rCI ; then LBAT[BRPN] is relative to ConfigInfo struct
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@bitnotset
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subic. r22, r22, 8
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stwu r21, 4(r8) ; store LBAT
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bgt @bat_copynext_segment
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########################################################################
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; Save some ptrs that allow us to enable Overlay mode, etc
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addi r23, r1, KDP.SegMap32SupInit
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stw r23, KDP.SupervisorMap.SegMapPtr(r1)
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lwz r23, NKConfigurationInfo.BatMap32SupInit(rCI)
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stw r23, KDP.SupervisorMap.BatMap(r1)
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addi r23, r1, KDP.SegMap32UsrInit
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stw r23, KDP.UserMap.SegMapPtr(r1)
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lwz r23, NKConfigurationInfo.BatMap32UsrInit(rCI)
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stw r23, KDP.UserMap.BatMap(r1)
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addi r23, r1, KDP.SegMap32CPUInit
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stw r23, KDP.CpuMap.SegMapPtr(r1)
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lwz r23, NKConfigurationInfo.BatMap32CPUInit(rCI)
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stw r23, KDP.CpuMap.BatMap(r1)
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addi r23, r1, KDP.SegMap32OvlInit
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stw r23, KDP.OverlayMap.SegMapPtr(r1)
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lwz r23, NKConfigurationInfo.BatMap32OvlInit(rCI)
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stw r23, KDP.OverlayMap.BatMap(r1)
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########################################################################
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; Create a PageList for the Primary Address Range
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; Usable physical pages are:
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; Inside a RAM bank, and
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; NOT inside the kernel's reserved physical memory
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; By 'draft PTE', I mean these parts of the second word of a PTE:
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; physical page number (base & 0xfffff000)
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; WIMG bits (from oddly formatted ConfigInfo.PageAttributeInit)
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; bottom PP bit always set
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; And all this goes at the bottom of the kernel reserved area.
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; Leave ptr to kernel reserved area in r21
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; Leave ptr to topmost entry in r29.
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CreatePageList
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lwz r21, KDP.KernelMemoryBase(r1) ; "KernelMemory" is forbidden
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lwz r20, KDP.KernelMemoryEnd(r1)
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subi r29, r21, 4 ; ptr to last added entry
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addi r19, r1, KDP.SysInfo.Bank0Start - 8
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lwz r23, KDP.PageAttributeInit(r1) ; default WIMG/PP settings in PTEs
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; Pull WIMG bits out of PageAttributeInit
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li r30, 1
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rlwimi r30, r23, 1, 25, 25
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rlwimi r30, r23, 31, 26, 26
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xori r30, r30, 0x20
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rlwimi r30, r23, 29, 27, 27
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rlwimi r30, r23, 27, 28, 28
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li r23, NKSystemInfo.MaxBanks
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@nextbank
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subic. r23, r23, 1
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blt @done
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lwzu r31, 8(r19) ; bank start address
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lwz r22, 4(r19) ; bank size
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or r31, r31, r30 ; looks a lot like the second word of a PTE
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@nextpage
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cmplwi r22, 4096
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cmplw cr6, r31, r21
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cmplw cr7, r31, r20
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subi r22, r22, 4096
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blt @nextbank
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; Check that this page is outside the kernel's reserved area
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blt cr6, @below_reserved
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blt cr7, @in_reserved
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@below_reserved
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stwu r31, 4(r29) ; write that part-PTE at the base of kernel memory
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@in_reserved
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addi r31, r31, 4096
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b @nextpage
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@done
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########################################################################
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; In the PageMap, create a Primary Address Range matching the size of PageList
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; For every segment that contains part of the PAR, the first PME will be rewritten
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; Going in, r21/r29 point to first/last element of PageList
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CreatePARInPageMap
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; r19 = size of RAM represented in PageList ("Usable" and initial "Logical" RAM)
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; r22 = number of 4096b pages, minus one page (counter)
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subf r22, r21, r29
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li r30, 0
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addi r19, r22, 4
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slwi r19, r19, 10
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ori r30, r30, 0xffff
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stw r19, KDP.SysInfo.UsableMemorySize(r1)
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srwi r22, r22, 2
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stw r19, KDP.SysInfo.LogicalMemorySize(r1)
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; convert r19 to pages, and save in some places
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srwi r19, r19, 12
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stw r19, KDP.VMLogicalPages(r1)
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stw r19, KDP.TotalPhysicalPages(r1)
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addi r29, r1, KDP.PARPerSegmentPLEPtrs - 4 ; where to save per-segment PLE ptr
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addi r19, r1, KDP.SegMap32SupInit - 8 ; which part of PageMap to update
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stw r21, KDP.PARPageListPtr(r1)
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@next_segment
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cmplwi r22, 0xffff ; continue (bgt) while there are still pages left
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; Rewrite the first PME in this segment
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lwzu r8, 8(r19) ; find PME using SegMap32SupInit
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rotlwi r31, r21, 10
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ori r31, r31, 0xC00
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stw r30, 0(r8) ; LBase = 0, PageCount = 0xFFFF
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stw r31, 4(r8) ; PBase = PLE ptr, Flags = DaddyFlag + CountingFlag
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stwu r21, 4(r29) ; point PARPerSegmentPLEPtrs to segments's first PLE
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addis r21, r21, 4 ; increment pointer into PLE (64k pages/segment * 4b/PLE)
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subis r22, r22, 1 ; decrement number of pending pages (64k pages/segment)
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bgt @next_segment
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; Reduce the number of pages in the last segment
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sth r22, PME.PageCount(r8)
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########################################################################
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; Enable the ROM Overlay
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addi r29, r1, KDP.OverlayMap
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bl SetMap
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########################################################################
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; Make sure some important areas of RAM are in the HTAB
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lwz r27, KDP.ConfigInfoPtr(r1)
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lwz r27, NKConfigurationInfo.LA_InterruptCtl(r27)
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bl PutPTE
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lwz r27, KDP.ConfigInfoPtr(r1)
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lwz r27, NKConfigurationInfo.LA_KernelData(r27)
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bl PutPTE
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lwz r27, KDP.ConfigInfoPtr(r1)
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lwz r27, NKConfigurationInfo.LA_EmulatorData(r27)
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bl PutPTE
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########################################################################
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; Restore the fixedpt exception register (clobbered by addic)
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mtxer rXER
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