mirror of
https://github.com/elliotnunn/powermac-rom.git
synced 2024-09-08 10:54:24 +00:00
240 lines
4.8 KiB
ArmAsm
240 lines
4.8 KiB
ArmAsm
; AUTO-GENERATED SYMBOL LIST
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########################################################################
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_alignToCacheBlock
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IntDecrementerSystem
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mfsprg r1, 0
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stmw r2, EWA.r2
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mfdec r31
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lwz r30, KDP.ContextBlock(r1)
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DecCommon
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mfxer r29
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lwz r28, KDP.ProcessorInfo
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IntDecrementerAlternate
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mfsprg r1, 0
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stmw r2, EWA.r2
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lwz r31, KDP.ContextBlock(r1)
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mfdec r30
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b DecCommon
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IntDecrementer
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bl LoadInterruptRegisters
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lwz r8, KDP.OldKDP(r1)
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rlwinm. r9, r11, 0, 16, 16
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cmpwi cr1, r8, 0x00
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beq MaskedInterruptTaken
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beq cr1, IntDecrementer_0x54
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stw r16, ContextBlock.r16(r6)
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stw r17, ContextBlock.r17(r6)
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stw r18, ContextBlock.r18(r6)
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stw r25, ContextBlock.r25(r6)
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bl SchFiddlePriorityShifty
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ble IntDecrementer_0x48
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lwz r8, PSA.CriticalReadyQ + ReadyQueue.Timecake + 4(r1)
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mtspr dec, r8
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lwz r16, ContextBlock.r16(r6)
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lwz r17, ContextBlock.r17(r6)
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lwz r18, ContextBlock.r18(r6)
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b IntReturn
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IntDecrementer_0x48
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lwz r16, 0x0184(r6)
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lwz r17, 0x018c(r6)
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lwz r18, 0x0194(r6)
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IntDecrementer_0x54
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; r6 = ewa
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bl SchSaveStartingAtR14
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; r8 = sprg0 (not used by me)
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_Lock PSA.SchLock, scratch1=r8, scratch2=r9
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lwz r8, 0x0e8c(r1)
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addi r8, r8, 0x01
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stw r8, 0x0e8c(r1)
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bl TimerDispatch
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_AssertAndRelease PSA.SchLock, scratch=r8
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bl SchRestoreStartingAtR14
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b IntReturn
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########################################################################
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_alignToCacheBlock
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IntDSI
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mfsprg r1, 0
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stmw r2, EWA.r2(r1)
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mfsprg r11, 1
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stw r0, EWA.r0(r1)
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stw r11, EWA.r1(r1)
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mfsrr0 r10
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mfsrr1 r11
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mfsprg r12, 2
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mfcr r13
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mfmsr r14
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_bset r15, r14, bitMsrDR
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mtmsr r15
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lwz r27, 0(r10)
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mtmsr r14
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EmulateDataAccess
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rlwinm. r18, r27, 18, 25, 29 ; r16 = 4 * rA (r0 wired to 0)
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lwz r25, KDP.PA_FDP(r1)
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li r21, 0
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beq @r0
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lwzx r18, r1, r18
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@r0
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andis. r26, r27, 0xec00
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lwz r16, EWA.Flags(r1)
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rlwinm r17, r27, 0, 6, 15
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rlwimi r16, r16, 27, 26, 26
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bge @low_opcode
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rlwimi r25, r27, 7, 26, 29 ; opcode >= 32
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rlwimi r25, r27, 12, 25, 25
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lwz r26, 0xb80(r25)
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extsh r23, r27
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rlwimi r25, r26, 26, 22, 29
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mtlr r25
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mtcr r26
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add r18, r18, r23
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rlwimi r17, r26, 6, 26, 5
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blr
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@low_opcode ; opcode <= 31
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rlwimi r25, r27, 27, 26, 29
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rlwimi r25, r27, 0, 25, 25
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rlwimi r25, r27, 6, 23, 24
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lwz r26, 0x800(r25)
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rlwinm r23, r27, 23, 25, 29
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rlwimi r25, r26, 26, 22, 29
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mtlr r25
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mtcr r26
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lwzx r23, r1, r23
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rlwimi r17, r26, 6, 26, 5
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add r18, r18, r23
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bclr BO_IF_NOT, 13
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neg r23, r23
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add r18, r18, r23
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blr
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########################################################################
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_alignToCacheBlock
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IntAlignment
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mfsprg r1, 0
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stmw r2, EWA.r2(r1)
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lwz r11, KDP.NanoKernelInfo + NKNanoKernelInfo.MisalignmentCount(r1)
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addi r11, r11, 1
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stw r11, KDP.NanoKernelInfo + NKNanoKernelInfo.MisalignmentCount(r1)
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mfsprg r11, 1
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stw r0, EWA.r0(r1)
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stw r11, EWA.r1(r1)
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mfsrr0 r10
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mfsrr1 r11
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mfsprg r12, 2
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mfcr r13
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mfsprg r24, 3
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mfdsisr r27
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mfdar r18
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extrwi. r21, r27, 2, 15 ; evaluate hi two bits of XO (or 0 for d-form?)
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lwz r25, KDP.PA_FDP(r1)
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rlwinm r17, r27, 16, 0x03FF0000
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lwz r16, KDP.Flags(r1)
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rlwimi r25, r27, 24, 23, 29 ; add constant fields from dsisr (*4) to FDP
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rlwimi r16, r16, 27, 26, 26 ; copy FlagSE to Flag26
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bne @X_form
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; D- or DS-form (immediate-indexed) instruction
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lwz r26, FDP_TableBase + 4*(0x40 + 0x20)(r25) ; use upper quarter of table
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mfmsr r14
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rlwimi r25, r26, 26, 22, 29 ; third byte of lookup value is a /4 code offset in FDP
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mtlr r25 ; so get ready to go there
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_bset r15, r14, bitMsrDR
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mtcr r26
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rlwimi r17, r26, 6, 26, 5 ; wrap some shite around the register values
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blr
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@X_form
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; X-form (register-indexed) instruction
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lwz r26, FDP_TableBase(r25)
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mfmsr r14
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rlwimi r25, r26, 26, 22, 29
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mtlr r25
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_bset r15, r14, bitMsrDR
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mtcr r26
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rlwimi r17, r26, 6, 26, 5
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bclr BO_IF_NOT, 12
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mtmsr r15
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lwz r27, 0(r10)
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mtmsr r14
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blr
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########################################################################
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; FDP GOES HERE!
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########################################################################
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_alignToCacheBlock
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IntISI
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bl LoadInterruptRegisters
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andis. r8, r11, 0x4020 ; what the hell are these MSR bits?
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beq major_0x039dc_0x14
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stmw r14, EWA.r14(r8)
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mr r27, r10
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bl PopulateHTAB
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bne @not_in_htab
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mfsprg r24, 3
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mfmsr r14
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_bset r15, r14, bitMsrDR
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addi r23, r1, KDP.VecBaseMemRetry
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mtsprg 3, r23
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mr r19, r10
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mtmsr r15
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lbz r23, 0(r19)
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sync
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mtmsr r14
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mtsprg 3, r24
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lmw r14, EWA.r14(r8)
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b IntReturn
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@not_in_htab
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lmw r14, EWA.r14(r8)
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li r8, ecInstPageFault
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blt Exception
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li r8, ecInstInvalidAddress
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b Exception
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major_0x039dc_0x14
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andis. r8, r11, 0x800
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li r8, ecInstSupAccessViolation
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bne Exception
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li r8, ecInstHardwareFault
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b Exception
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########################################################################
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IntMachineCheck
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bl LoadInterruptRegisters
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li r8, ecMachineCheck
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b Exception
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