mirror of
https://github.com/elliotnunn/powermac-rom.git
synced 2024-07-29 04:29:01 +00:00
436 lines
9.1 KiB
ArmAsm
436 lines
9.1 KiB
ArmAsm
; AUTO-GENERATED SYMBOL LIST
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########################################################################
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_align 6
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IntExternal0
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mfsprg r1, 0 ; Init regs and increment ctr
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stw r0, EWA.r2(r1)
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stw r2, EWA.r2(r1)
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lwz r2, KDP.NKInfo.ExternalIntCount(r1)
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stw r3, EWA.r3(r1)
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addi r2, r2, 1
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stw r2, KDP.NKInfo.ExternalIntCount(r1)
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mfmsr r2 ; Save a self-ptr to FF880000... why?
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lis r3, 0xFF88
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_bset r0, r2, bitMsrDR
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stw r4, EWA.r4(r1)
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stw r5, EWA.r5(r1)
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mfsrr0 r4
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mfsrr1 r5
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mtmsr r0
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stw r3, 0(r3)
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mtmsr r2
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mtsrr0 r4
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mtsrr1 r5
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lwz r4, EWA.r4(r1)
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lwz r5, EWA.r5(r1)
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lwz r2, KDP.DebugIntPtr(r1) ; Query the shared mem (debug?) for int num
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mfcr r0
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lha r2, 0(r2)
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lwz r3, KDP.PA_EmulatorIplValue(r1)
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rlwinm. r2, r2, 0, 0x80000007
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ori r2, r2, 0x8000
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sth r2, 0(r3)
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mfsprg r2, 2
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lwz r3, EWA.r3(r1)
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mtlr r2
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beq @return ; 0 -> no interrupt
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bgt @clear ; negative -> clear interrupt
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; positive -> post interrupt
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lwz r2, KDP.PostIntMaskInit(r1) ; Post an interrupt via Cond Reg
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or r0, r0, r2
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@return
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mtcr r0 ; Set CR and return
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lwz r0, EWA.r0(r1)
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lwz r2, EWA.r2(r1)
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mfsprg r1, 1
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rfi
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@clear
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lwz r2, KDP.ClearIntMaskInit(r1) ; Clear an interrupt via Cond Reg
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and r0, r0, r2
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b @return
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########################################################################
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_align 6
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IntLookupTable
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dc.l 0, 1, 2, 2, 4, 4, 4, 4
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dc.l 3, 3, 3, 3, 4, 4, 4, 4
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dc.l 4, 4, 4, 4, 4, 4, 4, 4
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dc.l 4, 4, 4, 4, 4, 4, 4, 4
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dc.l 7, 7, 7, 7, 7, 7, 7, 7
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dc.l 7, 7, 7, 7, 7, 7, 7, 7
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dc.l 7, 7, 7, 7, 7, 7, 7, 7
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dc.l 7, 7, 7, 7, 7, 7, 7, 7
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_align 6
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IntExternal1
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mfsprg r1, 0 ; Init regs and increment ctr
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stw r0, EWA.r2(r1)
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stw r2, EWA.r2(r1)
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lwz r2, KDP.NKInfo.ExternalIntCount(r1)
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stw r3, EWA.r3(r1)
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addi r2, r2, 1
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stw r2, KDP.NKInfo.ExternalIntCount(r1)
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lis r2, 0x50F3 ; Query OpenPIC at 50F2A000
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mfmsr r2
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_bset r0, r2, bitMsrDR
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stw r4, EWA.r4(r1)
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stw r5, EWA.r5(r1)
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mfsrr0 r4
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mfsrr1 r5
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mtmsr r0
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li r0, 0xC0
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stb r0, -0x6000(r2)
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eieio
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lbz r0, -0x6000(r2)
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mtmsr r2
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mtsrr0 r4
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mtsrr1 r5
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lwz r4, EWA.r4(r1)
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lwz r5, EWA.r5(r1)
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lwz r3, KDP.PA_NanoKernelCode(r1) ; Loop that number up in the table
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rlwimi r3, r0, 0, 0x0000003F
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lbz r2, IntLookupTable-NKTop(r3)
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mfcr r0
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lwz r3, KDP.PA_EmulatorIplValue(r1)
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clrlwi. r2, r2, 29
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sth r2, 0(r3)
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mfsprg r2, 2
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lwz r3, EWA.r3(r1)
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mtlr r2
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beq @clear ; 0 -> clear interrupt
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; nonzero -> post interrupt
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lwz r2, KDP.PostIntMaskInit(r1) ; Post an interrupt via Cond Reg
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or r0, r0, r2
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@return
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mtcr r0 ; Set CR and return
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lwz r0, EWA.r0(r1)
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lwz r2, EWA.r2(r1)
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mfsprg r1, 1
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rfi
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@clear
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lwz r2, KDP.ClearIntMaskInit(r1) ; Clear an interrupt via Cond Reg
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and r0, r0, r2
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b @return
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########################################################################
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_align 6
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IntExternal2
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mfsprg r1, 0 ; Init regs and increment ctr
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stw r0, EWA.r2(r1)
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stw r2, EWA.r2(r1)
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lwz r2, KDP.NKInfo.ExternalIntCount(r1)
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stw r3, EWA.r3(r1)
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addi r2, r2, 1
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stw r2, KDP.NKInfo.ExternalIntCount(r1)
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lis r2, 0xF300 ; Query OpenPIC at F3000028/C
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mfmsr r2
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_bset r3, r2, bitMsrDR
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stw r4, EWA.r4(r1)
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stw r5, EWA.r5(r1)
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mfsrr0 r4
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mfsrr1 r5
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mtmsr r3
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lis r3, 0x8000
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stw r3, 0x28(r2)
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eieio
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lwz r3, 0x2C(r2)
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mtmsr r0
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mtsrr0 r4
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mtsrr1 r5
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lwz r4, EWA.r4(r1)
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lwz r5, EWA.r5(r1)
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mfcr r0
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; Interpret OpenPic result:
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rlwinm. r2, r3, 0, 11, 11 ; bit 11 -> 7
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li r2, 7
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bne @gotnum
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rlwinm r2, r3, 0, 15, 16 ; bit 15-16/21/31 -> 4
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rlwimi. r2, r3, 0, 21, 31
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li r2, 4
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bne @gotnum
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rlwinm. r2, r3, 0, 18, 18 ; bit 18 -> 3
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li r2, 3
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bne @gotnum
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andis. r2, r3, 0x7FEA ; bit 1-10/12/14/19-20 -> 2
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rlwimi. r2, r3, 0, 19, 20
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li r2, 2
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bne @gotnum
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extrwi. r2, r3, 1, 13 ; bit 13 -> 1
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; else -> 0
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@gotnum
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lwz r3, KDP.PA_EmulatorIplValue(r1)
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sth r2, 0(r3)
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mfsprg r2, 2
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lwz r3, EWA.r3(r1)
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mtlr r2
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beq @clear ; 0 -> clear interrupt
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; nonzero -> post interrupt
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lwz r2, KDP.PostIntMaskInit(r1) ; Post an interrupt via Cond Reg
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or r0, r0, r2
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@return
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mtcr r0 ; Set CR and return
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lwz r0, EWA.r0(r1)
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lwz r2, EWA.r2(r1)
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mfsprg r1, 1
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rfi
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@clear
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lwz r2, KDP.ClearIntMaskInit(r1) ; Clear an interrupt via Cond Reg
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and r0, r0, r2
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b @return
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########################################################################
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; Increment the Sys/Alt CPU clocks, and the Dec-int counter
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_align 6
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IntDecrementerSystem
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mfsprg r1, 0
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stmw r2, EWA.r2(r1)
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mfdec r31
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lwz r30, KDP.OtherContextDEC(r1)
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DecCommon ; DEC for Alternate=r30, System=r31
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mfxer r29 ; we will do carries
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lwz r28, KDP.ProcInfo.DecClockRateHz(r1)
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stw r28, KDP.OtherContextDEC(r1)
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mtdec r28 ; reset Sys and Alt decrementers
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subf r31, r31, r28 ; System ticks actually elapsed
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subf r30, r30, r28 ; Alternate ticks actually elapsed
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lwz r28, KDP.NKInfo.SysContextCpuTime+4(r1)
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lwz r27, KDP.NKInfo.SysContextCpuTime(r1)
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addc r28, r28, r31
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addze r27, r27
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stw r28, KDP.NKInfo.SysContextCpuTime+4(r1)
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stw r27, KDP.NKInfo.SysContextCpuTime(r1)
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lwz r28, KDP.NKInfo.AltContextCpuTime+4(r1)
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lwz r27, KDP.NKInfo.AltContextCpuTime(r1)
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addc r28, r28, r30
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addze r27, r27
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stw r28, KDP.NKInfo.AltContextCpuTime+4(r1)
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stw r27, KDP.NKInfo.AltContextCpuTime(r1)
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mtxer r29
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stw r0, EWA.r0(r1)
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mfsprg r31, 1
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stw r31, EWA.r1(r1)
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lwz r31, KDP.NKInfo.DecrementerIntCount(r1)
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addi r31, r31, 1
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stw r31, KDP.NKInfo.DecrementerIntCount(r1)
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lmw r27, EWA.r27(r1)
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mfsprg r1, 2
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mtlr r1
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mfsprg r1, 1
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rfi
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IntDecrementerAlternate
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mfsprg r1, 0
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stmw r2, EWA.r2(r1)
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lwz r31, KDP.OtherContextDEC(r1)
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mfdec r30
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b DecCommon
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########################################################################
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_align 6
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IntDSI
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mfsprg r1, 0
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stmw r2, EWA.r2(r1)
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mfsprg r11, 1
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stw r0, EWA.r0(r1)
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stw r11, EWA.r1(r1)
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mfsrr0 r10
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mfsrr1 r11
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mfsprg r12, 2
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mfcr r13
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mfmsr r14
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_bset r15, r14, bitMsrDR
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mtmsr r15
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lwz r27, 0(r10)
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mtmsr r14
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EmulateDataAccess
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rlwinm. r18, r27, 18, 25, 29 ; r16 = 4 * rA (r0 wired to 0)
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lwz r25, KDP.PA_FDP(r1)
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li r21, 0
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beq @r0
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lwzx r18, r1, r18
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@r0
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andis. r26, r27, 0xec00
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lwz r16, KDP.Flags(r1)
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mfsprg r24, 3
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rlwinm r17, r27, 0, 6, 15
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rlwimi r16, r16, 27, 26, 26
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bge @low_opcode
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rlwimi r25, r27, 7, 26, 29 ; opcode >= 32
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rlwimi r25, r27, 12, 25, 25
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lwz r26, 0xb80(r25)
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extsh r23, r27
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rlwimi r25, r26, 26, 22, 29
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mtlr r25
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mtcr r26
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add r18, r18, r23
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rlwimi r17, r26, 6, 26, 5
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blr
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@low_opcode ; opcode <= 31
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rlwimi r25, r27, 27, 26, 29
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rlwimi r25, r27, 0, 25, 25
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rlwimi r25, r27, 6, 23, 24
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lwz r26, 0x800(r25)
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rlwinm r23, r27, 23, 25, 29
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rlwimi r25, r26, 26, 22, 29
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mtlr r25
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mtcr r26
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lwzx r23, r1, r23
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rlwimi r17, r26, 6, 26, 5
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add r18, r18, r23
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bclr BO_IF_NOT, 13
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neg r23, r23
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add r18, r18, r23
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blr
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########################################################################
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_align 6
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IntAlignment
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mfsprg r1, 0
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stmw r2, EWA.r2(r1)
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lwz r11, KDP.NKInfo.MisalignmentCount(r1)
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addi r11, r11, 1
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stw r11, KDP.NKInfo.MisalignmentCount(r1)
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mfsprg r11, 1
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stw r0, EWA.r0(r1)
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stw r11, EWA.r1(r1)
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mfsrr0 r10
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mfsrr1 r11
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mfsprg r12, 2
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mfcr r13
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mfsprg r24, 3
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mfdsisr r27
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mfdar r18
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extrwi. r21, r27, 2, 15 ; evaluate hi two bits of XO (or 0 for d-form?)
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lwz r25, KDP.PA_FDP(r1)
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rlwinm r17, r27, 16, 0x03FF0000
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lwz r16, KDP.Flags(r1)
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rlwimi r25, r27, 24, 23, 29 ; add constant fields from dsisr (*4) to FDP
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rlwimi r16, r16, 27, 26, 26 ; copy FlagSE to Flag26
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bne @X_form
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; D- or DS-form (immediate-indexed) instruction
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lwz r26, FDP_TableBase + 4*(0x40 + 0x20)(r25) ; use upper quarter of table
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mfmsr r14
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rlwimi r25, r26, 26, 22, 29 ; third byte of lookup value is a /4 code offset in FDP
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mtlr r25 ; so get ready to go there
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_bset r15, r14, bitMsrDR
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mtcr r26
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rlwimi r17, r26, 6, 26, 5 ; wrap some shite around the register values
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blr
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@X_form
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; X-form (register-indexed) instruction
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lwz r26, FDP_TableBase(r25)
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mfmsr r14
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rlwimi r25, r26, 26, 22, 29
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mtlr r25
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_bset r15, r14, bitMsrDR
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mtcr r26
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rlwimi r17, r26, 6, 26, 5
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bclr BO_IF_NOT, 12
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mtmsr r15
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lwz r27, 0(r10)
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mtmsr r14
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blr
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########################################################################
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; FDP GOES HERE (0xC00)! (just include it as a file?)
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; there are some big mistakes in the labels below!
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_align 10
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FDP
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dcb.l (0x1874-0xC00)/4, 0x46445020 ; 'FDP '
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########################################################################
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IntISI
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bl LoadInterruptRegisters
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andis. r8, r11, 0x4020 ; what the hell are these MSR bits?
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beq major_0x039dc_0x14
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stmw r14, EWA.r14(r8)
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mr r27, r10
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bl PopulateHTAB
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bne @not_in_htab
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mfsprg r24, 3
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mfmsr r14
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_bset r15, r14, bitMsrDR
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addi r23, r1, KDP.VecTblMemRetry
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mtsprg 3, r23
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mr r19, r10
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mtmsr r15
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lbz r23, 0(r19)
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sync
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mtmsr r14
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mtsprg 3, r24
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lmw r14, EWA.r14(r8)
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b IntReturn
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@not_in_htab
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lmw r14, EWA.r14(r8)
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li r8, ecInstPageFault
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blt Exception
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li r8, ecInstInvalidAddress
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b Exception
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major_0x039dc_0x14
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andis. r8, r11, 0x800
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li r8, ecInstSupAccessViolation
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bne Exception
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li r8, ecInstHardwareFault
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b Exception
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########################################################################
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IntMachineCheck
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bl LoadInterruptRegisters
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li r8, ecMachineCheck
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b Exception
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