supermario/base/SuperMarioProj.1994-02-09/Internal/Asm/GrandCentralPriv.a

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2019-06-29 15:17:50 +00:00
;
; File: GrandCentralPriv.a
;
; Contains: private headers for use with the Grand Central I/O Controller
;
; Written by: Craig Prouse
;
; Copyright: © 1993 by Apple Computer, Inc., all rights reserved.
;
; Change History (most recent first):
;
; <SM3> 12/1/93 chp Add serialization primitives to ensure correct operation of
; interrupt enable/disable/clear macros.
; <SM2> 11/19/93 chp Roll back part of <SMG4>. _GCRegisterHandler and
; _GCUnregisterHandler work better with a parameter in D0.
; <SM1> 11/10/93 fau first checked in
; <SMG6> 10/26/93 chp File beautification.
; <SMG5> 9/29/93 chp Fix up conditional inclusion.
; <SMG4> 9/22/93 chp Redesign the macro interfaces. Bit field instructions are no
; longer used in macro implementations because they do not
; guarantee 32-bit memory accesses to I/O locations.
; <SMG3> 8/30/93 chp Add more macros and use nested macro substitution to make the
; macros more readable. Add a reserved field to the dispatch table
; structure to achieve more natural data alignment.
; <SMG2> 8/26/93 chp Add macros for maintaining the Grand Central interrupt dispatch
; table, and for enabling and disabling Grand Central interrupt
; sources.
;
;
IF (&TYPE('__INCLUDINGGRANDCENTRALPRIV__') = 'UNDEFINED') THEN
__INCLUDINGGRANDCENTRALPRIV__ SET 1
IF (&TYPE('__INCLUDINGSYSEQU__') = 'UNDEFINED') THEN
include 'SysEqu.a'
ENDIF
IF (&TYPE('__INCLUDINGSYSPRIVATEEQU__') = 'UNDEFINED') THEN
include 'SysPrivateEqu.a'
ENDIF
; Grand Central controller register mappings
gcInterruptEvents equ $00020 ; offset from Grand Central base address
gcInterruptMask equ $00024
gcInterruptClear equ $00028
gcInterruptLevels equ $0002C
; Grand Central interrupt flags
;
; Grand Central is a little-endian device. These constants correspond to 680x0 bit positions
; within a 32-bit Grand Central register, adjusted to avoid any need for byte swapping. For
; example, gcifIntMode is the most significant bit of the InterruptMask register, but it
; appears to the 680x0 emulator in bit 7.
gcifDmaSCSI0 equ 24 ; level 4
gcifDmaFloppy equ 25 ; level 4
gcifDmaEthTx equ 26 ; level 4
gcifDmaEthRx equ 27 ; level 4
gcifDmaSccATx equ 28 ; level 4
gcifDmaSccARx equ 29 ; level 4
gcifDmaSccBTx equ 30 ; level 4
gcifDmaSccBRx equ 31 ; level 4
gcifDmaAudOut equ 16 ; level 4
gcifDmaAudIn equ 17 ; level 4
gcifDmaSCSI1 equ 18 ; level 4
gcifDevSCSI0 equ 19 ; level 2
gcifDevSCSI1 equ 20 ; level 2
gcifDevMACE equ 21 ; level 3
gcifDevSccA equ 23 ; level 4
gcifDevSccB equ 8 ; level 4
gcifDevAudio equ 9 ; level 2
gcifDevVia equ 10 ; level 1
gcifDevSwim3 equ 11 ; level 2
gcifExtNMI equ 12 ; level 7
gcifExtPci0 equ 13 ; level 2
gcifExtPci1 equ 14 ; level 2
gcifExtSlot0 equ 15 ; level 2
gcifExtSlot1 equ 0 ; level 2
gcifExtSlot2 equ 1 ; level 2
gcifExtSwatch0 equ 2 ; level 2
gcifExtSwatch1 equ 3 ; level 2
gcifExtJivi equ 4 ; level 2
gcifExtGotham equ 5 ; level 2
gcifExtSpare equ 6 ; level 2
gcifIntMode equ 7 ; valid only in InterruptMask register
gcifMode1Clear equ 7 ; valid only in InterruptClear register
; Grand Central DMA channel register mappings (refer to DB-DMA documentation)
kGCDMAChannelRegisterSpace equ $08000 ; offset from Grand Central base address
; indexes into DB-DMA channel register array
gcChannelSCSI0 equ $0
gcChannelFloppy equ $1
gcChannelEnetTx equ $2
gcChannelEnetRx equ $3
gcChannelSCCATx equ $4
gcChannelSCCARx equ $5
gcChannelSCCBTx equ $6
gcChannelSCCBRx equ $7
gcChannelAudioOut equ $8
gcChannelAudioIn equ $9
gcChannelSCSI1 equ $A
; Grand Central device register mappings (refer to device-specific documentation)
kGCDeviceRegisterSpace equ $10000 ; offset from Grand Central base address
; indexes into DB-DMA device register array
gcDeviceSCSI0 equ $0
gcDeviceMACE equ $1
gcDeviceV0SCC equ $2 ; traditional SCC register mapping
gcDeviceV1SCC equ $3 ; MacRISC SCC register mapping
gcDeviceAudio equ $4
gcDeviceSWIM3 equ $5
gcDeviceVIA equ $6 ; VIA uses the address space of two devices
gcDeviceSCSI1 equ $8
gcDeviceEnetPROM equ $9
gcDeviceGBus1 equ $A
gcDeviceGBus2 equ $B
gcDeviceGBus3 equ $C
gcDeviceGBus4 equ $D
gcDeviceGBus5 equ $E
gcDeviceGBus6 equ $F
; Grand Central interrupt dispatch table (for 680x0 interrupt emulation only)
GCInterruptDispatchTable record 0
gcBaseAddr ds.l 1
reserved ds.l 1
gcVector ds.l 1
gcRefCon ds.l 1
; additional vector/refcon tuples -- 32 pairs in all
org * + 31 * 8
size equ *
endr
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
; Macro: _GCBaseAddr
;
; Function: Returns the base address of the Grand Central I/O controller, which
; is cached in the interrupt dispatch table when the table is created.
;
; Inputs: none
;
; Outputs: A0.L base address of the Grand Central I/O controller
;
; Trashes: none
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
macro
_GCBaseAddr
with ExpandMemRec, GCInterruptDispatchTable
movea.l ([ExpandMem],emDMADispatchGlobals),a0
movea.l gcBaseAddr(a0),a0
endwith
endm
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
; Macro: _GCRegisterHandler
;
; Function: Registers an interrupt handler and a reference constant to be
; passed to the interrupt handler when it is called. This abstraction
; allows the programmer to remain largely ignorant of the internal
; structure of the Grand Central interrupt dispatch mechanism.
;
; Inputs: D0.L interrupt flag specifying interrupt source for handler
; A0.L address of interrupt handler
; A1.L reference constant for interrupt handler
;
; Outputs: none
;
; Trashes: none
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
macro
_GCRegisterHandler
with ExpandMemRec, GCInterruptDispatchTable
move.l a2,-(sp)
movea.l ([ExpandMem],emDMADispatchGlobals),a2
move.l a0,gcVector(a2,d0.l*8)
move.l a1,gcRefCon(a2,d0.l*8)
movea.l (sp)+,a2
endwith
endm
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
; Macro: _GCUnregisterHandler
;
; Function: Removes any previously registered Grand Central interrupt handler
; by replacing it with the spurious interrupt vector and zeroing
; the handlers reference constant.
;
; Inputs: D0.L interrupt flag specifying interrupt source for handler
;
; Outputs: none
;
; Trashes: none
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
macro
_GCUnregisterHandler
with ExpandMemRec, GCInterruptDispatchTable
move.l a2,-(sp)
movea.l ([ExpandMem],emDMADispatchGlobals),a2
move.l BadIntVector,gcVector(a2,d0.l*8)
clr.l gcRefCon(a2,d0.l*8)
movea.l (sp)+,a2
endwith
endm
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
; Macro: _GCEnableInterruptSource <intSource>
;
; Function: Enable the specified interrupt source in the Grand Central
; InterruptMask register.
;
; Inputs: interrupt flag specifying interrupt source for handler
;
; Outputs: none
;
; Trashes: A0
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
macro
_GCEnableInterruptSource &intSource
_GCBaseAddr ; get Grand Central base address in A0
ori.l #(1 << (&intSource)),gcInterruptMask(a0)
nop
endm
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
; Macro: _GCDisableInterruptSource <intSource>
;
; Function: Disable the specified interrupt source in the Grand Central
; InterruptMask register.
;
; Inputs: interrupt flag specifying interrupt source for handler
;
; Outputs: none
;
; Trashes: A0
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
macro
_GCDisableInterruptSource &intSource
_GCBaseAddr ; get Grand Central base address in A0
andi.l #~(1 << (&intSource)),gcInterruptMask(a0)
nop
endm
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
; Macro: _GCClearInterruptSource <intSource>
;
; Function: Clear the specified interrupt source using the Grand Central
; InterruptClear register.
;
; Inputs: interrupt flag specifying interrupt source for handler
;
; Outputs: none
;
; Trashes: A0
;
; Notes: In 68K emulation, this macro is used only to clear DMA interrupts.
; Other interrupts (devices or external) must be cleared at the source.
; ……………………………………………………………………………………………………………………………………………………………………………………………………………………
macro
_GCClearInterruptSource &intSource
_GCBaseAddr ; get Grand Central base address in A0
ori.l #(1 << (&intSource)),gcInterruptClear(a0)
nop
endm
ENDIF ; __INCLUDINGGRANDCENTRALPRIV__