mirror of
https://github.com/elliotnunn/supermario.git
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384 lines
11 KiB
C
384 lines
11 KiB
C
/*
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File: HALc96AMIC.c
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Contains: routines that setup/teardown DMA buffers for AMIC
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Notes:
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Entry points:
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Written by: Paul Wolf
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Copyright: © 1992-1993 by Apple Computer, Inc., all rights reserved.
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Change History (most recent first):
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<SM8> 11/22/93 pdw Rolling in from <MCxx>.
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<SM7> 11/10/93 chp Fix a DebugStr string.
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<SM6> 10/15/93 pdw Fixing "Cold Fusion EVT2/VM" bug by always calling LockMemory on
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our permanent copy buffer.
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<SM5> 10/14/93 pdw Added support for Synchronous data transfers, rewrote State
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Machine, message handling etc.
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<SM4> 9/13/93 pdw Changed the risky slash pattern.
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<SM3> 9/9/93 pdw Lots of little changes. Name changes, temporary cache_bug
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stuff.
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<SM2> 8/13/93 pdw TEMPORARY: Reverted to 200 as MIN_DMA_SIZE and now I always call
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LockMemory - not just when VM is on.
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<1> 7/17/93 pdw first checked in
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*/
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// NOTE: The following five symbols are mutually exclusive
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// - only set one of them to 1 at a time
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#define COPYBACK 0
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#define NONCACHEABLE 1
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#define WRITE_THROUGH 0
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// these two must be tied in with dbl-buffering also (push/flush must happen before DMA)
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#define COPYBACK_PUSH 0
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#define COPYBACK_FLUSH 0
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#include <Types.h>
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#include <Traps.h>
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#include <TrapsPrivate.h>
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#include <Memory.h>
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#include <Errors.h>
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#include <SCSI.h>
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#include <SCSIStandard.h>
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#include "SCSIDebug.h"
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#include "Recorder.h"
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#include "ACAM.h"
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#include "SIMCore.h"
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#include "HALc96.h"
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#include "SIMCorePriv.h"
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#include "SCSIGlue.h"
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#define MAX(a,b) ((a)>=(b)?(a):(b))
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/****** Function Prototypes For Inside only *******/
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/****** Transfer Constants (Check HALc96PSC.a as well!) *******/
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#define MIN_AMIC_DMA_SIZE 0x200 // 20
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/*********************************************************************************
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InitAMIC - Initialize DMA Hardware
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*********************************************************************************/
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// external
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OSErr
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InitHW_AMIC( HALc96Globals *HALg)
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{
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#pragma unused (HALg)
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return (noErr);
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}
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/*********************************************************************************
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InitSW_AMIC - Initialize Software stuff required for DMA support
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*********************************************************************************/
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// external
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OSErr
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InitSW_AMIC( HALc96Globals *HALg)
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{
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long err;
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ulong numBlocks, pageSize, bufferSize;
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void *memStart, *pageStart;
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MemoryBlock lockedBlock;
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LogicalToPhysicalTable l2pTable;
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//*** WARNING: The following code is Page Size Dependent !!! ***
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//*** WARNING: Don't change these unless you change HALc96DMA.a as well
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pageSize = 4*1024;
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//*** WARNING: Don't change this unless you change HALc96DMA.a as well
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bufferSize = 1*pageSize; // must be a multiple of pageSize
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memStart = NewPtrSys( bufferSize+pageSize);
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if (memStart==0)
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return (memFullErr);
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pageStart = (void *)((((long)memStart-1) & ~(pageSize-1)) + pageSize);
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SetPtrSize( memStart, (long)pageStart + MAX(bufferSize,pageSize) - (long)memStart);
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err = LockMemory(pageStart, bufferSize);
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if (err!=noErr)
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return (err);
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lockedBlock.address = pageStart;
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lockedBlock.count = bufferSize;
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l2pTable.logical = lockedBlock;
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numBlocks = 1;
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GetPhysical( &l2pTable, &numBlocks);
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HALg->physicalCopyBuffer = l2pTable.physical[0].address;
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HALg->logicalCopyBuffer = pageStart;
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HALg->minDMAsize = MIN_AMIC_DMA_SIZE;
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return (noErr);
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}
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/*********************************************************************************
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SetupIOAMIC - LockMemory on user buffers as necessary
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*********************************************************************************/
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void
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SetupIOAMIC( SIM_IO *ioPtr)
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{
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int i;
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SGRecord *sgList;
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Ptr firstAddr = nil;
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ulong firstLen = 0;
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ulong cnt = 1;
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Ptr pageStart;
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long err;
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Ptr addr;
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ulong count;
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// Have we already done it ? If so, return
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// (this could happen if we started it then got a reselect and then retried this one again)
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if( ioPtr->SIMprivFlags & (1 << kbSetupComplete) )
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return;
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IfRecordEvent( (long)ioPtr, (long)'suIO');
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// Note that we don't do TIB's because we would have to pre-interpret them nor do we do
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// anything with scsiDataPhysical ranges because they should be taken care of by client
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// (at least they're supposed to). We won't get here with a TIB since old-API transactions
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// are handled by DoSelect not DoInitiate (which is where the call to SetupIO happens).
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if ( ioPtr->scsiFlags & scsiDataPhysical )
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return;
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//…………………………………………………… Scatter/Gather List ……………………………………………………
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if ( ioPtr->scsiDataType == scsiDataSG )
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{
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sgList = (SGRecord *) ioPtr->scsiDataPtr;
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for( i = 0; i < ioPtr->scsiSGListCount; i+=1 )
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{
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/* No sense fooling with small transfers due to lock memory overhead
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The data xfer routine will know that the buffer is not locked down and
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will use the old routine instead of direct DMA. (DMA to known locked buffer
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and then BlockMove)
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*/
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if( (count = sgList[i].SGCount) <= MIN_AMIC_DMA_SIZE )
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continue; /* Don't bother */
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if( (ulong)(addr = (Ptr)(sgList[i].SGAddr)) >= 0x40000000 ) { // Up in ROM or NuBus Land
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ioPtr->SIMprivFlags |= (1 << kbUseDblBuffer);
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break;
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}
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if (VMRunning())
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{ // <SM2> pdw
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if( noErr != LockMemory( addr, count) ) {
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ioPtr->SIMprivFlags |= (1 << kbUseDblBuffer);
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break;
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}
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else {
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ioPtr->SIMprivFlags |= (1 << kbSetupComplete);
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if( !firstAddr ) {
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firstAddr = addr;
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firstLen = count;
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}
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}
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}
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else // VM not running
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{
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#if WRITE_THROUGH
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pageStart = (Ptr)( (ulong)addr & (0xFFFFF000));
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do {
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err = nkMakePageWriteThrough( (Ptr)((long)pageStart>>12));
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if (err<0)
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DebugStr("\p nkMakePageWriteThrough failed");
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pageStart += 0x1000;
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} while ( pageStart < addr+count);
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ioPtr->SIMprivFlags |= (1 << kbSetupComplete);
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#elif NONCACHEABLE
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pageStart = (Ptr)( (ulong)addr & (0xFFFFF000));
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do {
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err = nkMakePageNonCacheable( (Ptr)((long)pageStart>>12));
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if (err<0)
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DebugStr("\p nkMakePageNonCacheable failed");
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pageStart += 0x1000;
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} while ( pageStart < addr+count);
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ioPtr->SIMprivFlags |= (1 << kbSetupComplete);
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#elif COPYBACK_PUSH
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err = nkPushCacheRange(addr, count);
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if (err<0)
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DebugStr("\p nkPushCacheRange failed");
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#elif COPYBACK_FLUSH
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err = nkFlushCacheRange(addr, count);
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if (err<0)
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DebugStr("\p nkFlushCacheRange failed");
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#endif
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firstAddr = addr;
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firstLen = count;
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}
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}
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}
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//…………………………………………………… else Address/Count ……………………………………………………
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else {
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/* Don't bother with small buffers */
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if( (firstLen = ioPtr->scsiDataLength) <= MIN_AMIC_DMA_SIZE )
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return;
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if( (ulong)(firstAddr = ioPtr->scsiDataPtr) >= 0x40000000 ) { // Up in ROM or NuBus Land
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ioPtr->SIMprivFlags |= (1 << kbUseDblBuffer);
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}
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else {
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if (VMRunning()) { // <SM2> pdw
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IfRecordEvent( (long)firstAddr, (long)'LkMm');
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if( err = LockMemory( firstAddr, firstLen) != noErr )
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ioPtr->SIMprivFlags |= (1 << kbUseDblBuffer);
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else {
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ioPtr->SIMprivFlags |= (1 << kbSetupComplete);
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IfRecordEvent( (long)firstLen, (long)err);
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}
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}
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else // VM not running
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{
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#if WRITE_THROUGH
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pageStart = (Ptr)( (ulong)firstAddr & (0xFFFFF000));
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do {
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err = nkMakePageWriteThrough( (Ptr)((long)pageStart>>12));
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if (err<0)
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DebugStr("\p nkMakePageWriteThrough failed");
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pageStart += 0x1000;
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} while ( pageStart < firstAddr+firstLen);
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ioPtr->SIMprivFlags |= (1 << kbSetupComplete);
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#elif NONCACHEABLE
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pageStart = (Ptr)( (ulong)firstAddr & (0xFFFFF000));
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do {
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err = nkMakePageNonCacheable( (Ptr)((long)pageStart>>12));
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if (err<0)
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DebugStr("\p nkMakePageWriteThrough failed");
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pageStart += 0x1000;
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} while ( pageStart < firstAddr+firstLen);
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ioPtr->SIMprivFlags |= (1 << kbSetupComplete);
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#elif COPYBACK_PUSH
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err = nkPushCacheRange(firstAddr, firstLen);
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if (err<0)
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DebugStr("\p nkPushCacheRange failed");
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#elif COPYBACK_FLUSH
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err = nkFlushCacheRange(firstAddr, firstLen);
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if (err<0)
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DebugStr("\p nkFlushCacheRange failed");
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#endif
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}
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}
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}
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//…………………………………………………… Do an initial GetPhysical ……………………………………………………
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if( (ioPtr->SIMprivFlags & (1 << kbUseDblBuffer)) == 0 && firstAddr && firstLen ) {
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ioPtr->logical.address = firstAddr;
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ioPtr->logical.count = firstLen;
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if( GetPhysical( (LogicalToPhysicalTable *)&ioPtr->logical, &cnt) )
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ioPtr->SIMprivFlags |= (1 << kbUseDblBuffer);
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else
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{
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// Check to see if the bug in GetPhysical caught us.
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// If it did we need to setup logical.address and logical.count
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// the way they are supposed to be.
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if( ioPtr->logical.address == firstAddr ) {
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(char *)ioPtr->logical.address += ioPtr->physical.count;
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ioPtr->logical.count -= ioPtr->physical.count;
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}
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ioPtr->transLogEnd = firstAddr + ioPtr->physical.count;
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}
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}
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}
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/*********************************************************************************
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TeardownIOAMIC - UnlockMemory user buffers as necessary
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*********************************************************************************/
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void
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TeardownIOAMIC( SIM_IO * ioPtr, HALc96Globals * HALg)
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{
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#pragma unused(HALg)
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Ptr pageStart;
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int i;
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SGRecord * sgList;
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Ptr addr;
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ulong count;
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long err;
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// We don't need to check whether we should be here or not because the flag
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// kbSetupComplete (in ioPtr->SIMprivFlags) will be set only if LockMemory or other
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// undo-required things were done in SetupIO, and that flag is checked
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// before this routine is called (optimization).
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/* Scatter/Gather List */
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if ( ioPtr->scsiDataType == scsiDataSG )
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{
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sgList = (SGRecord *) ioPtr->scsiDataPtr;
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for( i = 0; i < ioPtr->scsiSGListCount; i+=1 )
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{
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/* Don't bother with small buffers */
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if( (count = sgList[i].SGCount) <= MIN_AMIC_DMA_SIZE )
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continue;
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if( (ulong)(addr = (Ptr)(sgList[i].SGAddr)) >= 0x40000000 ) // Up in ROM or NuBus Land
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break;
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IfRecordEvent( (long)addr, (long)'UnLk');
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err = UnlockMemory( addr, count); // Can't do anything about errors
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IfRecordEvent( (long)count, (long)err);
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}
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}
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/* Address/Count */
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else
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{
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if (VMRunning())
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{
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IfRecordEvent( (long)ioPtr->scsiDataPtr, (long)'UnLk');
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err = UnlockMemory(ioPtr->scsiDataPtr, ioPtr->scsiDataLength);
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IfRecordEvent( (long)ioPtr->scsiDataLength, (long)err);
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}
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else
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{ // VM not running
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#if WRITE_THROUGH | NONCACHEABLE
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pageStart = (Ptr)( (ulong)(addr=ioPtr->scsiDataPtr) & (0xFFFFF000));
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do {
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IfRecordEvent( (long)pageStart, (long)'MPgC');
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err = nkMakePageCacheable( (Ptr)((long)pageStart>>12));
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if (err<0)
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DebugStr("\p nkMakePageCacheable failed");
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pageStart += 0x1000;
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} while ( pageStart < addr+ioPtr->scsiDataLength);
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#else
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IfRecordEvent( (long)ioPtr->scsiDataPtr, (long)'UnL2');
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err = UnlockMemory( ioPtr->scsiDataPtr, ioPtr->scsiDataLength);
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IfRecordEvent( (long)ioPtr->scsiDataLength, (long)err);
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#endif
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}
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}
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} |