add FUNDING.yml with ko-fi

.github/FUNDING.yml

@@ -0,0 +1 @@
+ko_fi: tashtari

README.md

@@ -32,6 +32,47 @@ Also, "single-chip" doesn't include the separate and necessary driver/receiver c
 Building the firmware requires Microchip MPASM, which is included with their development environment, MPLAB.  Note that you **must** use MPLAB X version 5.35 or earlier or MPLAB 8 as later versions of MPLAB X have removed MPASM.
 
 
+## PCBs and Products
+
+### End User Hardware
+
+* [AirTalk](https://68kmla.org/bb/index.php?threads/introducing-and-interest-check-airtalk-wireless-plug-and-play-localtalk-dongles.39661/) by [cheesestraws](https://68kmla.org/bb/index.php?members/cheesestraws.19339/)
+  * Plug-and-play WiFi-LocalTalk dongle
+  * [Buy](https://airtalk.shop/product/airtalk-complete/) from [airtalk.shop](https://airtalk.shop/)
+
+### Serial Adapters
+
+* TashTalkHat by [bdurbrow](https://68kmla.org/bb/index.php?members/bdurbrow.6275/)
+  * Raspberry Pi hat using v1.x firmware
+  * Pending release
+  * [Forum post](https://68kmla.org/bb/index.php?threads/tashtalk-single-chip-localtalk-interface.38955/page-4#post-422138)
+* TashTalk 2 Hat by [Tashtari](https://github.com/lampmerchant)
+  * Raspberry Pi hat using v2.x firmware
+  * [Files](https://github.com/lampmerchant/tashtalk/tree/main/tashtalk2-rpihat)
+  * See latest release in this repository for gerbers
+  * Buy [fully assembled](https://ko-fi.com/s/4d01fa5b8a) or as kit with [regular](https://ko-fi.com/s/60b561a0e3) or [stackable](https://ko-fi.com/s/64219426b8) header from [Tashtari](https://ko-fi.com/tashtari)
+* USB2LT by [twelvetone12](https://68kmla.org/bb/index.php?members/twelvetone12.23810/)
+  * USB serial adapter using v2.x firmware
+  * Pending release
+  * [Forum thread](https://68kmla.org/bb/index.php?threads/usb2lt-tashtalk-usb-to-localtalk.45282/)
+ 
+### Software
+
+* tashtalkd by [Tashtari](https://github.com/lampmerchant)
+  * Simple LocalTalk (via TashTalk) to LToUDP bridge
+  * [Files](https://github.com/lampmerchant/tashtalk/tree/main/tashtalkd)
+* MultiTalk by [sfiera](https://github.com/sfiera/)
+  * Bridge between EtherTalk and LocalTalk (via LToUDP and TashTalk)
+  * [Project page](https://github.com/sfiera/multitalk/)
+* TashRouter by [Tashtari](https://github.com/lampmerchant)
+  * Full-fledged AppleTalk router supporting EtherTalk and LocalTalk (via LToUDP and TashTalk)
+  * [Project page](https://github.com/lampmerchant/tashrouter/)
+
+### Yours?
+
+File a PR or an issue to add to these lists!
+
+
 ## Version Comparison
 
 **AirTalk users: do not upgrade your TashTalk PIC to v2.x, it will stop working because of the change in pinout.**
@@ -55,13 +96,3 @@ This change was made in order to enable applications where it is desirable to di
 the RS-422 driver - pulling RA3/!MCLR low will hold the PIC in reset, tristating its outputs.  Using RS-422 interface ICs such as
 the SN65HVD series, RA5 can be connected to both the receiver output and the driver input while RA4/Driver Enable is connected to
 both the (active low) receiver enable and the (active high) driver enable.
-
-
-## Projects Using It
-
-* [TashTalkHat](https://68kmla.org/bb/index.php?threads/tashtalk-single-chip-localtalk-interface.38955/page-4#post-422138)
-  by bdurbrow - hat for Raspberry Pi
-* [AirTalk](https://68kmla.org/bb/index.php?threads/introducing-and-interest-check-airtalk-wireless-plug-and-play-localtalk-dongles.39661/)
-  by cheesestraws - wireless plug-and-play LocalTalk dongle
-* [TashTalk 2 Hat](https://github.com/lampmerchant/tashtalk/tree/main/tashtalk2-rpihat) - hat for Raspberry Pi using v2.x firmware
-* Yours? =)

firmware/one-chip.asm

@@ -160,6 +160,13 @@ CHKCRC	equ	6	;Set if receiver should check CRC and signal bad CRCs
 	
 	endc
 
+	;Linear Memory:
+	;0x2000-0x207F - UART receiver queue
+	;0x2080-0x209F - Node ID bitmap
+	;0x20A0-0x20AE - Bank 2 registers
+	;0x20AF-0x20EA - Unused
+	;0x20EB-0x20EF - Upper end of bank 2 registers
+
 
 ;;; Vectors ;;;
 
@@ -203,20 +210,24 @@ Init
 	movlw	B'11110000'
 	movwf	OSCCON
 	
+	banksel	OSCSTAT		;Spin until PLL is ready and instruction clock
+	btfss	OSCSTAT,PLLR	; gears up to 8 MHz
+	bra	$-1
+	
 	banksel	IOCAN		;RA5 sets IOCAN[IOCAF5] on pos/neg edge
 	movlw	B'00100000'
 	movwf	IOCAN
 	movwf	IOCAP
 	
-	banksel	RCSTA		;UART async mode, 1 MHz
-	movlw	B'01001000'
+	banksel	RCSTA		;UART async mode, 1 MHz, but receiver not
+	movlw	B'01001000'	; enabled just yet
 	movwf	BAUDCON
 	clrf	SPBRGH
 	movlw	7
 	movwf	SPBRGL
 	movlw	B'00100110'
 	movwf	TXSTA
-	movlw	B'10010000'
+	movlw	B'10000000'
 	movwf	RCSTA
 	
 	banksel	OPTION_REG	;Timer0 uses instruction clock
@@ -242,12 +253,26 @@ Init
 	movlw	B'00101010'
 	movwf	TRISA
 	
-	clrf	UR_LEN		;Set up UART receiver queue (0x2000-0x207F),
-	movlw	0x20		; for which FSRs are push (FSR0) and pop (FSR1)
-	movwf	FSR0H		; pointers
+	movlw	0x20		;Set FSRs to point permanently to linear memory
+	movwf	FSR0H
 	movwf	FSR1H
-	clrf	FSR0L
-	clrf	FSR1L
+	
+	movlw	0x80		;Zero out node ID bitmap (0x2080-0x209F) so we
+	movwf	FSR1L		; don't respond to random IDs before the host
+	movlw	0		; gets a chance to initialize us
+ZeroNID	movwi	FSR1++
+	btfss	FSR1L,5
+	bra	ZeroNID
+	
+	clrf	UR_LEN		;Set up UART receiver queue (0x2000-0x207F),
+	clrf	FSR0L		; for which FSRs are push (FSR0) and pop (FSR1)
+	clrf	FSR1L		; pointers
+	
+	clrf	FEATURES	;All optional features off to start
+	clrf	LR_CCRC1	;Receiver CRC registers cleared to ones to
+	decf	LR_CCRC1,F	; start, we don't have time to do this when we
+	clrf	LR_CCRC2	; jump into the code
+	decf	LR_CCRC2,F
 	
 	banksel	PIE1		;UART Rx and IOC interrupts on, interrupt
 	movlw	B'00100000'	; subsystem on
@@ -255,11 +280,8 @@ Init
 	movlw	B'11001000'
 	movwf	INTCON
 	
-	clrf	FEATURES	;All optional features off to start
-	clrf	LR_CCRC1	;Receiver CRC registers cleared to ones to
-	decf	LR_CCRC1,F	; start, we don't have time to do this when we
-	clrf	LR_CCRC2	; jump into the code
-	decf	LR_CCRC2,F
+	banksel	RCSTA		;Enable receiver now that interrupt is on
+	bsf	RCSTA,CREN
 	
 	bra	PrepForNextFrame
 
@@ -465,8 +487,8 @@ PrepForNextFrame
 	lslf	DEF_HIST,F	; logs to make space for what happens this time
 	movf	GBACKOFF,W	;Copy the global backoff mask into the local
 	movwf	LBACKOFF	; backoff mask
-	movlw	33		;Set attempts counter to 32 (plus one since we
-	movwf	ATTEMPTS	; immediately decrement it)
+	movlw	32		;Set attempts counter to 32
+	movwf	ATTEMPTS	; "
 	bra	AwaitCommand	;We're set for the next frame, wait for it
 
 ;entered with BSR = 2
@@ -1831,10 +1853,12 @@ InFErr
 OutLostClock
 EmpLostClock
 FinishUp
-	movlb	0		;Deactivate Timer2 and clear its interrupt flag
-	bcf	T2CON,TMR2ON	; so anything that was waiting for it knows
-	bcf	PIR1,TMR2IF	; that a receive event happened while waiting
-	clrf	LR_CCRC1	;Clear receiver CRC registers to ones since we
+	movlb	0		;If the frame regs changed, deactivate Timer2
+	btfss	FLAGS,LR_FRM	; and clear its interrupt flag so anything that
+	bra	Finish2		; was waiting for it knows that a frame was
+	bcf	T2CON,TMR2ON	; received while waiting
+	bcf	PIR1,TMR2IF	; "
+Finish2	clrf	LR_CCRC1	;Clear receiver CRC registers to ones since we
 	decf	LR_CCRC1,F	; don't have time to do this when we jump into
 	clrf	LR_CCRC2	; the receiver
 	decf	LR_CCRC2,F	; "