mirror of
https://github.com/classilla/tenfourfox.git
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224 lines
7.1 KiB
ArmAsm
224 lines
7.1 KiB
ArmAsm
# 1 "recon_altivec.asm"
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# 1 "<built-in>"
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# 1 "<command line>"
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# 1 "recon_altivec.asm"
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;
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; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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.globl _recon4b_ppc
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.globl _recon2b_ppc
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.globl _recon_b_ppc
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.text
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.align 2
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;# r3 = short *diff_ptr,
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;# r4 = unsigned char *pred_ptr,
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;# r5 = unsigned char *dst_ptr,
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;# r6 = int stride
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_recon4b_ppc:
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mfspr r0, 256 ;# get old VRSAVE
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stw r0, -8(r1) ;# save old VRSAVE to stack
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oris r0, r0, 0xf000
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mtspr 256,r0 ;# set VRSAVE
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vxor v0, v0, v0
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li r8, 16
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lvx v1, 0, r4 ;# v1 = pred = p0..p15
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addi r4, r4, 16 ;# next pred
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vmrghb v2, v0, v1 ;# v2 = 16-bit p0..p7
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lvx v3, 0, r3 ;# v3 = d0..d7
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vaddshs v2, v2, v3 ;# v2 = r0..r7
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vmrglb v1, v0, v1 ;# v1 = 16-bit p8..p15
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lvx v3, r8, r3 ;# v3 = d8..d15
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addi r3, r3, 32 ;# next diff
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vaddshs v3, v3, v1 ;# v3 = r8..r15
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vpkshus v2, v2, v3 ;# v2 = 8-bit r0..r15
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stvx v2, 0, r5 ;# to dst
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add r5, r5, r6 ;# next dst
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lvx v1, 0, r4 ;# v1 = pred = p0..p15
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addi r4, r4, 16 ;# next pred
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vmrghb v2, v0, v1 ;# v2 = 16-bit p0..p7
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lvx v3, 0, r3 ;# v3 = d0..d7
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vaddshs v2, v2, v3 ;# v2 = r0..r7
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vmrglb v1, v0, v1 ;# v1 = 16-bit p8..p15
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lvx v3, r8, r3 ;# v3 = d8..d15
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addi r3, r3, 32 ;# next diff
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vaddshs v3, v3, v1 ;# v3 = r8..r15
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vpkshus v2, v2, v3 ;# v2 = 8-bit r0..r15
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stvx v2, 0, r5 ;# to dst
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add r5, r5, r6 ;# next dst
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lvx v1, 0, r4 ;# v1 = pred = p0..p15
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addi r4, r4, 16 ;# next pred
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vmrghb v2, v0, v1 ;# v2 = 16-bit p0..p7
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lvx v3, 0, r3 ;# v3 = d0..d7
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vaddshs v2, v2, v3 ;# v2 = r0..r7
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vmrglb v1, v0, v1 ;# v1 = 16-bit p8..p15
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lvx v3, r8, r3 ;# v3 = d8..d15
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addi r3, r3, 32 ;# next diff
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vaddshs v3, v3, v1 ;# v3 = r8..r15
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vpkshus v2, v2, v3 ;# v2 = 8-bit r0..r15
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stvx v2, 0, r5 ;# to dst
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add r5, r5, r6 ;# next dst
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lvx v1, 0, r4 ;# v1 = pred = p0..p15
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addi r4, r4, 16 ;# next pred
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vmrghb v2, v0, v1 ;# v2 = 16-bit p0..p7
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lvx v3, 0, r3 ;# v3 = d0..d7
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vaddshs v2, v2, v3 ;# v2 = r0..r7
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vmrglb v1, v0, v1 ;# v1 = 16-bit p8..p15
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lvx v3, r8, r3 ;# v3 = d8..d15
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addi r3, r3, 32 ;# next diff
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vaddshs v3, v3, v1 ;# v3 = r8..r15
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vpkshus v2, v2, v3 ;# v2 = 8-bit r0..r15
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stvx v2, 0, r5 ;# to dst
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add r5, r5, r6 ;# next dst
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lwz r12, -8(r1) ;# restore old VRSAVE from stack
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mtspr 256, r12 ;# reset old VRSAVE
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blr
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.align 2
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;# r3 = short *diff_ptr,
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;# r4 = unsigned char *pred_ptr,
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;# r5 = unsigned char *dst_ptr,
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;# r6 = int stride
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_recon2b_ppc:
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mfspr r0, 256 ;# get old VRSAVE
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stw r0, -8(r1) ;# save old VRSAVE to stack
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oris r0, r0, 0xf000
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mtspr 256,r0 ;# set VRSAVE
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vxor v0, v0, v0
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li r8, 16
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la r10, -48(r1) ;# buf
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lvx v1, 0, r4 ;# v1 = pred = p0..p15
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vmrghb v2, v0, v1 ;# v2 = 16-bit p0..p7
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lvx v3, 0, r3 ;# v3 = d0..d7
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vaddshs v2, v2, v3 ;# v2 = r0..r7
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vmrglb v1, v0, v1 ;# v1 = 16-bit p8..p15
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lvx v3, r8, r3 ;# v2 = d8..d15
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vaddshs v3, v3, v1 ;# v3 = r8..r15
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vpkshus v2, v2, v3 ;# v3 = 8-bit r0..r15
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stvx v2, 0, r10 ;# 2 rows to dst from buf
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lwz r0, 0(r10)
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stw r0, 0(r5)
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lwz r0, 4(r10)
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stw r0, 4(r5)
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lwz r0, 8(r10)
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stwux r0, r5, r6 ;# advance dst to next row
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lwz r0, 12(r10)
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stw r0, 4(r5)
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addi r4, r4, 16; ;# next pred
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addi r3, r3, 32; ;# next diff
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lvx v1, 0, r4 ;# v1 = pred = p0..p15
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vmrghb v2, v0, v1 ;# v2 = 16-bit p0..p7
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lvx v3, 0, r3 ;# v3 = d0..d7
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vaddshs v2, v2, v3 ;# v2 = r0..r7
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vmrglb v1, v0, v1 ;# v1 = 16-bit p8..p15
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lvx v3, r8, r3 ;# v2 = d8..d15
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vaddshs v3, v3, v1 ;# v3 = r8..r15
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vpkshus v2, v2, v3 ;# v3 = 8-bit r0..r15
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stvx v2, 0, r10 ;# 2 rows to dst from buf
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lwz r0, 0(r10)
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stwux r0, r5, r6
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lwz r0, 4(r10)
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stw r0, 4(r5)
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lwz r0, 8(r10)
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stwux r0, r5, r6 ;# advance dst to next row
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lwz r0, 12(r10)
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stw r0, 4(r5)
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lwz r12, -8(r1) ;# restore old VRSAVE from stack
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mtspr 256, r12 ;# reset old VRSAVE
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blr
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.align 2
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;# r3 = short *diff_ptr,
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;# r4 = unsigned char *pred_ptr,
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;# r5 = unsigned char *dst_ptr,
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;# r6 = int stride
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_recon_b_ppc:
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mfspr r0, 256 ;# get old VRSAVE
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stw r0, -8(r1) ;# save old VRSAVE to stack
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oris r0, r0, 0xf000
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mtspr 256,r0 ;# set VRSAVE
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vxor v0, v0, v0
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la r10, -48(r1) ;# buf
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lwz r0, 0(r4)
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stw r0, 0(r10)
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lwz r0, 16(r4)
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stw r0, 4(r10)
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lwz r0, 32(r4)
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stw r0, 8(r10)
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lwz r0, 48(r4)
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stw r0, 12(r10)
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lvx v1, 0, r10; ;# v1 = pred = p0..p15
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lwz r0, 0(r3) ;# v3 = d0..d7
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stw r0, 0(r10)
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lwz r0, 4(r3)
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stw r0, 4(r10)
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lwzu r0, 32(r3)
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stw r0, 8(r10)
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lwz r0, 4(r3)
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stw r0, 12(r10)
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lvx v3, 0, r10
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vmrghb v2, v0, v1; ;# v2 = 16-bit p0..p7
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vaddshs v2, v2, v3; ;# v2 = r0..r7
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lwzu r0, 32(r3) ;# v3 = d8..d15
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stw r0, 0(r10)
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lwz r0, 4(r3)
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stw r0, 4(r10)
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lwzu r0, 32(r3)
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stw r0, 8(r10)
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lwz r0, 4(r3)
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stw r0, 12(r10)
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lvx v3, 0, r10
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vmrglb v1, v0, v1; ;# v1 = 16-bit p8..p15
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vaddshs v3, v3, v1; ;# v3 = r8..r15
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vpkshus v2, v2, v3; ;# v2 = 8-bit r0..r15
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stvx v2, 0, r10; ;# 16 pels to dst from buf
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lwz r0, 0(r10)
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stw r0, 0(r5)
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lwz r0, 4(r10)
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stwux r0, r5, r6
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lwz r0, 8(r10)
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stwux r0, r5, r6
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lwz r0, 12(r10)
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stwx r0, r5, r6
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lwz r12, -8(r1) ;# restore old VRSAVE from stack
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mtspr 256, r12 ;# reset old VRSAVE
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blr
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.text
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