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268 lines
7.8 KiB
C
268 lines
7.8 KiB
C
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// mips.h -- ELF definitions specific to EM_MIPS -*- C++ -*-
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// Copyright 2012 Free Software Foundation, Inc.
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// Written by Aleksandar Simeonov <aleksandar.simeonov@rt-rk.com>.
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// This file is part of elfcpp.
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// This program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Library General Public License
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// as published by the Free Software Foundation; either version 2, or
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// (at your option) any later version.
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// In addition to the permissions in the GNU Library General Public
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// License, the Free Software Foundation gives you unlimited
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// permission to link the compiled version of this file into
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// combinations with other programs, and to distribute those
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// combinations without any restriction coming from the use of this
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// file. (The Library Public License restrictions do apply in other
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// respects; for example, they cover modification of the file, and
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/// distribution when not linked into a combined executable.)
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// This program is distributed in the hope that it will be useful, but
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// WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Library General Public License for more details.
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// You should have received a copy of the GNU Library General Public
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// License along with this program; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
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// 02110-1301, USA.
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#ifndef ELFCPP_MIPS_H
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#define ELFCPP_MIPS_H
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// Documentation for the MIPS relocs is taken from
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// http://math-atlas.sourceforge.net/devel/assembly/mipsabi32.pdf
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namespace elfcpp
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{
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//
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// MIPS Relocation Codes
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//
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enum
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{
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R_MIPS_NONE = 0,
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R_MIPS_16 = 1,
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R_MIPS_32 = 2,
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R_MIPS_REL32 = 3,
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R_MIPS_26 = 4,
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R_MIPS_HI16 = 5,
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R_MIPS_LO16 = 6,
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R_MIPS_GPREL16 = 7,
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R_MIPS_LITERAL = 8,
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R_MIPS_GOT16 = 9,
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R_MIPS_PC16 = 10,
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R_MIPS_CALL16 = 11,
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R_MIPS_GPREL32 = 12,
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R_MIPS_UNUSED1 = 13,
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R_MIPS_UNUSED2 = 14,
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R_MIPS_UNUSED3 = 15,
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R_MIPS_SHIFT5 = 16,
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R_MIPS_SHIFT6 = 17,
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R_MIPS_64 = 18,
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R_MIPS_GOT_DISP = 19,
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R_MIPS_GOT_PAGE = 20,
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R_MIPS_GOT_OFST = 21,
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R_MIPS_GOT_HI16 = 22,
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R_MIPS_GOT_LO16 = 23,
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R_MIPS_SUB = 24,
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R_MIPS_INSERT_A = 25, // Empty relocation
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R_MIPS_INSERT_B = 26, // Empty relocation
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R_MIPS_DELETE = 27, // Empty relocation
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R_MIPS_HIGHER = 28,
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R_MIPS_HIGHEST = 29,
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R_MIPS_CALL_HI16 = 30,
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R_MIPS_CALL_LO16 = 31,
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R_MIPS_SCN_DISP = 32,
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R_MIPS_REL16 = 33, // Empty relocation
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R_MIPS_ADD_IMMEDIATE = 34, // Empty relocation
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R_MIPS_PJUMP = 35, // Empty relocation
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R_MIPS_RELGOT = 36, // Empty relocation
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R_MIPS_JALR = 37,
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R_MIPS_TLS_DTPMOD32 = 38,
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R_MIPS_TLS_DTPREL32 = 39,
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R_MIPS_TLS_DTPMOD64 = 40, // Empty relocation
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R_MIPS_TLS_DTPREL64 = 41, // Empty relocation
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R_MIPS_TLS_GD = 42,
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R_MIPS_TLS_LDM = 43,
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R_MIPS_TLS_DTPREL_HI16 = 44,
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R_MIPS_TLS_DTPREL_LO16 = 45,
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R_MIPS_TLS_GOTTPREL = 46,
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R_MIPS_TLS_TPREL32 = 47,
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R_MIPS_TLS_TPREL64 = 48, // Empty relocation
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R_MIPS_TLS_TPREL_HI16 = 49,
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R_MIPS_TLS_TPREL_LO16 = 50,
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R_MIPS_GLOB_DAT = 51,
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R_MIPS16_26 = 100,
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R_MIPS16_GPREL = 101,
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R_MIPS16_GOT16 = 102,
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R_MIPS16_CALL16 = 103,
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R_MIPS16_HI16 = 104,
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R_MIPS16_LO16 = 105,
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R_MIPS_COPY = 126,
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R_MIPS_JUMP_SLOT = 127,
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R_MIPS_PC32 = 248,
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R_MIPS_GNU_REL16_S2 = 250,
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R_MIPS_GNU_VTINHERIT = 253,
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R_MIPS_GNU_VTENTRY = 254
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};
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// Processor specific flags for the ELF header e_flags field. */
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enum
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{
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// At least one .noreorder directive appears in the source.
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EF_MIPS_NOREORDER = 0x00000001,
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// File contains position independent code.
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EF_MIPS_PIC = 0x00000002,
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// Code in file uses the standard calling sequence for calling
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// position independent code.
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EF_MIPS_CPIC = 0x00000004,
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// ??? Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.
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EF_MIPS_XGOT = 0x00000008,
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// Code in file uses UCODE (obsolete)
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EF_MIPS_UCODE = 0x00000010,
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// Code in file uses new ABI (-n32 on Irix 6).
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EF_MIPS_ABI2 = 0x00000020,
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// Process the .MIPS.options section first by ld
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EF_MIPS_OPTIONS_FIRST = 0x00000080,
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// Architectural Extensions used by this file
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EF_MIPS_ARCH_ASE = 0x0f000000,
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// Use MDMX multimedia extensions
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EF_MIPS_ARCH_ASE_MDMX = 0x08000000,
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// Use MIPS-16 ISA extensions
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EF_MIPS_ARCH_ASE_M16 = 0x04000000,
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// Use MICROMIPS ISA extensions.
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EF_MIPS_ARCH_ASE_MICROMIPS = 0x02000000,
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// Indicates code compiled for a 64-bit machine in 32-bit mode.
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// (regs are 32-bits wide.)
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EF_MIPS_32BITMODE = 0x00000100,
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// MIPS dynamic
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EF_MIPS_DYNAMIC = 0x40
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};
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// Machine variant if we know it. This field was invented at Cygnus,
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// but it is hoped that other vendors will adopt it. If some standard
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// is developed, this code should be changed to follow it.
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enum
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{
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EF_MIPS_MACH = 0x00FF0000,
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// Cygnus is choosing values between 80 and 9F;
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// 00 - 7F should be left for a future standard;
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// the rest are open.
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E_MIPS_MACH_3900 = 0x00810000,
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E_MIPS_MACH_4010 = 0x00820000,
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E_MIPS_MACH_4100 = 0x00830000,
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E_MIPS_MACH_4650 = 0x00850000,
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E_MIPS_MACH_4120 = 0x00870000,
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E_MIPS_MACH_4111 = 0x00880000,
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E_MIPS_MACH_SB1 = 0x008a0000,
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E_MIPS_MACH_OCTEON = 0x008b0000,
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E_MIPS_MACH_XLR = 0x008c0000,
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E_MIPS_MACH_OCTEON2 = 0x008d0000,
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E_MIPS_MACH_5400 = 0x00910000,
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E_MIPS_MACH_5500 = 0x00980000,
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E_MIPS_MACH_9000 = 0x00990000,
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E_MIPS_MACH_LS2E = 0x00A00000,
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E_MIPS_MACH_LS2F = 0x00A10000,
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E_MIPS_MACH_LS3A = 0x00A20000,
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};
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// MIPS architecture
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enum
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{
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// Four bit MIPS architecture field.
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EF_MIPS_ARCH = 0xf0000000,
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// -mips1 code.
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E_MIPS_ARCH_1 = 0x00000000,
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// -mips2 code.
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E_MIPS_ARCH_2 = 0x10000000,
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// -mips3 code.
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E_MIPS_ARCH_3 = 0x20000000,
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// -mips4 code.
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E_MIPS_ARCH_4 = 0x30000000,
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// -mips5 code.
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E_MIPS_ARCH_5 = 0x40000000,
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// -mips32 code.
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E_MIPS_ARCH_32 = 0x50000000,
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// -mips64 code.
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E_MIPS_ARCH_64 = 0x60000000,
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// -mips32r2 code.
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E_MIPS_ARCH_32R2 = 0x70000000,
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// -mips64r2 code.
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E_MIPS_ARCH_64R2 = 0x80000000,
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};
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enum
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{
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// Mask to extract ABI version, not really a flag value.
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EF_MIPS_ABI = 0x0000F000,
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// The original o32 abi.
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E_MIPS_ABI_O32 = 0x00001000,
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// O32 extended to work on 64 bit architectures
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E_MIPS_ABI_O64 = 0x00002000,
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// EABI in 32 bit mode
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E_MIPS_ABI_EABI32 = 0x00003000,
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// EABI in 64 bit mode
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E_MIPS_ABI_EABI64 = 0x00004000,
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};
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// Dynamic section MIPS flags
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enum
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{
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// None
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RHF_NONE = 0x00000000,
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// Use shortcut pointers
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RHF_QUICKSTART = 0x00000001,
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// Hash size not power of two
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RHF_NOTPOT = 0x00000002,
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// Ignore LD_LIBRARY_PATH
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RHF_NO_LIBRARY_REPLACEMENT = 0x00000004
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};
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// Special values for the st_other field in the symbol table.
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enum
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{
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// Two topmost bits denote the MIPS ISA for .text symbols:
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// + 00 -- standard MIPS code,
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// + 10 -- microMIPS code,
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// + 11 -- MIPS16 code; requires the following two bits to be set too.
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// Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.
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STO_MIPS_ISA = 0xc0,
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// The MIPS psABI was updated in 2008 with support for PLTs and copy
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// relocs. There are therefore two types of nonzero SHN_UNDEF functions:
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// PLT entries and traditional MIPS lazy binding stubs. We mark the former
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// with STO_MIPS_PLT to distinguish them from the latter.
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STO_MIPS_PLT = 0x8,
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// This value is used to mark PIC functions in an object that mixes
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// PIC and non-PIC. Note that this bit overlaps with STO_MIPS16,
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// although MIPS16 symbols are never considered to be MIPS_PIC.
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STO_MIPS_PIC = 0x20,
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// This value is used for a mips16 .text symbol.
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STO_MIPS16 = 0xf0,
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// This value is used for a microMIPS .text symbol. To distinguish from
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// STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The
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// mask is STO_MIPS_ISA.
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STO_MICROMIPS = 0x80
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};
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// Values for base offsets for thread-local storage
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enum
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{
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TP_OFFSET = 0x7000,
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DTP_OFFSET = 0x8000
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};
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} // End namespace elfcpp.
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#endif // !defined(ELFCPP_MIPS_H)
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