2014-09-21 17:33:12 +00:00
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/* This file contains code to do profiling.
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2012-03-27 23:13:14 +00:00
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2014-09-21 17:33:12 +00:00
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Copyright (C) 2007-2014 Free Software Foundation, Inc.
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Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
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on behalf of Synopsys Inc.
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2012-03-27 23:13:14 +00:00
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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2014-09-21 17:33:12 +00:00
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#include "../asm.h"
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#include "auxreg.h"
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/* This file contains code to do profiling. */
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.weak __profile_timer_cycles
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.global __profile_timer_cycles
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.set __profile_timer_cycles, 200
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.text
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; For Arctangent-A5, if no data cache is present, a read of the
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; cache build register returns the ID register. For ARC600 and
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; later, the version field will be zero.
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.global __dcache_linesz
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.balign 4
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__dcache_linesz:
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lr r12,[D_CACHE_BUILD]
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extb_s r0,r12
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breq_s r0,0,.Lsz_nocache
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brge r0,0x20,.Lsz_havecache
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lr r0,[IDENTITY]
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breq r12,r0,.Lsz_nocache
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.Lsz_havecache:
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lsr_s r12,r12,16
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mov_s r0,16
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bmsk_s r12,r12,3
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asl_s r0,r0,r12
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j_s [blink]
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.Lsz_nocache:
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mov_s r0,1
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j_s [blink]
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