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https://github.com/autc04/Retro68.git
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840 lines
21 KiB
C
840 lines
21 KiB
C
/* Disassembler code for CR16.
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Copyright 2007, 2008, 2009, 2012, 2013 Free Software Foundation, Inc.
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Contributed by M R Swami Reddy (MR.Swami.Reddy@nsc.com).
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This file is part of GAS, GDB and the GNU binutils.
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This program is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation,
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Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "dis-asm.h"
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#include "opcode/cr16.h"
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#include "libiberty.h"
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/* String to print when opcode was not matched. */
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#define ILLEGAL "illegal"
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/* Escape to 16-bit immediate. */
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#define ESCAPE_16_BIT 0xB
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/* Extract 'n_bits' from 'a' starting from offset 'offs'. */
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#define EXTRACT(a, offs, n_bits) \
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(n_bits == 32 ? (((a) >> (offs)) & 0xffffffffL) \
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: (((a) >> (offs)) & ((1 << (n_bits)) -1)))
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/* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */
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#define SBM(offs) ((((1 << (32 - offs)) -1) << (offs)))
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typedef struct
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{
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dwordU val;
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int nbits;
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} parameter;
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/* Structure to map valid 'cinv' instruction options. */
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typedef struct
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{
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/* Cinv printed string. */
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char *istr;
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/* Value corresponding to the string. */
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char *ostr;
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}
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cinv_entry;
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/* CR16 'cinv' options mapping. */
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const cinv_entry cr16_cinvs[] =
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{
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{"cinv[i]", "cinv [i]"},
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{"cinv[i,u]", "cinv [i,u]"},
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{"cinv[d]", "cinv [d]"},
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{"cinv[d,u]", "cinv [d,u]"},
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{"cinv[d,i]", "cinv [d,i]"},
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{"cinv[d,i,u]", "cinv [d,i,u]"}
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};
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/* Number of valid 'cinv' instruction options. */
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static int NUMCINVS = ARRAY_SIZE (cr16_cinvs);
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/* Enum to distinguish different registers argument types. */
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typedef enum REG_ARG_TYPE
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{
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/* General purpose register (r<N>). */
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REG_ARG = 0,
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/*Processor register */
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P_ARG,
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}
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REG_ARG_TYPE;
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/* Current opcode table entry we're disassembling. */
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const inst *instruction;
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/* Current instruction we're disassembling. */
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ins cr16_currInsn;
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/* The current instruction is read into 3 consecutive words. */
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wordU cr16_words[3];
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/* Contains all words in appropriate order. */
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ULONGLONG cr16_allWords;
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/* Holds the current processed argument number. */
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int processing_argument_number;
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/* Nonzero means a IMM4 instruction. */
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int imm4flag;
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/* Nonzero means the instruction's original size is
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incremented (escape sequence is used). */
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int size_changed;
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/* Print the constant expression length. */
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static char *
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print_exp_len (int size)
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{
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switch (size)
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{
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case 4:
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case 5:
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case 6:
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case 8:
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case 14:
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case 16:
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return ":s";
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case 20:
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case 24:
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case 32:
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return ":m";
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case 48:
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return ":l";
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default:
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return "";
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}
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}
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/* Retrieve the number of operands for the current assembled instruction. */
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static int
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get_number_of_operands (void)
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{
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int i;
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for (i = 0; instruction->operands[i].op_type && i < MAX_OPERANDS; i++)
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;
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return i;
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}
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/* Return the bit size for a given operand. */
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static int
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getbits (operand_type op)
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{
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if (op < MAX_OPRD)
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return cr16_optab[op].bit_size;
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return 0;
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}
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/* Return the argument type of a given operand. */
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static argtype
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getargtype (operand_type op)
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{
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if (op < MAX_OPRD)
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return cr16_optab[op].arg_type;
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return nullargs;
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}
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/* Given a 'CC' instruction constant operand, return its corresponding
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string. This routine is used when disassembling the 'CC' instruction. */
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static char *
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getccstring (unsigned cc_insn)
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{
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return (char *) cr16_b_cond_tab[cc_insn];
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}
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/* Given a 'cinv' instruction constant operand, return its corresponding
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string. This routine is used when disassembling the 'cinv' instruction. */
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static char *
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getcinvstring (const char *str)
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{
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const cinv_entry *cinv;
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for (cinv = cr16_cinvs; cinv < (cr16_cinvs + NUMCINVS); cinv++)
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if (strcmp (cinv->istr, str) == 0)
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return cinv->ostr;
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return ILLEGAL;
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}
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/* Given the trap index in dispatch table, return its name.
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This routine is used when disassembling the 'excp' instruction. */
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static char *
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gettrapstring (unsigned int trap_index)
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{
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const trap_entry *trap;
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for (trap = cr16_traps; trap < cr16_traps + NUMTRAPS; trap++)
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if (trap->entry == trap_index)
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return trap->name;
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return ILLEGAL;
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}
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/* Given a register enum value, retrieve its name. */
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static char *
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getregname (reg r)
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{
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const reg_entry * regentry = cr16_regtab + r;
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if (regentry->type != CR16_R_REGTYPE)
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return ILLEGAL;
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return regentry->name;
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}
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/* Given a register pair enum value, retrieve its name. */
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static char *
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getregpname (reg r)
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{
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const reg_entry * regentry = cr16_regptab + r;
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if (regentry->type != CR16_RP_REGTYPE)
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return ILLEGAL;
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return regentry->name;
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}
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/* Given a index register pair enum value, retrieve its name. */
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static char *
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getidxregpname (reg r)
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{
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const reg_entry * regentry;
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switch (r)
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{
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case 0: r = 0; break;
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case 1: r = 2; break;
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case 2: r = 4; break;
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case 3: r = 6; break;
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case 4: r = 8; break;
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case 5: r = 10; break;
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case 6: r = 3; break;
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case 7: r = 5; break;
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default:
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break;
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}
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regentry = cr16_regptab + r;
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if (regentry->type != CR16_RP_REGTYPE)
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return ILLEGAL;
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return regentry->name;
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}
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/* Getting a processor register name. */
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static char *
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getprocregname (int reg_index)
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{
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const reg_entry *r;
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for (r = cr16_pregtab; r < cr16_pregtab + NUMPREGS; r++)
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if (r->image == reg_index)
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return r->name;
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return "ILLEGAL REGISTER";
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}
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/* Getting a processor register name - 32 bit size. */
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static char *
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getprocpregname (int reg_index)
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{
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const reg_entry *r;
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for (r = cr16_pregptab; r < cr16_pregptab + NUMPREGPS; r++)
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if (r->image == reg_index)
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return r->name;
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return "ILLEGAL REGISTER";
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}
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/* START and END are relating 'cr16_allWords' struct, which is 48 bits size.
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START|--------|END
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+---------+---------+---------+---------+
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| | V | A | L |
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+---------+---------+---------+---------+
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0 16 32 48
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words [0] [1] [2] */
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static parameter
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makelongparameter (ULONGLONG val, int start, int end)
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{
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parameter p;
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p.val = (dwordU) EXTRACT (val, 48 - end, end - start);
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p.nbits = end - start;
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return p;
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}
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/* Build a mask of the instruction's 'constant' opcode,
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based on the instruction's printing flags. */
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static unsigned long
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build_mask (void)
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{
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unsigned long mask = SBM (instruction->match_bits);
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/* Adjust mask for bcond with 32-bit size instruction. */
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if ((IS_INSN_MNEMONIC("b") && instruction->size == 2))
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mask = 0xff0f0000;
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return mask;
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}
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/* Search for a matching opcode. Return 1 for success, 0 for failure. */
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int
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cr16_match_opcode (void)
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{
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unsigned long mask;
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/* The instruction 'constant' opcode doesn't exceed 32 bits. */
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unsigned long doubleWord = (cr16_words[1]
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+ (cr16_words[0] << 16)) & 0xffffffff;
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/* Start searching from end of instruction table. */
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instruction = &cr16_instruction[NUMOPCODES - 2];
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/* Loop over instruction table until a full match is found. */
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while (instruction >= cr16_instruction)
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{
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mask = build_mask ();
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/* Adjust mask for bcond with 32-bit size instruction */
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if ((IS_INSN_MNEMONIC("b") && instruction->size == 2))
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mask = 0xff0f0000;
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if ((doubleWord & mask) == BIN (instruction->match,
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instruction->match_bits))
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return 1;
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else
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instruction--;
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}
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return 0;
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}
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/* Set the proper parameter value for different type of arguments. */
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static void
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make_argument (argument * a, int start_bits)
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{
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int inst_bit_size;
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parameter p;
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if ((instruction->size == 3) && a->size >= 16)
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inst_bit_size = 48;
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else
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inst_bit_size = 32;
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switch (a->type)
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{
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case arg_r:
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->r = p.val;
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break;
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case arg_rp:
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->rp = p.val;
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break;
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case arg_pr:
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->pr = p.val;
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break;
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case arg_prp:
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->prp = p.val;
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break;
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case arg_ic:
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->constant = p.val;
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break;
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case arg_cc:
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->cc = p.val;
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break;
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case arg_idxr:
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if ((IS_INSN_MNEMONIC ("cbitb"))
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|| (IS_INSN_MNEMONIC ("sbitb"))
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|| (IS_INSN_MNEMONIC ("tbitb")))
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p = makelongparameter (cr16_allWords, 8, 9);
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else
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p = makelongparameter (cr16_allWords, 9, 10);
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a->i_r = p.val;
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p = makelongparameter (cr16_allWords,
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inst_bit_size - a->size, inst_bit_size);
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a->constant = p.val;
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break;
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case arg_idxrp:
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p = makelongparameter (cr16_allWords, start_bits + 12, start_bits + 13);
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a->i_r = p.val;
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p = makelongparameter (cr16_allWords, start_bits + 13, start_bits + 16);
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a->rp = p.val;
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if (inst_bit_size > 32)
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{
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p = makelongparameter (cr16_allWords, inst_bit_size - start_bits - 12,
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inst_bit_size);
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a->constant = ((p.val & 0xffff) | (p.val >> 8 & 0xf0000));
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}
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else if (instruction->size == 2)
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{
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p = makelongparameter (cr16_allWords, inst_bit_size - 22,
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inst_bit_size);
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a->constant = (p.val & 0xf) | (((p.val >>20) & 0x3) << 4)
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| ((p.val >>14 & 0x3) << 6) | (((p.val >>7) & 0x1f) <<7);
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}
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else if (instruction->size == 1 && a->size == 0)
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a->constant = 0;
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break;
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case arg_rbase:
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p = makelongparameter (cr16_allWords, inst_bit_size, inst_bit_size);
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a->constant = p.val;
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p = makelongparameter (cr16_allWords, inst_bit_size - (start_bits + 4),
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inst_bit_size - start_bits);
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a->r = p.val;
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break;
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case arg_cr:
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p = makelongparameter (cr16_allWords, start_bits + 12, start_bits + 16);
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a->r = p.val;
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p = makelongparameter (cr16_allWords, inst_bit_size - 16, inst_bit_size);
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a->constant = p.val;
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break;
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case arg_crp:
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if (instruction->size == 1)
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p = makelongparameter (cr16_allWords, 12, 16);
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else
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p = makelongparameter (cr16_allWords, start_bits + 12, start_bits + 16);
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a->rp = p.val;
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if (inst_bit_size > 32)
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{
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p = makelongparameter (cr16_allWords, inst_bit_size - start_bits - 12,
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inst_bit_size);
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a->constant = ((p.val & 0xffff) | (p.val >> 8 & 0xf0000));
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}
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else if (instruction->size == 2)
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{
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p = makelongparameter (cr16_allWords, inst_bit_size - 16,
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inst_bit_size);
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a->constant = p.val;
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}
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else if (instruction->size == 1 && a->size != 0)
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{
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p = makelongparameter (cr16_allWords, 4, 8);
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if (IS_INSN_MNEMONIC ("loadw")
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|| IS_INSN_MNEMONIC ("loadd")
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|| IS_INSN_MNEMONIC ("storw")
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|| IS_INSN_MNEMONIC ("stord"))
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a->constant = (p.val * 2);
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else
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a->constant = p.val;
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}
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else /* below case for 0x0(reg pair) */
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a->constant = 0;
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break;
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case arg_c:
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if ((IS_INSN_TYPE (BRANCH_INS))
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|| (IS_INSN_MNEMONIC ("bal"))
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|| (IS_INSN_TYPE (CSTBIT_INS))
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|| (IS_INSN_TYPE (LD_STOR_INS)))
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{
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switch (a->size)
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{
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case 8 :
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p = makelongparameter (cr16_allWords, 0, start_bits);
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a->constant = ((((p.val&0xf00)>>4)) | (p.val&0xf));
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break;
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case 24:
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if (instruction->size == 3)
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{
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p = makelongparameter (cr16_allWords, 16, inst_bit_size);
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a->constant = ((((p.val>>16)&0xf) << 20)
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| (((p.val>>24)&0xf) << 16)
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| (p.val & 0xffff));
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}
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else if (instruction->size == 2)
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{
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p = makelongparameter (cr16_allWords, 8, inst_bit_size);
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a->constant = p.val;
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}
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break;
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default:
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->constant = p.val;
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break;
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}
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}
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else
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{
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p = makelongparameter (cr16_allWords,
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inst_bit_size - (start_bits + a->size),
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inst_bit_size - start_bits);
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a->constant = p.val;
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}
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break;
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default:
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break;
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}
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}
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/* Print a single argument. */
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static void
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print_arg (argument *a, bfd_vma memaddr, struct disassemble_info *info)
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{
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LONGLONG longdisp, mask;
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int sign_flag = 0;
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int relative = 0;
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bfd_vma number;
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PTR stream = info->stream;
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fprintf_ftype func = info->fprintf_func;
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switch (a->type)
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{
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case arg_r:
|
|
func (stream, "%s", getregname (a->r));
|
|
break;
|
|
|
|
case arg_rp:
|
|
func (stream, "%s", getregpname (a->rp));
|
|
break;
|
|
|
|
case arg_pr:
|
|
func (stream, "%s", getprocregname (a->pr));
|
|
break;
|
|
|
|
case arg_prp:
|
|
func (stream, "%s", getprocpregname (a->prp));
|
|
break;
|
|
|
|
case arg_cc:
|
|
func (stream, "%s", getccstring (a->cc));
|
|
func (stream, "%s", "\t");
|
|
break;
|
|
|
|
case arg_ic:
|
|
if (IS_INSN_MNEMONIC ("excp"))
|
|
{
|
|
func (stream, "%s", gettrapstring (a->constant));
|
|
break;
|
|
}
|
|
else if ((IS_INSN_TYPE (ARITH_INS) || IS_INSN_TYPE (ARITH_BYTE_INS))
|
|
&& ((instruction->size == 1) && (a->constant == 9)))
|
|
func (stream, "$%d", -1);
|
|
else if (INST_HAS_REG_LIST)
|
|
func (stream, "$0x%lx", a->constant +1);
|
|
else if (IS_INSN_TYPE (SHIFT_INS))
|
|
{
|
|
longdisp = a->constant;
|
|
mask = ((LONGLONG)1 << a->size) - 1;
|
|
if (longdisp & ((LONGLONG)1 << (a->size -1)))
|
|
{
|
|
sign_flag = 1;
|
|
longdisp = ~(longdisp) + 1;
|
|
}
|
|
a->constant = (unsigned long int) (longdisp & mask);
|
|
func (stream, "$%d", ((int)(sign_flag ? -a->constant :
|
|
a->constant)));
|
|
}
|
|
else
|
|
func (stream, "$0x%lx", a->constant);
|
|
switch (a->size)
|
|
{
|
|
case 4 : case 5 : case 6 : case 8 :
|
|
func (stream, "%s", ":s"); break;
|
|
case 16 : case 20 : func (stream, "%s", ":m"); break;
|
|
case 24 : case 32 : func (stream, "%s", ":l"); break;
|
|
default: break;
|
|
}
|
|
break;
|
|
|
|
case arg_idxr:
|
|
if (a->i_r == 0) func (stream, "[r12]");
|
|
if (a->i_r == 1) func (stream, "[r13]");
|
|
func (stream, "0x%lx", a->constant);
|
|
func (stream, "%s", print_exp_len (instruction->size * 16));
|
|
break;
|
|
|
|
case arg_idxrp:
|
|
if (a->i_r == 0) func (stream, "[r12]");
|
|
if (a->i_r == 1) func (stream, "[r13]");
|
|
func (stream, "0x%lx", a->constant);
|
|
func (stream, "%s", print_exp_len (instruction->size * 16));
|
|
func (stream, "%s", getidxregpname (a->rp));
|
|
break;
|
|
|
|
case arg_rbase:
|
|
func (stream, "(%s)", getregname (a->r));
|
|
break;
|
|
|
|
case arg_cr:
|
|
func (stream, "0x%lx", a->constant);
|
|
func (stream, "%s", print_exp_len (instruction->size * 16));
|
|
func (stream, "(%s)", getregname (a->r));
|
|
break;
|
|
|
|
case arg_crp:
|
|
func (stream, "0x%lx", a->constant);
|
|
func (stream, "%s", print_exp_len (instruction->size * 16));
|
|
func (stream, "%s", getregpname (a->rp));
|
|
break;
|
|
|
|
case arg_c:
|
|
/*Removed the *2 part as because implicit zeros are no more required.
|
|
Have to fix this as this needs a bit of extension in terms of branch
|
|
instructions. */
|
|
if (IS_INSN_TYPE (BRANCH_INS) || IS_INSN_MNEMONIC ("bal"))
|
|
{
|
|
relative = 1;
|
|
longdisp = a->constant;
|
|
/* REVISIT: To sync with WinIDEA and CR16 4.1tools, the below
|
|
line commented */
|
|
/* longdisp <<= 1; */
|
|
mask = ((LONGLONG)1 << a->size) - 1;
|
|
switch (a->size)
|
|
{
|
|
case 8 :
|
|
{
|
|
longdisp <<= 1;
|
|
if (longdisp & ((LONGLONG)1 << a->size))
|
|
{
|
|
sign_flag = 1;
|
|
longdisp = ~(longdisp) + 1;
|
|
}
|
|
break;
|
|
}
|
|
case 16 :
|
|
case 24 :
|
|
{
|
|
if (longdisp & 1)
|
|
{
|
|
sign_flag = 1;
|
|
longdisp = ~(longdisp) + 1;
|
|
}
|
|
break;
|
|
}
|
|
default:
|
|
func (stream, "Wrong offset used in branch/bal instruction");
|
|
break;
|
|
}
|
|
a->constant = (unsigned long int) (longdisp & mask);
|
|
}
|
|
/* For branch Neq instruction it is 2*offset + 2. */
|
|
else if (IS_INSN_TYPE (BRANCH_NEQ_INS))
|
|
a->constant = 2 * a->constant + 2;
|
|
|
|
if ((!IS_INSN_TYPE (CSTBIT_INS)) && (!IS_INSN_TYPE (LD_STOR_INS)))
|
|
(sign_flag) ? func (stream, "%s", "*-"): func (stream, "%s","*+");
|
|
|
|
/* PR 10173: Avoid printing the 0x prefix twice. */
|
|
if (info->symtab_size > 0)
|
|
func (stream, "%s", "0x");
|
|
number = ((relative ? memaddr : 0) +
|
|
(sign_flag ? ((- a->constant) & 0xffffffe) : a->constant));
|
|
|
|
(*info->print_address_func) ((number & ((1 << 24) - 1)), info);
|
|
|
|
func (stream, "%s", print_exp_len (instruction->size * 16));
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Print all the arguments of CURRINSN instruction. */
|
|
|
|
static void
|
|
print_arguments (ins *currentInsn, bfd_vma memaddr, struct disassemble_info *info)
|
|
{
|
|
int i;
|
|
|
|
/* For "pop/push/popret RA instruction only. */
|
|
if ((IS_INSN_MNEMONIC ("pop")
|
|
|| (IS_INSN_MNEMONIC ("popret")
|
|
|| (IS_INSN_MNEMONIC ("push"))))
|
|
&& currentInsn->nargs == 1)
|
|
{
|
|
info->fprintf_func (info->stream, "RA");
|
|
return;
|
|
}
|
|
|
|
for (i = 0; i < currentInsn->nargs; i++)
|
|
{
|
|
processing_argument_number = i;
|
|
|
|
/* For "bal (ra), disp17" instruction only. */
|
|
if ((IS_INSN_MNEMONIC ("bal")) && (i == 0) && instruction->size == 2)
|
|
{
|
|
info->fprintf_func (info->stream, "(ra),");
|
|
continue;
|
|
}
|
|
|
|
if ((INST_HAS_REG_LIST) && (i == 2))
|
|
info->fprintf_func (info->stream, "RA");
|
|
else
|
|
print_arg (¤tInsn->arg[i], memaddr, info);
|
|
|
|
if ((i != currentInsn->nargs - 1) && (!IS_INSN_MNEMONIC ("b")))
|
|
info->fprintf_func (info->stream, ",");
|
|
}
|
|
}
|
|
|
|
/* Build the instruction's arguments. */
|
|
|
|
void
|
|
cr16_make_instruction (void)
|
|
{
|
|
int i;
|
|
unsigned int shift;
|
|
|
|
for (i = 0; i < cr16_currInsn.nargs; i++)
|
|
{
|
|
argument a;
|
|
|
|
memset (&a, 0, sizeof (a));
|
|
a.type = getargtype (instruction->operands[i].op_type);
|
|
a.size = getbits (instruction->operands[i].op_type);
|
|
shift = instruction->operands[i].shift;
|
|
|
|
make_argument (&a, shift);
|
|
cr16_currInsn.arg[i] = a;
|
|
}
|
|
|
|
/* Calculate instruction size (in bytes). */
|
|
cr16_currInsn.size = instruction->size + (size_changed ? 1 : 0);
|
|
/* Now in bits. */
|
|
cr16_currInsn.size *= 2;
|
|
}
|
|
|
|
/* Retrieve a single word from a given memory address. */
|
|
|
|
static wordU
|
|
get_word_at_PC (bfd_vma memaddr, struct disassemble_info *info)
|
|
{
|
|
bfd_byte buffer[4];
|
|
int status;
|
|
wordU insn = 0;
|
|
|
|
status = info->read_memory_func (memaddr, buffer, 2, info);
|
|
|
|
if (status == 0)
|
|
insn = (wordU) bfd_getl16 (buffer);
|
|
|
|
return insn;
|
|
}
|
|
|
|
/* Retrieve multiple words (3) from a given memory address. */
|
|
|
|
static void
|
|
get_words_at_PC (bfd_vma memaddr, struct disassemble_info *info)
|
|
{
|
|
int i;
|
|
bfd_vma mem;
|
|
|
|
for (i = 0, mem = memaddr; i < 3; i++, mem += 2)
|
|
cr16_words[i] = get_word_at_PC (mem, info);
|
|
|
|
cr16_allWords = ((ULONGLONG) cr16_words[0] << 32)
|
|
+ ((unsigned long) cr16_words[1] << 16) + cr16_words[2];
|
|
}
|
|
|
|
/* Prints the instruction by calling print_arguments after proper matching. */
|
|
|
|
int
|
|
print_insn_cr16 (bfd_vma memaddr, struct disassemble_info *info)
|
|
{
|
|
int is_decoded; /* Nonzero means instruction has a match. */
|
|
|
|
/* Initialize global variables. */
|
|
imm4flag = 0;
|
|
size_changed = 0;
|
|
|
|
/* Retrieve the encoding from current memory location. */
|
|
get_words_at_PC (memaddr, info);
|
|
/* Find a matching opcode in table. */
|
|
is_decoded = cr16_match_opcode ();
|
|
/* If found, print the instruction's mnemonic and arguments. */
|
|
if (is_decoded > 0 && (cr16_words[0] << 16 || cr16_words[1]) != 0)
|
|
{
|
|
if (strneq (instruction->mnemonic, "cinv", 4))
|
|
info->fprintf_func (info->stream,"%s", getcinvstring (instruction->mnemonic));
|
|
else
|
|
info->fprintf_func (info->stream, "%s", instruction->mnemonic);
|
|
|
|
if (((cr16_currInsn.nargs = get_number_of_operands ()) != 0)
|
|
&& ! (IS_INSN_MNEMONIC ("b")))
|
|
info->fprintf_func (info->stream, "\t");
|
|
cr16_make_instruction ();
|
|
/* For push/pop/pushrtn with RA instructions. */
|
|
if ((INST_HAS_REG_LIST) && ((cr16_words[0] >> 7) & 0x1))
|
|
cr16_currInsn.nargs +=1;
|
|
print_arguments (&cr16_currInsn, memaddr, info);
|
|
return cr16_currInsn.size;
|
|
}
|
|
|
|
/* No match found. */
|
|
info->fprintf_func (info->stream,"%s ",ILLEGAL);
|
|
return 2;
|
|
}
|