mirror of
https://github.com/autc04/Retro68.git
synced 2024-11-19 03:05:15 +00:00
164 lines
5.0 KiB
Scala
164 lines
5.0 KiB
Scala
# Copyright (C) 2014-2017 Free Software Foundation, Inc.
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#
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# Copying and distribution of this file, with or without modification,
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# are permitted in any medium without royalty provided the copyright
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# notice and this notice are preserved.
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# In microcomputer (MC) mode, the vectors are mapped into the on-chip ROM,
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# otherwise in microprocessor (MP) mode the vectors are mapped to address 0
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# on the external bus. In MC mode, the on-chip ROM contains a bootloader program
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# that loads the internal RAM from the serial port or external ROM.
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#
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# Common configurations:
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# 1. MC mode, no external memory (serial boot).
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# 2. MC mode, external RAM (serial boot).
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# 3. MC mode, external ROM.
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# 4. MC mode, external ROM, external RAM.
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# 5. MP mode, external ROM.
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# 6. MP mode, external ROM, external RAM.
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# 7. MP mode, external RAM (dual-port with hosting CPU or external debugger).
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#
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# Config TEXT DATA/BSS
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# 1. INT_RAM INT_RAM (mcmode,onchip)
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# 2. EXT_RAM EXT_RAM (mcmode,extram)
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# 3. INT_RAM INT_RAM (mcmode,onchip)
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# 4. EXT_RAM EXT_RAM (mcmode,extram)
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# 5. EXT_ROM INT_RAM (mpmode,onchip,extrom)
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# 6. EXT_ROM EXT_RAM (mpmode,extram,extrom)
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# 7. EXT_RAM EXT_RAM (mpmode,extram)
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#
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# In MC mode, TEXT and DATA are copied into RAM by the bootloader.
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#
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# In MP mode with external ROM, DATA needs to be copied into RAM at boot time.
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#
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# If there is external RAM it is better to use that and reserve the internal RAM
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# for data buffers. However, the address of the external RAM needs to be specified.
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#
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# This emulation assumes config 7.
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case $OUTPUT_ARCH in
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tic3x) OUTPUT_ARCHNAME="TMS320C3x" ;;
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tic4x) OUTPUT_ARCHNAME="TMS320C4x" ;;
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esac
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case $ONCHIP in
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yes) RAM=RAM;
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STACK_SIZE_DEFAULT=128;
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HEAP_SIZE_DEFAULT=0;
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;;
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*) RAM=EXT0;
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STACK_SIZE_DEFAULT=0x1000;
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HEAP_SIZE_DEFAULT=0x4000;
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;;
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esac
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TEXT_MEMORY=$RAM;
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DATA_MEMORY=$RAM;
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MEMORY_DEF="
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/* C30 memory space. */
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MEMORY
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{
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EXT0 : org = 0x0000000, len = 0x800000 /* External address bus. */
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XBUS : org = 0x0800000, len = 0x002000 /* Expansion bus. */
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IOBUS : org = 0x0804000, len = 0x002000 /* I/O BUS. */
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RAM0 : org = 0x0809800, len = 0x000400 /* Internal RAM block 0. */
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RAM1 : org = 0x0809a00, len = 0x000400 /* Internal RAM block 1. */
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RAM : org = 0x0809800, len = 0x000800 /* Internal RAM. */
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EXT1 : org = 0x080a000, len = 0x7f6000 /* External address bus. */
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}
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"
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test -z "$ENTRY" && ENTRY=_start
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cat <<EOF
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${RELOCATING+/* Linker script for $OUTPUT_ARCHNAME executable. */}
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${RELOCATING-/* Linker script for $OUTPUT_ARCHNAME object file (ld -r). */}
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/* Copyright (C) 2014-2017 Free Software Foundation, Inc.
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Copying and distribution of this script, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. */
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OUTPUT_FORMAT("${OUTPUT_FORMAT}")
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OUTPUT_ARCH("${OUTPUT_ARCH}")
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${LIB_SEARCH_DIRS}
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${RELOCATING+ENTRY (${ENTRY})}
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${RELOCATING+ __HEAP_SIZE = DEFINED(__HEAP_SIZE) ? __HEAP_SIZE : ${HEAP_SIZE_DEFAULT};}
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${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : ${STACK_SIZE_DEFAULT};}
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${RELOCATING+${MEMORY_DEF}}
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/* In the small memory model the .data and .bss sections must be contiguous
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when loaded and fit within the same page. The DP register is loaded
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with the page address. */
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SECTIONS
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{
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/* Reset, interrupt, and trap vectors. */
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.vectors ${RELOCATING+ 0} : {
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*(.vectors)
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} ${RELOCATING+ > ${TEXT_MEMORY}}
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/* Constants. */
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.const : {
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*(.const)
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} ${RELOCATING+ > ${TEXT_MEMORY}}
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/* Program code. */
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.text : {
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${RELOCATING+ __text = .;}
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${RELOCATING+ *(.init)}
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*(.text)
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${CONSTRUCTING+ ___CTOR_LIST__ = .;}
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${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)}
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${CONSTRUCTING+ *(.ctors)}
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${CONSTRUCTING+ LONG(0);}
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${CONSTRUCTING+ ___CTOR_END__ = .;}
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${CONSTRUCTING+ ___DTOR_LIST__ = .;}
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${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)}
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${CONSTRUCTING+ *(.dtors)}
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${CONSTRUCTING+ LONG(0)}
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${CONSTRUCTING+ ___DTOR_END__ = .;}
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${RELOCATING+ *(.fini)}
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${RELOCATING+ __etext = .;}
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} ${RELOCATING+ > ${TEXT_MEMORY}}
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/* Global initialised variables. */
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.data :
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{
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${RELOCATING+ __data = .;}
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*(.data)
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${RELOCATING+ __edata = .;}
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} ${RELOCATING+ > ${DATA_MEMORY}}
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/* Global uninitialised variables. */
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.bss : {
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${RELOCATING+ __bss = .;}
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*(.bss)
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*(COMMON)
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${RELOCATING+ __end = .;}
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} ${RELOCATING+ > ${DATA_MEMORY}}
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/* Heap. */
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.heap :
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{
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${RELOCATING+ __heap = .;}
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${RELOCATING+ . += __HEAP_SIZE};
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} ${RELOCATING+ > ${DATA_MEMORY}}
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/* Stack (grows upward). */
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.stack :
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{
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${RELOCATING+ __stack = .;}
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*(.stack)
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${RELOCATING+ . = . + __STACK_SIZE};
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} ${RELOCATING+ > ${DATA_MEMORY}}
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.stab 0 ${RELOCATING+(NOLOAD)} :
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{
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[ .stab ]
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}
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.stabstr 0 ${RELOCATING+(NOLOAD)} :
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{
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[ .stabstr ]
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}
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}
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EOF
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