mirror of
https://github.com/autc04/Retro68.git
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1037 lines
27 KiB
C
1037 lines
27 KiB
C
/* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64
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Copyright (C) 2009-2018 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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static struct
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{
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operatorT op_modifier; /* Operand modifier. */
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int is_mem; /* 1 if operand is memory reference. */
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int is_indirect; /* 1 if operand is indirect reference. */
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int has_offset; /* 1 if operand has offset. */
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unsigned int in_offset; /* >=1 if processing operand of offset. */
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unsigned int in_bracket; /* >=1 if processing operand in brackets. */
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unsigned int in_scale; /* >=1 if processing multiplication operand
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* in brackets. */
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i386_operand_type reloc_types; /* Value obtained from lex_got(). */
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const reg_entry *base; /* Base register (if any). */
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const reg_entry *index; /* Index register (if any). */
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offsetT scale_factor; /* Accumulated scale factor. */
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symbolS *seg;
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}
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intel_state;
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/* offset X_add_symbol */
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#define O_offset O_md32
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/* offset X_add_symbol */
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#define O_short O_md31
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/* near ptr X_add_symbol */
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#define O_near_ptr O_md30
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/* far ptr X_add_symbol */
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#define O_far_ptr O_md29
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/* byte ptr X_add_symbol */
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#define O_byte_ptr O_md28
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/* word ptr X_add_symbol */
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#define O_word_ptr O_md27
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/* dword ptr X_add_symbol */
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#define O_dword_ptr O_md26
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/* qword ptr X_add_symbol */
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#define O_qword_ptr O_md25
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/* oword ptr X_add_symbol */
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#define O_oword_ptr O_md24
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/* fword ptr X_add_symbol */
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#define O_fword_ptr O_md23
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/* tbyte ptr X_add_symbol */
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#define O_tbyte_ptr O_md22
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/* xmmword ptr X_add_symbol */
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#define O_xmmword_ptr O_md21
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/* ymmword ptr X_add_symbol */
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#define O_ymmword_ptr O_md20
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/* zmmword ptr X_add_symbol */
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#define O_zmmword_ptr O_md19
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static struct
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{
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const char *name;
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operatorT op;
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unsigned int operands;
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}
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const i386_operators[] =
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{
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{ "and", O_bit_and, 2 },
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{ "eq", O_eq, 2 },
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{ "ge", O_ge, 2 },
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{ "gt", O_gt, 2 },
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{ "le", O_le, 2 },
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{ "lt", O_lt, 2 },
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{ "mod", O_modulus, 2 },
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{ "ne", O_ne, 2 },
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{ "not", O_bit_not, 1 },
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{ "offset", O_offset, 1 },
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{ "or", O_bit_inclusive_or, 2 },
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{ "shl", O_left_shift, 2 },
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{ "short", O_short, 1 },
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{ "shr", O_right_shift, 2 },
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{ "xor", O_bit_exclusive_or, 2 },
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{ NULL, O_illegal, 0 }
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};
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static struct
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{
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const char *name;
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operatorT op;
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unsigned short sz[3];
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}
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const i386_types[] =
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{
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#define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } }
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I386_TYPE(byte, 1),
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I386_TYPE(word, 2),
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I386_TYPE(dword, 4),
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I386_TYPE(fword, 6),
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I386_TYPE(qword, 8),
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I386_TYPE(tbyte, 10),
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I386_TYPE(oword, 16),
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I386_TYPE(xmmword, 16),
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I386_TYPE(ymmword, 32),
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I386_TYPE(zmmword, 64),
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#undef I386_TYPE
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{ "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } },
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{ "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } },
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{ NULL, O_illegal, { 0, 0, 0 } }
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};
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operatorT i386_operator (const char *name, unsigned int operands, char *pc)
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{
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unsigned int j;
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if (!intel_syntax)
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return O_absent;
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if (!name)
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{
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if (operands != 2)
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return O_illegal;
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switch (*input_line_pointer)
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{
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case ':':
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++input_line_pointer;
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return O_full_ptr;
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case '[':
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++input_line_pointer;
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return O_index;
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case '@':
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if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC)
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{
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int adjust = 0;
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char *gotfree_input_line = lex_got (&i.reloc[this_operand],
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&adjust,
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&intel_state.reloc_types);
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if (!gotfree_input_line)
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break;
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free (gotfree_input_line);
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*input_line_pointer++ = '+';
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memset (input_line_pointer, '0', adjust - 1);
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input_line_pointer[adjust - 1] = ' ';
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return O_add;
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}
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break;
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}
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return O_illegal;
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}
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for (j = 0; i386_operators[j].name; ++j)
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if (strcasecmp (i386_operators[j].name, name) == 0)
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{
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if (i386_operators[j].operands
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&& i386_operators[j].operands != operands)
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return O_illegal;
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return i386_operators[j].op;
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}
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for (j = 0; i386_types[j].name; ++j)
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if (strcasecmp (i386_types[j].name, name) == 0)
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break;
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if (i386_types[j].name && *pc == ' ')
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{
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char *pname;
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char c;
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++input_line_pointer;
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c = get_symbol_name (&pname);
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if (strcasecmp (pname, "ptr") == 0)
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{
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/* FIXME: What if c == '"' ? */
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pname[-1] = *pc;
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*pc = c;
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if (intel_syntax > 0 || operands != 1)
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return O_illegal;
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return i386_types[j].op;
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}
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(void) restore_line_pointer (c);
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input_line_pointer = pname - 1;
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}
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return O_absent;
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}
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static int i386_intel_parse_name (const char *name, expressionS *e)
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{
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unsigned int j;
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if (! strcmp (name, "$"))
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{
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current_location (e);
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return 1;
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}
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for (j = 0; i386_types[j].name; ++j)
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if (strcasecmp(i386_types[j].name, name) == 0)
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{
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e->X_op = O_constant;
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e->X_add_number = i386_types[j].sz[flag_code];
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e->X_add_symbol = NULL;
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e->X_op_symbol = NULL;
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return 1;
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}
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return 0;
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}
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static INLINE int i386_intel_check (const reg_entry *rreg,
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const reg_entry *base,
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const reg_entry *iindex)
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{
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if ((this_operand >= 0
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&& rreg != i.op[this_operand].regs)
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|| base != intel_state.base
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|| iindex != intel_state.index)
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{
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as_bad (_("invalid use of register"));
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return 0;
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}
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return 1;
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}
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static INLINE void i386_intel_fold (expressionS *e, symbolS *sym)
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{
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expressionS *exp = symbol_get_value_expression (sym);
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if (S_GET_SEGMENT (sym) == absolute_section)
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{
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offsetT val = e->X_add_number;
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*e = *exp;
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e->X_add_number += val;
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}
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else
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{
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if (exp->X_op == O_symbol
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&& strcmp (S_GET_NAME (exp->X_add_symbol),
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GLOBAL_OFFSET_TABLE_NAME) == 0)
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sym = exp->X_add_symbol;
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e->X_add_symbol = sym;
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e->X_op_symbol = NULL;
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e->X_op = O_symbol;
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}
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}
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static int
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i386_intel_simplify_register (expressionS *e)
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{
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int reg_num;
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if (this_operand < 0 || intel_state.in_offset)
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{
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as_bad (_("invalid use of register"));
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return 0;
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}
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if (e->X_op == O_register)
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reg_num = e->X_add_number;
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else
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reg_num = e->X_md - 1;
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if (!intel_state.in_bracket)
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{
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if (i.op[this_operand].regs)
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{
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as_bad (_("invalid use of register"));
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return 0;
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}
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if (i386_regtab[reg_num].reg_type.bitfield.sreg3
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&& i386_regtab[reg_num].reg_num == RegFlat)
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{
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as_bad (_("invalid use of pseudo-register"));
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return 0;
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}
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i.op[this_operand].regs = i386_regtab + reg_num;
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}
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else if (!intel_state.index
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&& (i386_regtab[reg_num].reg_type.bitfield.xmmword
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|| i386_regtab[reg_num].reg_type.bitfield.ymmword
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|| i386_regtab[reg_num].reg_type.bitfield.zmmword
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|| i386_regtab[reg_num].reg_num == RegRiz
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|| i386_regtab[reg_num].reg_num == RegEiz))
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intel_state.index = i386_regtab + reg_num;
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else if (!intel_state.base && !intel_state.in_scale)
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intel_state.base = i386_regtab + reg_num;
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else if (!intel_state.index)
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{
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if (intel_state.in_scale
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|| current_templates->start->base_opcode == 0xf30f1b /* bndmk */
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|| (current_templates->start->base_opcode & ~1) == 0x0f1a /* bnd{ld,st}x */
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|| i386_regtab[reg_num].reg_type.bitfield.baseindex)
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intel_state.index = i386_regtab + reg_num;
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else
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{
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/* Convert base to index and make ESP/RSP the base. */
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intel_state.index = intel_state.base;
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intel_state.base = i386_regtab + reg_num;
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}
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}
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else
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{
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/* esp is invalid as index */
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intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
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}
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return 2;
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}
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static int i386_intel_simplify (expressionS *);
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static INLINE int i386_intel_simplify_symbol(symbolS *sym)
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{
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int ret = i386_intel_simplify (symbol_get_value_expression (sym));
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if (ret == 2)
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{
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S_SET_SEGMENT(sym, absolute_section);
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ret = 1;
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}
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return ret;
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}
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static int i386_intel_simplify (expressionS *e)
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{
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const reg_entry *the_reg = (this_operand >= 0
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? i.op[this_operand].regs : NULL);
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const reg_entry *base = intel_state.base;
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const reg_entry *state_index = intel_state.index;
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int ret;
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if (!intel_syntax)
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return 1;
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switch (e->X_op)
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{
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case O_index:
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if (e->X_add_symbol)
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{
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if (!i386_intel_simplify_symbol (e->X_add_symbol)
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|| !i386_intel_check(the_reg, intel_state.base,
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intel_state.index))
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return 0;
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}
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if (!intel_state.in_offset)
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++intel_state.in_bracket;
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ret = i386_intel_simplify_symbol (e->X_op_symbol);
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if (!intel_state.in_offset)
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--intel_state.in_bracket;
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if (!ret)
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return 0;
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if (e->X_add_symbol)
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e->X_op = O_add;
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else
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i386_intel_fold (e, e->X_op_symbol);
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break;
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case O_offset:
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intel_state.has_offset = 1;
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++intel_state.in_offset;
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ret = i386_intel_simplify_symbol (e->X_add_symbol);
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--intel_state.in_offset;
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if (!ret || !i386_intel_check(the_reg, base, state_index))
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return 0;
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i386_intel_fold (e, e->X_add_symbol);
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return ret;
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case O_byte_ptr:
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case O_word_ptr:
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case O_dword_ptr:
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case O_fword_ptr:
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case O_qword_ptr:
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case O_tbyte_ptr:
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case O_oword_ptr:
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case O_xmmword_ptr:
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case O_ymmword_ptr:
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case O_zmmword_ptr:
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case O_near_ptr:
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case O_far_ptr:
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if (intel_state.op_modifier == O_absent)
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intel_state.op_modifier = e->X_op;
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/* FALLTHROUGH */
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case O_short:
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if (symbol_get_value_expression (e->X_add_symbol)->X_op
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== O_register)
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{
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as_bad (_("invalid use of register"));
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return 0;
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}
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if (!i386_intel_simplify_symbol (e->X_add_symbol))
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return 0;
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i386_intel_fold (e, e->X_add_symbol);
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break;
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case O_full_ptr:
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if (symbol_get_value_expression (e->X_op_symbol)->X_op
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== O_register)
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{
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as_bad (_("invalid use of register"));
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return 0;
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}
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if (!i386_intel_simplify_symbol (e->X_op_symbol)
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|| !i386_intel_check(the_reg, intel_state.base,
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intel_state.index))
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return 0;
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if (!intel_state.in_offset)
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{
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if (!intel_state.seg)
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intel_state.seg = e->X_add_symbol;
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else
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{
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expressionS exp;
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exp.X_op = O_full_ptr;
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exp.X_add_symbol = e->X_add_symbol;
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exp.X_op_symbol = intel_state.seg;
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intel_state.seg = make_expr_symbol (&exp);
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}
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}
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i386_intel_fold (e, e->X_op_symbol);
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break;
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|
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case O_multiply:
|
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if (this_operand >= 0 && intel_state.in_bracket)
|
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{
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expressionS *scale = NULL;
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int has_index = (intel_state.index != NULL);
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|
|
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if (!intel_state.in_scale++)
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intel_state.scale_factor = 1;
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|
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ret = i386_intel_simplify_symbol (e->X_add_symbol);
|
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if (ret && !has_index && intel_state.index)
|
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scale = symbol_get_value_expression (e->X_op_symbol);
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|
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if (ret)
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ret = i386_intel_simplify_symbol (e->X_op_symbol);
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if (ret && !scale && !has_index && intel_state.index)
|
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scale = symbol_get_value_expression (e->X_add_symbol);
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|
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if (ret && scale)
|
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{
|
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resolve_expression (scale);
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if (scale->X_op != O_constant
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|| intel_state.index->reg_type.bitfield.word)
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scale->X_add_number = 0;
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intel_state.scale_factor *= scale->X_add_number;
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}
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|
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--intel_state.in_scale;
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if (!ret)
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return 0;
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|
|
|
if (!intel_state.in_scale)
|
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switch (intel_state.scale_factor)
|
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{
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case 1:
|
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i.log2_scale_factor = 0;
|
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break;
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case 2:
|
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i.log2_scale_factor = 1;
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break;
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|
case 4:
|
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i.log2_scale_factor = 2;
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break;
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|
case 8:
|
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i.log2_scale_factor = 3;
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break;
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default:
|
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/* esp is invalid as index */
|
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intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
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break;
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}
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|
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break;
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}
|
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goto fallthrough;
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|
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case O_register:
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ret = i386_intel_simplify_register (e);
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if (ret == 2)
|
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{
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gas_assert (e->X_add_number < (unsigned short) -1);
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e->X_md = (unsigned short) e->X_add_number + 1;
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e->X_op = O_constant;
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e->X_add_number = 0;
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}
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return ret;
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|
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case O_constant:
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if (e->X_md)
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return i386_intel_simplify_register (e);
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|
|
/* FALLTHROUGH */
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default:
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fallthrough:
|
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if (e->X_add_symbol
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&& !i386_intel_simplify_symbol (e->X_add_symbol))
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return 0;
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if (e->X_op == O_add || e->X_op == O_subtract)
|
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{
|
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base = intel_state.base;
|
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state_index = intel_state.index;
|
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}
|
|
if (!i386_intel_check (the_reg, base, state_index)
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|| (e->X_op_symbol
|
|
&& !i386_intel_simplify_symbol (e->X_op_symbol))
|
|
|| !i386_intel_check (the_reg,
|
|
(e->X_op != O_add
|
|
? base : intel_state.base),
|
|
(e->X_op != O_add
|
|
? state_index : intel_state.index)))
|
|
return 0;
|
|
break;
|
|
}
|
|
|
|
if (this_operand >= 0
|
|
&& e->X_op == O_symbol
|
|
&& !intel_state.in_offset)
|
|
{
|
|
segT seg = S_GET_SEGMENT (e->X_add_symbol);
|
|
|
|
if (seg != absolute_section
|
|
&& seg != reg_section
|
|
&& seg != expr_section)
|
|
intel_state.is_mem |= 2 - !intel_state.in_bracket;
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
int i386_need_index_operator (void)
|
|
{
|
|
return intel_syntax < 0;
|
|
}
|
|
|
|
static int
|
|
i386_intel_operand (char *operand_string, int got_a_float)
|
|
{
|
|
char *saved_input_line_pointer, *buf;
|
|
segT exp_seg;
|
|
expressionS exp, *expP;
|
|
char suffix = 0;
|
|
int ret;
|
|
|
|
/* Handle vector immediates. */
|
|
if (RC_SAE_immediate (operand_string))
|
|
return 1;
|
|
|
|
/* Initialize state structure. */
|
|
intel_state.op_modifier = O_absent;
|
|
intel_state.is_mem = 0;
|
|
intel_state.is_indirect = 0;
|
|
intel_state.has_offset = 0;
|
|
intel_state.base = NULL;
|
|
intel_state.index = NULL;
|
|
intel_state.seg = NULL;
|
|
operand_type_set (&intel_state.reloc_types, ~0);
|
|
gas_assert (!intel_state.in_offset);
|
|
gas_assert (!intel_state.in_bracket);
|
|
gas_assert (!intel_state.in_scale);
|
|
|
|
saved_input_line_pointer = input_line_pointer;
|
|
input_line_pointer = buf = xstrdup (operand_string);
|
|
|
|
intel_syntax = -1;
|
|
memset (&exp, 0, sizeof(exp));
|
|
exp_seg = expression (&exp);
|
|
ret = i386_intel_simplify (&exp);
|
|
intel_syntax = 1;
|
|
|
|
SKIP_WHITESPACE ();
|
|
|
|
/* Handle vector operations. */
|
|
if (*input_line_pointer == '{')
|
|
{
|
|
char *end = check_VecOperations (input_line_pointer, NULL);
|
|
if (end)
|
|
input_line_pointer = end;
|
|
else
|
|
ret = 0;
|
|
}
|
|
|
|
if (!is_end_of_line[(unsigned char) *input_line_pointer])
|
|
{
|
|
if (ret)
|
|
as_bad (_("junk `%s' after expression"), input_line_pointer);
|
|
ret = 0;
|
|
}
|
|
else if (exp.X_op == O_illegal || exp.X_op == O_absent)
|
|
{
|
|
if (ret)
|
|
as_bad (_("invalid expression"));
|
|
ret = 0;
|
|
}
|
|
else if (!intel_state.has_offset
|
|
&& input_line_pointer > buf
|
|
&& *(input_line_pointer - 1) == ']')
|
|
{
|
|
intel_state.is_mem |= 1;
|
|
intel_state.is_indirect = 1;
|
|
}
|
|
|
|
input_line_pointer = saved_input_line_pointer;
|
|
free (buf);
|
|
|
|
gas_assert (!intel_state.in_offset);
|
|
gas_assert (!intel_state.in_bracket);
|
|
gas_assert (!intel_state.in_scale);
|
|
|
|
if (!ret)
|
|
return 0;
|
|
|
|
if (intel_state.op_modifier != O_absent
|
|
&& current_templates->start->base_opcode != 0x8d /* lea */)
|
|
{
|
|
i.types[this_operand].bitfield.unspecified = 0;
|
|
|
|
switch (intel_state.op_modifier)
|
|
{
|
|
case O_byte_ptr:
|
|
i.types[this_operand].bitfield.byte = 1;
|
|
suffix = BYTE_MNEM_SUFFIX;
|
|
break;
|
|
|
|
case O_word_ptr:
|
|
i.types[this_operand].bitfield.word = 1;
|
|
if ((current_templates->start->name[0] == 'l'
|
|
&& current_templates->start->name[2] == 's'
|
|
&& current_templates->start->name[3] == 0)
|
|
|| current_templates->start->base_opcode == 0x62 /* bound */)
|
|
suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
|
|
else if (got_a_float == 2) /* "fi..." */
|
|
suffix = SHORT_MNEM_SUFFIX;
|
|
else
|
|
suffix = WORD_MNEM_SUFFIX;
|
|
break;
|
|
|
|
case O_dword_ptr:
|
|
i.types[this_operand].bitfield.dword = 1;
|
|
if ((current_templates->start->name[0] == 'l'
|
|
&& current_templates->start->name[2] == 's'
|
|
&& current_templates->start->name[3] == 0)
|
|
|| current_templates->start->base_opcode == 0x62 /* bound */)
|
|
suffix = WORD_MNEM_SUFFIX;
|
|
else if (flag_code == CODE_16BIT
|
|
&& (current_templates->start->opcode_modifier.jump
|
|
|| current_templates->start->opcode_modifier.jumpdword))
|
|
suffix = LONG_DOUBLE_MNEM_SUFFIX;
|
|
else if (got_a_float == 1) /* "f..." */
|
|
suffix = SHORT_MNEM_SUFFIX;
|
|
else
|
|
suffix = LONG_MNEM_SUFFIX;
|
|
break;
|
|
|
|
case O_fword_ptr:
|
|
i.types[this_operand].bitfield.fword = 1;
|
|
if (current_templates->start->name[0] == 'l'
|
|
&& current_templates->start->name[2] == 's'
|
|
&& current_templates->start->name[3] == 0)
|
|
suffix = LONG_MNEM_SUFFIX;
|
|
else if (!got_a_float)
|
|
{
|
|
if (flag_code == CODE_16BIT)
|
|
add_prefix (DATA_PREFIX_OPCODE);
|
|
suffix = LONG_DOUBLE_MNEM_SUFFIX;
|
|
}
|
|
else
|
|
suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
|
|
break;
|
|
|
|
case O_qword_ptr:
|
|
i.types[this_operand].bitfield.qword = 1;
|
|
if (current_templates->start->base_opcode == 0x62 /* bound */
|
|
|| got_a_float == 1) /* "f..." */
|
|
suffix = LONG_MNEM_SUFFIX;
|
|
else
|
|
suffix = QWORD_MNEM_SUFFIX;
|
|
break;
|
|
|
|
case O_tbyte_ptr:
|
|
i.types[this_operand].bitfield.tbyte = 1;
|
|
if (got_a_float == 1)
|
|
suffix = LONG_DOUBLE_MNEM_SUFFIX;
|
|
else
|
|
suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
|
|
break;
|
|
|
|
case O_oword_ptr:
|
|
case O_xmmword_ptr:
|
|
i.types[this_operand].bitfield.xmmword = 1;
|
|
break;
|
|
|
|
case O_ymmword_ptr:
|
|
i.types[this_operand].bitfield.ymmword = 1;
|
|
break;
|
|
|
|
case O_zmmword_ptr:
|
|
i.types[this_operand].bitfield.zmmword = 1;
|
|
break;
|
|
|
|
case O_far_ptr:
|
|
suffix = LONG_DOUBLE_MNEM_SUFFIX;
|
|
/* FALLTHROUGH */
|
|
case O_near_ptr:
|
|
if (!current_templates->start->opcode_modifier.jump
|
|
&& !current_templates->start->opcode_modifier.jumpdword)
|
|
suffix = got_a_float /* so it will cause an error */
|
|
? BYTE_MNEM_SUFFIX
|
|
: LONG_DOUBLE_MNEM_SUFFIX;
|
|
break;
|
|
|
|
default:
|
|
BAD_CASE (intel_state.op_modifier);
|
|
break;
|
|
}
|
|
|
|
if (!i.suffix)
|
|
i.suffix = suffix;
|
|
else if (i.suffix != suffix)
|
|
{
|
|
as_bad (_("conflicting operand size modifiers"));
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
/* Operands for jump/call need special consideration. */
|
|
if (current_templates->start->opcode_modifier.jump
|
|
|| current_templates->start->opcode_modifier.jumpdword
|
|
|| current_templates->start->opcode_modifier.jumpintersegment)
|
|
{
|
|
if (i.op[this_operand].regs
|
|
|| intel_state.base
|
|
|| intel_state.index
|
|
|| intel_state.is_mem > 1)
|
|
i.types[this_operand].bitfield.jumpabsolute = 1;
|
|
else
|
|
switch (intel_state.op_modifier)
|
|
{
|
|
case O_near_ptr:
|
|
if (intel_state.seg)
|
|
i.types[this_operand].bitfield.jumpabsolute = 1;
|
|
else
|
|
intel_state.is_mem = 1;
|
|
break;
|
|
case O_far_ptr:
|
|
case O_absent:
|
|
if (!intel_state.seg)
|
|
{
|
|
intel_state.is_mem = 1;
|
|
if (intel_state.op_modifier == O_absent)
|
|
{
|
|
if (intel_state.is_indirect == 1)
|
|
i.types[this_operand].bitfield.jumpabsolute = 1;
|
|
break;
|
|
}
|
|
as_bad (_("cannot infer the segment part of the operand"));
|
|
return 0;
|
|
}
|
|
else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
|
|
i.types[this_operand].bitfield.jumpabsolute = 1;
|
|
else
|
|
{
|
|
i386_operand_type types;
|
|
|
|
if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
|
|
{
|
|
as_bad (_("at most %d immediate operands are allowed"),
|
|
MAX_IMMEDIATE_OPERANDS);
|
|
return 0;
|
|
}
|
|
expP = &im_expressions[i.imm_operands++];
|
|
memset (expP, 0, sizeof(*expP));
|
|
expP->X_op = O_symbol;
|
|
expP->X_add_symbol = intel_state.seg;
|
|
i.op[this_operand].imms = expP;
|
|
|
|
resolve_expression (expP);
|
|
operand_type_set (&types, ~0);
|
|
if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg),
|
|
expP, types, operand_string))
|
|
return 0;
|
|
if (i.operands < MAX_OPERANDS)
|
|
{
|
|
this_operand = i.operands++;
|
|
i.types[this_operand].bitfield.unspecified = 1;
|
|
}
|
|
if (suffix == LONG_DOUBLE_MNEM_SUFFIX)
|
|
i.suffix = 0;
|
|
intel_state.seg = NULL;
|
|
intel_state.is_mem = 0;
|
|
}
|
|
break;
|
|
default:
|
|
i.types[this_operand].bitfield.jumpabsolute = 1;
|
|
break;
|
|
}
|
|
if (i.types[this_operand].bitfield.jumpabsolute)
|
|
intel_state.is_mem |= 1;
|
|
}
|
|
else if (intel_state.seg)
|
|
intel_state.is_mem |= 1;
|
|
|
|
if (i.op[this_operand].regs)
|
|
{
|
|
i386_operand_type temp;
|
|
|
|
/* Register operand. */
|
|
if (intel_state.base || intel_state.index || intel_state.seg)
|
|
{
|
|
as_bad (_("invalid operand"));
|
|
return 0;
|
|
}
|
|
|
|
temp = i.op[this_operand].regs->reg_type;
|
|
temp.bitfield.baseindex = 0;
|
|
i.types[this_operand] = operand_type_or (i.types[this_operand],
|
|
temp);
|
|
i.types[this_operand].bitfield.unspecified = 0;
|
|
++i.reg_operands;
|
|
}
|
|
else if (intel_state.base
|
|
|| intel_state.index
|
|
|| intel_state.seg
|
|
|| intel_state.is_mem)
|
|
{
|
|
/* Memory operand. */
|
|
if (i.mem_operands == 1 && !maybe_adjust_templates ())
|
|
return 0;
|
|
if ((int) i.mem_operands
|
|
>= 2 - !current_templates->start->opcode_modifier.isstring)
|
|
{
|
|
/* Handle
|
|
|
|
call 0x9090,0x90909090
|
|
lcall 0x9090,0x90909090
|
|
jmp 0x9090,0x90909090
|
|
ljmp 0x9090,0x90909090
|
|
*/
|
|
|
|
if ((current_templates->start->opcode_modifier.jumpintersegment
|
|
|| current_templates->start->opcode_modifier.jumpdword
|
|
|| current_templates->start->opcode_modifier.jump)
|
|
&& this_operand == 1
|
|
&& intel_state.seg == NULL
|
|
&& i.mem_operands == 1
|
|
&& i.disp_operands == 1
|
|
&& intel_state.op_modifier == O_absent)
|
|
{
|
|
/* Try to process the first operand as immediate, */
|
|
this_operand = 0;
|
|
if (i386_finalize_immediate (exp_seg, i.op[0].imms,
|
|
intel_state.reloc_types,
|
|
NULL))
|
|
{
|
|
this_operand = 1;
|
|
expP = &im_expressions[0];
|
|
i.op[this_operand].imms = expP;
|
|
*expP = exp;
|
|
|
|
/* Try to process the second operand as immediate, */
|
|
if (i386_finalize_immediate (exp_seg, expP,
|
|
intel_state.reloc_types,
|
|
NULL))
|
|
{
|
|
i.mem_operands = 0;
|
|
i.disp_operands = 0;
|
|
i.imm_operands = 2;
|
|
i.types[0].bitfield.mem = 0;
|
|
i.types[0].bitfield.disp16 = 0;
|
|
i.types[0].bitfield.disp32 = 0;
|
|
i.types[0].bitfield.disp32s = 0;
|
|
return 1;
|
|
}
|
|
}
|
|
}
|
|
|
|
as_bad (_("too many memory references for `%s'"),
|
|
current_templates->start->name);
|
|
return 0;
|
|
}
|
|
|
|
/* Swap base and index in 16-bit memory operands like
|
|
[si+bx]. Since i386_index_check is also used in AT&T
|
|
mode we have to do this here. */
|
|
if (intel_state.base
|
|
&& intel_state.index
|
|
&& intel_state.base->reg_type.bitfield.word
|
|
&& intel_state.index->reg_type.bitfield.word
|
|
&& intel_state.base->reg_num >= 6
|
|
&& intel_state.index->reg_num < 6)
|
|
{
|
|
i.base_reg = intel_state.index;
|
|
i.index_reg = intel_state.base;
|
|
}
|
|
else
|
|
{
|
|
i.base_reg = intel_state.base;
|
|
i.index_reg = intel_state.index;
|
|
}
|
|
|
|
if (i.base_reg || i.index_reg)
|
|
i.types[this_operand].bitfield.baseindex = 1;
|
|
|
|
expP = &disp_expressions[i.disp_operands];
|
|
memcpy (expP, &exp, sizeof(exp));
|
|
resolve_expression (expP);
|
|
|
|
if (expP->X_op != O_constant
|
|
|| expP->X_add_number
|
|
|| !i.types[this_operand].bitfield.baseindex)
|
|
{
|
|
i.op[this_operand].disps = expP;
|
|
i.disp_operands++;
|
|
|
|
i386_addressing_mode ();
|
|
|
|
if (flag_code == CODE_64BIT)
|
|
{
|
|
i.types[this_operand].bitfield.disp32 = 1;
|
|
if (!i.prefix[ADDR_PREFIX])
|
|
{
|
|
i.types[this_operand].bitfield.disp64 = 1;
|
|
i.types[this_operand].bitfield.disp32s = 1;
|
|
}
|
|
}
|
|
else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT))
|
|
i.types[this_operand].bitfield.disp32 = 1;
|
|
else
|
|
i.types[this_operand].bitfield.disp16 = 1;
|
|
|
|
#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
|
|
/*
|
|
* exp_seg is used only for verification in
|
|
* i386_finalize_displacement, and we can end up seeing reg_section
|
|
* here - but we know we removed all registers from the expression
|
|
* (or error-ed on any remaining ones) in i386_intel_simplify. I
|
|
* consider the check in i386_finalize_displacement bogus anyway, in
|
|
* particular because it doesn't allow for expr_section, so I'd
|
|
* rather see that check (and the similar one in
|
|
* i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out
|
|
* expert I can't really say whether that would have other bad side
|
|
* effects.
|
|
*/
|
|
if (OUTPUT_FLAVOR == bfd_target_aout_flavour
|
|
&& exp_seg == reg_section)
|
|
exp_seg = expP->X_op != O_constant ? undefined_section
|
|
: absolute_section;
|
|
#endif
|
|
|
|
if (!i386_finalize_displacement (exp_seg, expP,
|
|
intel_state.reloc_types,
|
|
operand_string))
|
|
return 0;
|
|
}
|
|
|
|
if (intel_state.seg)
|
|
{
|
|
for (ret = check_none; ; ret = operand_check)
|
|
{
|
|
expP = symbol_get_value_expression (intel_state.seg);
|
|
if (expP->X_op != O_full_ptr
|
|
|| symbol_get_value_expression (expP->X_op_symbol)->X_op
|
|
!= O_register)
|
|
break;
|
|
intel_state.seg = expP->X_add_symbol;
|
|
}
|
|
if (expP->X_op != O_register)
|
|
{
|
|
as_bad (_("segment register name expected"));
|
|
return 0;
|
|
}
|
|
if (!i386_regtab[expP->X_add_number].reg_type.bitfield.sreg2
|
|
&& !i386_regtab[expP->X_add_number].reg_type.bitfield.sreg3)
|
|
{
|
|
as_bad (_("invalid use of register"));
|
|
return 0;
|
|
}
|
|
switch (ret)
|
|
{
|
|
case check_error:
|
|
as_bad (_("redundant segment overrides"));
|
|
return 0;
|
|
case check_warning:
|
|
as_warn (_("redundant segment overrides"));
|
|
break;
|
|
}
|
|
switch (i386_regtab[expP->X_add_number].reg_num)
|
|
{
|
|
case 0: i.seg[i.mem_operands] = &es; break;
|
|
case 1: i.seg[i.mem_operands] = &cs; break;
|
|
case 2: i.seg[i.mem_operands] = &ss; break;
|
|
case 3: i.seg[i.mem_operands] = &ds; break;
|
|
case 4: i.seg[i.mem_operands] = &fs; break;
|
|
case 5: i.seg[i.mem_operands] = &gs; break;
|
|
case RegFlat: i.seg[i.mem_operands] = NULL; break;
|
|
}
|
|
}
|
|
|
|
if (!i386_index_check (operand_string))
|
|
return 0;
|
|
|
|
i.types[this_operand].bitfield.mem = 1;
|
|
if (i.mem_operands == 0)
|
|
i.memop1_string = xstrdup (operand_string);
|
|
++i.mem_operands;
|
|
}
|
|
else
|
|
{
|
|
/* Immediate. */
|
|
if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
|
|
{
|
|
as_bad (_("at most %d immediate operands are allowed"),
|
|
MAX_IMMEDIATE_OPERANDS);
|
|
return 0;
|
|
}
|
|
|
|
expP = &im_expressions[i.imm_operands++];
|
|
i.op[this_operand].imms = expP;
|
|
*expP = exp;
|
|
|
|
return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types,
|
|
operand_string);
|
|
}
|
|
|
|
return 1;
|
|
}
|