mirror of
https://github.com/autc04/Retro68.git
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158 lines
4.8 KiB
C
158 lines
4.8 KiB
C
/* Copyright (C) 2009-2016 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option) any
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later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef inhibit_libc
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#include <signal.h>
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#include <sys/ucontext.h>
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/* Since insns are always stored LE, on a BE system the opcodes will
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be loaded byte-reversed. Therefore, define two sets of opcodes,
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one for LE and one for BE. */
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#if __AARCH64EB__
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#define MOVZ_X8_8B 0x681180d2
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#define SVC_0 0x010000d4
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#else
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#define MOVZ_X8_8B 0xd2801168
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#define SVC_0 0xd4000001
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#endif
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#define MD_FALLBACK_FRAME_STATE_FOR aarch64_fallback_frame_state
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static _Unwind_Reason_Code
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aarch64_fallback_frame_state (struct _Unwind_Context *context,
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_Unwind_FrameState * fs)
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{
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/* The kernel creates an rt_sigframe on the stack immediately prior
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to delivering a signal.
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This structure must have the same shape as the linux kernel
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equivalent. */
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struct rt_sigframe
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{
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siginfo_t info;
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struct ucontext uc;
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};
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struct rt_sigframe *rt_;
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_Unwind_Ptr new_cfa;
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unsigned *pc = context->ra;
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struct sigcontext *sc;
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struct _aarch64_ctx *extension_marker;
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int i;
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/* A signal frame will have a return address pointing to
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__default_sa_restorer. This code is hardwired as:
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0xd2801168 movz x8, #0x8b
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0xd4000001 svc 0x0
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*/
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if (pc[0] != MOVZ_X8_8B || pc[1] != SVC_0)
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{
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return _URC_END_OF_STACK;
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}
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rt_ = context->cfa;
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sc = &rt_->uc.uc_mcontext;
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/* This define duplicates the definition in aarch64.md */
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#define SP_REGNUM 31
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new_cfa = (_Unwind_Ptr) sc;
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fs->regs.cfa_how = CFA_REG_OFFSET;
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fs->regs.cfa_reg = __LIBGCC_STACK_POINTER_REGNUM__;
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fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
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for (i = 0; i < AARCH64_DWARF_NUMBER_R; i++)
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{
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fs->regs.reg[AARCH64_DWARF_R0 + i].how = REG_SAVED_OFFSET;
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fs->regs.reg[AARCH64_DWARF_R0 + i].loc.offset =
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(_Unwind_Ptr) & (sc->regs[i]) - new_cfa;
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}
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/* The core context may be extended with an arbitrary set of
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additional contexts appended sequentially. Each additional
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context contains a magic identifier and size in bytes. The size
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field can be used to skip over unrecognized context extensions.
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The end of the context sequence is marked by a context with magic
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0 or size 0. */
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for (extension_marker = (struct _aarch64_ctx *) &sc->__reserved;
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extension_marker->magic;
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extension_marker = (struct _aarch64_ctx *)
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((unsigned char *) extension_marker + extension_marker->size))
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{
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if (extension_marker->magic == FPSIMD_MAGIC)
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{
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struct fpsimd_context *ctx =
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(struct fpsimd_context *) extension_marker;
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int i;
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for (i = 0; i < AARCH64_DWARF_NUMBER_V; i++)
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{
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_Unwind_Sword offset;
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fs->regs.reg[AARCH64_DWARF_V0 + i].how = REG_SAVED_OFFSET;
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/* sigcontext contains 32 128bit registers for V0 to
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V31. The kernel will have saved the contents of the
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V registers. We want to unwind the callee save D
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registers. Each D register comprises the least
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significant half of the corresponding V register. We
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need to offset into the saved V register dependent on
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our endianness to find the saved D register. */
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offset = (_Unwind_Ptr) & (ctx->vregs[i]) - new_cfa;
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/* The endianness adjustment code below expects that a
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saved V register is 16 bytes. */
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gcc_assert (sizeof (ctx->vregs[0]) == 16);
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#if defined (__AARCH64EB__)
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offset = offset + 8;
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#endif
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fs->regs.reg[AARCH64_DWARF_V0 + i].loc.offset = offset;
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}
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}
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else
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{
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/* There is context provided that we do not recognize! */
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}
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}
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fs->regs.reg[31].how = REG_SAVED_OFFSET;
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fs->regs.reg[31].loc.offset = (_Unwind_Ptr) & (sc->sp) - new_cfa;
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fs->signal_frame = 1;
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fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].how =
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REG_SAVED_VAL_OFFSET;
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fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].loc.offset =
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(_Unwind_Ptr) (sc->pc) - new_cfa;
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fs->retaddr_column = __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__;
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return _URC_NO_REASON;
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}
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#endif
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