2020-03-15 13:29:59 +00:00
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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2021-10-23 19:00:31 +00:00
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Copyright (C) 2018-21 divingkatae and maximum
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2020-03-15 13:29:59 +00:00
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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/** @file Serial presence detect (SPD) RAM module emulation.
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Author: Max Poliakovski
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@description
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Serial presence detect (SPD) is a standard that prescribes an automatic way
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to supply various information about a memory module.
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A SPD-compatible memory module contains a small EEPROM that stores useful
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information like memory size, configuration, speed, manufacturer etc.
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The content depends on the module type.
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This EEPROM is accessible via the I2C bus. The EEPROM I2C address will be
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configured depending on the physical RAM slot the module is inserted to.
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A 168-Pin SDRAM slot includes three specialized pins SA0-SA2 for setting
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an unique I2C address for each module EEPROM. The SA0-SA2 pins are hardwired
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differently for each RAM slot. Example:
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Slot SA0-SA2 I2C address
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A %000 0x50 + %000 = 0x50
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B %001 0x50 + %001 = 0x51
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Further reading: https://en.wikipedia.org/wiki/Serial_presence_detect
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*/
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#ifndef SPD_EEPROM_H
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#define SPD_EEPROM_H
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2021-10-23 18:17:47 +00:00
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#include <devices/common/hwcomponent.h>
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#include <devices/common/i2c/i2c.h>
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#include <loguru.hpp>
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2020-03-15 13:29:59 +00:00
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#include <cinttypes>
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#include <stdexcept>
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2020-05-12 18:55:45 +00:00
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#include <string>
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2020-03-15 13:29:59 +00:00
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2020-05-12 18:55:45 +00:00
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enum RAMType : int { SDRAM = 4 };
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2020-03-15 13:29:59 +00:00
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class SpdSdram168 : public HWComponent, public I2CDevice {
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public:
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SpdSdram168(uint8_t addr) {
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this->dev_addr = addr;
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2020-05-12 18:55:45 +00:00
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this->pos = 0;
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2022-01-26 15:45:21 +00:00
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supports_types(HWCompType::RAM);
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2020-03-15 13:29:59 +00:00
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};
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~SpdSdram168() = default;
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void set_capacity(int capacity_megs) {
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2020-05-12 18:55:45 +00:00
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switch (capacity_megs) {
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2020-03-15 13:29:59 +00:00
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case 32:
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this->eeprom_data[3] = 0xC; /* 12 rows */
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this->eeprom_data[4] = 0x8; /* 8 columns */
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this->eeprom_data[5] = 0x1; /* one bank */
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break;
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case 64:
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this->eeprom_data[3] = 0xC; /* 12 rows */
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this->eeprom_data[4] = 0x9; /* 9 columns */
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this->eeprom_data[5] = 0x1; /* one bank */
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break;
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case 128:
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this->eeprom_data[3] = 0xC; /* 12 rows */
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this->eeprom_data[4] = 0xA; /* 10 columns */
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this->eeprom_data[5] = 0x1; /* one bank */
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break;
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case 256:
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this->eeprom_data[3] = 0xC; /* 12 rows */
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this->eeprom_data[4] = 0xA; /* 10 columns */
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this->eeprom_data[5] = 0x2; /* two banks */
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break;
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default:
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throw std::invalid_argument(std::string("Unsupported capacity!"));
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}
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2020-05-12 18:55:45 +00:00
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LOG_F(INFO, "SDRAM capacity set to %dMB, I2C addr = 0x%X", capacity_megs, this->dev_addr);
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};
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2020-05-12 18:55:45 +00:00
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void start_transaction() {
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this->pos = 0;
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};
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2020-03-15 13:29:59 +00:00
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bool send_subaddress(uint8_t sub_addr) {
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this->pos = sub_addr;
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LOG_F(9, "SDRAM subaddress set to 0x%X", sub_addr);
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return true;
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};
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bool send_byte(uint8_t data) {
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LOG_F(9, "SDRAM byte 0x%X received", data);
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return true;
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};
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2020-05-12 18:55:45 +00:00
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bool receive_byte(uint8_t* p_data) {
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2020-03-15 13:29:59 +00:00
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if (this->pos >= this->eeprom_data[0]) {
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this->pos = 0; /* attempt to read past SPD data should wrap around */
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}
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LOG_F(9, "SDRAM sending EEPROM byte 0x%X", this->eeprom_data[this->pos]);
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*p_data = this->eeprom_data[this->pos++];
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return true;
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};
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private:
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uint8_t dev_addr; /* I2C address */
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2020-05-12 18:55:45 +00:00
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int pos; /* actual read position */
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2020-03-15 13:29:59 +00:00
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/* EEPROM content */
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uint8_t eeprom_data[256] = {
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128, /* number of bytes present */
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8, /* log2(EEPROM size) */
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2020-03-15 13:29:59 +00:00
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RAMType::SDRAM, /* memory type */
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/* the following fields will be set up in set_capacity() */
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0, /* number of row addresses */
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0, /* number of column addresses */
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0 /* number of banks */
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2020-03-15 13:29:59 +00:00
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};
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};
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#endif /* SPD_EEPROM_H */
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