2021-09-30 21:00:56 +00:00
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-21 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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/** Apple memory-mapped I/O controller emulation.
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Author: Max Poliakovski
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*/
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#include "amic.h"
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#include "machines/machinebase.h"
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#include "memctrlbase.h"
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#include "viacuda.h"
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#include <cinttypes>
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#include <loguru.hpp>
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AMIC::AMIC()
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{
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this->name = "Apple Memory-mapped I/O Controller";
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MemCtrlBase *mem_ctrl = dynamic_cast<MemCtrlBase *>
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(gMachineObj->get_comp_by_type(HWCompType::MEM_CTRL));
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/* add memory mapped I/O region for the AMIC control registers */
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if (!mem_ctrl->add_mmio_region(0x50F00000, 0x00040000, this)) {
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LOG_F(ERROR, "Couldn't register AMIC registers!");
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}
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this->viacuda = std::unique_ptr<ViaCuda> (new ViaCuda());
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2021-09-30 23:02:43 +00:00
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this->awacs = std::unique_ptr<AwacDevicePdm> (new AwacDevicePdm());
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2021-09-30 21:00:56 +00:00
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}
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bool AMIC::supports_type(HWCompType type) {
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if (type == HWCompType::MMIO_DEV) {
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return true;
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} else {
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return false;
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}
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}
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uint32_t AMIC::read(uint32_t reg_start, uint32_t offset, int size)
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{
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if (offset < 0x2000) {
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return this->viacuda->read(offset >> 9);
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}
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2021-09-30 23:02:43 +00:00
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switch(offset) {
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case AMICReg::Snd_Stat_0:
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case AMICReg::Snd_Stat_1:
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case AMICReg::Snd_Stat_2:
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return (this->awacs->read_stat() >> (offset & 3 * 8)) & 0xFF;
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}
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2021-09-30 21:00:56 +00:00
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return 0;
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}
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void AMIC::write(uint32_t reg_start, uint32_t offset, uint32_t value, int size)
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{
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if (offset < 0x2000) {
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this->viacuda->write(offset >> 9, value);
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return;
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}
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switch(offset) {
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2021-09-30 23:02:43 +00:00
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case AMICReg::Snd_Cntl_0:
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case AMICReg::Snd_Cntl_1:
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case AMICReg::Snd_Cntl_2:
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// remember values of sound control registers
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this->imm_snd_regs[offset & 3] = value;
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// transfer control information to the sound codec when ready
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if ((this->imm_snd_regs[0] & 0xC0) == PDM_SND_CNTL_VALID) {
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this->awacs->write_ctrl(
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(this->imm_snd_regs[1] >> 4) | (this->imm_snd_regs[0] & 0x3F),
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((this->imm_snd_regs[1] & 0xF) << 8) | this->imm_snd_regs[2]
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);
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}
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break;
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2021-09-30 21:00:56 +00:00
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case AMICReg::Snd_Out_Cntl:
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LOG_F(INFO, "AMIC Sound Out Ctrl updated, val=%x", value);
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break;
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case AMICReg::Snd_In_Cntl:
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LOG_F(INFO, "AMIC Sound In Ctrl updated, val=%x", value);
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break;
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case AMICReg::VIA2_Slot_IER:
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LOG_F(INFO, "AMIC VIA2 Slot Interrupt Enable Register updated, val=%x", value);
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break;
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case AMICReg::VIA2_IER:
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LOG_F(INFO, "AMIC VIA2 Interrupt Enable Register updated, val=%x", value);
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break;
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case AMICReg::Video_Mode_Reg:
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LOG_F(INFO, "AMIC Video Mode Register set to %x", value);
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break;
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case AMICReg::Int_Cntl:
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LOG_F(INFO, "AMIC Interrupt Control Register set to %X", value);
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break;
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case AMICReg::Enet_DMA_Xmt_Cntl:
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LOG_F(INFO, "AMIC Ethernet Transmit DMA Ctrl updated, val=%x", value);
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break;
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case AMICReg::SCSI_DMA_Cntl:
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LOG_F(INFO, "AMIC SCSI DMA Ctrl updated, val=%x", value);
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break;
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case AMICReg::Enet_DMA_Rcv_Cntl:
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LOG_F(INFO, "AMIC Ethernet Receive DMA Ctrl updated, val=%x", value);
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break;
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case AMICReg::SWIM3_DMA_Cntl:
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LOG_F(INFO, "AMIC SWIM3 DMA Ctrl updated, val=%x", value);
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break;
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case AMICReg::SCC_DMA_Xmt_A_Cntl:
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LOG_F(INFO, "AMIC SCC Transmit Ch A DMA Ctrl updated, val=%x", value);
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break;
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case AMICReg::SCC_DMA_Rcv_A_Cntl:
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LOG_F(INFO, "AMIC SCC Receive Ch A DMA Ctrl updated, val=%x", value);
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break;
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case AMICReg::SCC_DMA_Xmt_B_Cntl:
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LOG_F(INFO, "AMIC SCC Transmit Ch B DMA Ctrl updated, val=%x", value);
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break;
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case AMICReg::SCC_DMA_Rcv_B_Cntl:
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LOG_F(INFO, "AMIC SCC Receive Ch B DMA Ctrl updated, val=%x", value);
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break;
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default:
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LOG_F(WARNING, "Unknown AMIC register write, offset=%x, val=%x",
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offset, value);
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}
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}
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