2021-10-23 19:00:31 +00:00
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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Copyright (C) 2018-21 divingkatae and maximum
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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2021-07-27 10:58:42 +00:00
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/** @file Set of macros for accessing host memory in units of various sizes
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2021-02-03 11:19:18 +00:00
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and endianness.
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2020-01-03 15:08:00 +00:00
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*/
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2021-02-03 11:19:18 +00:00
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#ifndef MEM_ACCESS_H
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#define MEM_ACCESS_H
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2020-01-13 02:04:06 +00:00
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#include "endianswap.h"
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2020-05-12 18:55:45 +00:00
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#include <cinttypes>
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2021-09-15 22:46:38 +00:00
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#include <loguru.hpp>
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2020-01-13 02:04:06 +00:00
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2020-01-26 22:45:29 +00:00
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/* read an aligned big-endian WORD (16bit) */
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2020-05-12 18:55:45 +00:00
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#define READ_WORD_BE_A(addr) (BYTESWAP_16(*((uint16_t*)((addr)))))
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2020-01-13 02:04:06 +00:00
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/* read an aligned big-endian DWORD (32bit) */
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2020-05-12 18:55:45 +00:00
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#define READ_DWORD_BE_A(addr) (BYTESWAP_32(*((uint32_t*)((addr)))))
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2020-01-13 02:04:06 +00:00
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2020-01-26 02:30:55 +00:00
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/* read an aligned big-endian QWORD (64bit) */
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2020-05-12 18:55:45 +00:00
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#define READ_QWORD_BE_A(addr) (BYTESWAP_64(*((uint64_t*)((addr)))))
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2020-01-26 02:30:55 +00:00
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2020-01-13 02:04:06 +00:00
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/* read an aligned little-endian WORD (16bit) */
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2020-05-12 18:55:45 +00:00
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#define READ_WORD_LE_A(addr) (*(uint16_t*)((addr)))
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2020-01-13 02:04:06 +00:00
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/* read an aligned little-endian DWORD (32bit) */
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2020-05-12 18:55:45 +00:00
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#define READ_DWORD_LE_A(addr) (*(uint32_t*)((addr)))
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2020-01-13 02:04:06 +00:00
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2020-01-26 02:30:55 +00:00
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/* read an aligned little-endian QWORD (64bit) */
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2020-05-12 18:55:45 +00:00
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#define READ_QWORD_LE_A(addr) (*(uint64_t*)((addr)))
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2020-01-13 02:04:06 +00:00
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/* read an unaligned big-endian WORD (16bit) */
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2020-05-12 18:55:45 +00:00
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#define READ_WORD_BE_U(addr) (((addr)[0] << 8) | (addr)[1])
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2020-01-03 15:08:00 +00:00
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2020-01-13 02:04:06 +00:00
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/* read an unaligned big-endian DWORD (32bit) */
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2021-07-27 10:58:42 +00:00
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#define READ_DWORD_BE_U(addr) \
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(((addr)[0] << 24) | ((addr)[1] << 16) | ((addr)[2] << 8) | (addr)[3])
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2020-01-06 02:46:23 +00:00
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2020-01-26 02:30:55 +00:00
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/* read an unaligned big-endian QWORD (32bit) */
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2021-06-20 20:28:48 +00:00
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#define READ_QWORD_BE_U(addr) \
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((uint64_t((addr)[0]) << 56) | (uint64_t((addr)[1]) << 48) | \
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(uint64_t((addr)[2]) << 40) | (uint64_t((addr)[3]) << 32) | \
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2023-12-04 11:47:46 +00:00
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(uint64_t((addr)[4]) << 24) | ((addr)[5] << 16) | ((addr)[6] << 8) | (addr)[7])
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2020-01-26 02:30:55 +00:00
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2020-01-13 02:04:06 +00:00
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/* read an unaligned little-endian WORD (16bit) */
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2020-05-12 18:55:45 +00:00
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#define READ_WORD_LE_U(addr) (((addr)[1] << 8) | (addr)[0])
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2020-01-03 15:08:00 +00:00
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2020-01-13 02:04:06 +00:00
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/* read an unaligned little-endian DWORD (32bit) */
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2021-07-27 10:58:42 +00:00
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#define READ_DWORD_LE_U(addr) \
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(((addr)[3] << 24) | ((addr)[2] << 16) | ((addr)[1] << 8) | (addr)[0])
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2020-01-03 15:08:00 +00:00
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2021-07-27 10:58:42 +00:00
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/* read an unaligned little-endian DWORD (64bit) */
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#define READ_QWORD_LE_U(addr) \
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((uint64_t((addr)[7]) << 56) | (uint64_t((addr)[6]) << 48) | \
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(uint64_t((addr)[5]) << 40) | (uint64_t((addr)[4]) << 32) | \
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2023-12-04 11:47:46 +00:00
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(uint64_t((addr)[3]) << 24) | ((addr)[2] << 16) | ((addr)[1] << 8) | (addr)[0])
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2020-01-26 22:45:29 +00:00
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/* write an aligned big-endian WORD (16bit) */
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2020-05-12 18:55:45 +00:00
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#define WRITE_WORD_BE_A(addr, val) (*((uint16_t*)((addr))) = BYTESWAP_16(val))
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2020-01-26 22:45:29 +00:00
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/* write an aligned big-endian DWORD (32bit) */
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2020-05-12 18:55:45 +00:00
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#define WRITE_DWORD_BE_A(addr, val) (*((uint32_t*)((addr))) = BYTESWAP_32(val))
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2020-01-26 22:45:29 +00:00
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/* write an aligned big-endian QWORD (64bit) */
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2020-05-12 18:55:45 +00:00
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#define WRITE_QWORD_BE_A(addr, val) (*((uint64_t*)((addr))) = BYTESWAP_64(val))
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2020-01-26 22:45:29 +00:00
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2020-01-29 23:45:39 +00:00
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/* write an unaligned big-endian WORD (16bit) */
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2021-07-27 10:58:42 +00:00
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#define WRITE_WORD_BE_U(addr, val) \
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do { \
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(addr)[0] = ((val) >> 8) & 0xFF; \
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(addr)[1] = (val) & 0xFF; \
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2020-05-12 18:55:45 +00:00
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} while (0)
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2020-01-29 23:45:39 +00:00
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/* write an unaligned big-endian DWORD (32bit) */
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2021-07-27 10:58:42 +00:00
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#define WRITE_DWORD_BE_U(addr, val) \
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do { \
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(addr)[0] = ((val) >> 24) & 0xFF; \
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(addr)[1] = ((val) >> 16) & 0xFF; \
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(addr)[2] = ((val) >> 8) & 0xFF; \
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(addr)[3] = (val) & 0xFF; \
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} while (0)
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/* write an unaligned big-endian DWORD (64bit) */
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#define WRITE_QWORD_BE_U(addr, val) \
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do { \
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(addr)[0] = ((uint64_t)(val) >> 56) & 0xFF; \
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(addr)[1] = ((uint64_t)(val) >> 48) & 0xFF; \
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(addr)[2] = ((uint64_t)(val) >> 40) & 0xFF; \
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(addr)[3] = ((uint64_t)(val) >> 32) & 0xFF; \
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(addr)[4] = ((val) >> 24) & 0xFF; \
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(addr)[5] = ((val) >> 16) & 0xFF; \
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(addr)[6] = ((val) >> 8) & 0xFF; \
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(addr)[7] = (val) & 0xFF; \
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2020-05-12 18:55:45 +00:00
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} while (0)
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2020-01-29 23:45:39 +00:00
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2020-03-31 12:06:01 +00:00
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/* write an aligned little-endian WORD (16bit) */
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2020-05-12 18:55:45 +00:00
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#define WRITE_WORD_LE_A(addr, val) (*((uint16_t*)((addr))) = (val))
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2020-03-31 12:06:01 +00:00
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/* write an aligned little-endian DWORD (32bit) */
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2020-05-12 18:55:45 +00:00
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#define WRITE_DWORD_LE_A(addr, val) (*((uint32_t*)((addr))) = (val))
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2020-03-31 12:06:01 +00:00
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/* write an aligned little-endian QWORD (64bit) */
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2020-05-12 18:55:45 +00:00
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#define WRITE_QWORD_LE_A(addr, val) (*((uint64_t*)((addr))) = (val))
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2020-03-31 12:06:01 +00:00
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/* write an unaligned little-endian WORD (16bit) */
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2021-07-27 10:58:42 +00:00
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#define WRITE_WORD_LE_U(addr, val) \
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do { \
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(addr)[0] = (val)&0xFF; \
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(addr)[1] = ((val) >> 8) & 0xFF; \
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2020-05-12 18:55:45 +00:00
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} while (0)
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2020-03-31 12:06:01 +00:00
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/* write an unaligned little-endian DWORD (32bit) */
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2021-07-27 10:58:42 +00:00
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#define WRITE_DWORD_LE_U(addr, val) \
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do { \
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(addr)[0] = (val)&0xFF; \
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(addr)[1] = ((val) >> 8) & 0xFF; \
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(addr)[2] = ((val) >> 16) & 0xFF; \
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(addr)[3] = ((val) >> 24) & 0xFF; \
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2020-05-12 18:55:45 +00:00
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} while (0)
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2020-03-31 12:06:01 +00:00
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2021-02-03 22:36:32 +00:00
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/* read value of the specified size from memory starting at addr,
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perform byte swapping when necessary so that the source
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byte order remains unchanged. */
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inline uint32_t read_mem(const uint8_t* buf, uint32_t size) {
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switch (size) {
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case 4:
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return READ_DWORD_BE_A(buf);
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break;
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case 2:
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return READ_WORD_BE_A(buf);
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break;
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case 1:
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return *buf;
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break;
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default:
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LOG_F(WARNING, "READ_MEM: invalid size %d!", size);
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return 0;
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}
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}
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/* read value of the specified size from memory starting at addr,
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perform byte swapping when necessary so that the destination data
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will be in the reversed byte order. */
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inline uint32_t read_mem_rev(const uint8_t* buf, uint32_t size) {
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switch (size) {
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case 4:
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return READ_DWORD_LE_A(buf);
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break;
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case 2:
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return READ_WORD_LE_A(buf);
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break;
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case 1:
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return *buf;
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break;
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default:
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LOG_F(WARNING, "READ_MEM_REV: invalid size %d!", size);
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return 0;
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}
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}
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/* write the specified value of the specified size to memory pointed
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to by addr, perform necessary byte swapping so that the byte order
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of the destination remains unchanged. */
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inline void write_mem(uint8_t* buf, uint32_t value, uint32_t size) {
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switch (size) {
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case 4:
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WRITE_DWORD_BE_A(buf, value);
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break;
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case 2:
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WRITE_WORD_BE_A(buf, value & 0xFFFFU);
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break;
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case 1:
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*buf = value & 0xFF;
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break;
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default:
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LOG_F(WARNING, "WRITE_MEM: invalid size %d!", size);
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}
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}
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/* write the specified value of the specified size to memory pointed
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to by addr, perform necessary byte swapping so that the destination
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data in memory will be in the reversed byte order. */
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inline void write_mem_rev(uint8_t* buf, uint32_t value, uint32_t size) {
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switch (size) {
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case 4:
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WRITE_DWORD_LE_A(buf, value);
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break;
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case 2:
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WRITE_WORD_LE_A(buf, value & 0xFFFFU);
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break;
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case 1:
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*buf = value & 0xFF;
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break;
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default:
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LOG_F(WARNING, "WRITE_MEM_REV: invalid size %d!", size);
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}
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}
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2021-02-03 11:19:18 +00:00
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#endif /* MEM_ACCESS_H */
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