2022-10-22 18:41:52 +00:00
|
|
|
/*
|
|
|
|
DingusPPC - The Experimental PowerPC Macintosh emulator
|
2023-04-24 21:02:32 +00:00
|
|
|
Copyright (C) 2018-23 divingkatae and maximum
|
2022-10-22 18:41:52 +00:00
|
|
|
(theweirdo) spatium
|
|
|
|
|
|
|
|
(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
|
|
|
|
|
|
|
|
This program is free software: you can redistribute it and/or modify
|
|
|
|
it under the terms of the GNU General Public License as published by
|
|
|
|
the Free Software Foundation, either version 3 of the License, or
|
|
|
|
(at your option) any later version.
|
|
|
|
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
GNU General Public License for more details.
|
|
|
|
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
|
|
along with this program. If not, see <https://www.gnu.org/licenses/>.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/** @file Heathrow hard drive controller */
|
|
|
|
|
2022-12-07 21:36:25 +00:00
|
|
|
#include <devices/common/ata/atabasedevice.h>
|
|
|
|
#include <devices/common/ata/atadefs.h>
|
2022-10-30 22:38:09 +00:00
|
|
|
#include <devices/deviceregistry.h>
|
2022-10-22 18:41:52 +00:00
|
|
|
#include <loguru.hpp>
|
2022-12-07 21:36:25 +00:00
|
|
|
|
|
|
|
#include <cinttypes>
|
2022-10-22 18:41:52 +00:00
|
|
|
|
2022-12-08 07:04:09 +00:00
|
|
|
using namespace ata_interface;
|
2022-10-22 18:41:52 +00:00
|
|
|
|
2023-04-24 21:02:32 +00:00
|
|
|
AtaBaseDevice::AtaBaseDevice(const std::string name, uint8_t type) {
|
2022-12-07 21:36:25 +00:00
|
|
|
this->set_name(name);
|
2022-10-22 18:41:52 +00:00
|
|
|
supports_types(HWCompType::IDE_DEV);
|
2022-12-05 15:42:51 +00:00
|
|
|
|
2023-04-24 21:02:32 +00:00
|
|
|
this->device_type = type;
|
|
|
|
|
|
|
|
device_reset(false);
|
|
|
|
device_set_signature();
|
2022-12-07 23:16:10 +00:00
|
|
|
}
|
|
|
|
|
2023-04-24 21:02:32 +00:00
|
|
|
void AtaBaseDevice::device_reset(bool is_soft_reset) {
|
|
|
|
LOG_F(INFO, "%s: %s-reset triggered", this->name.c_str(),
|
|
|
|
is_soft_reset ? "soft" : "hard");
|
|
|
|
|
|
|
|
// Diagnostic code
|
|
|
|
this->r_error = 1; // device 0 passed, device 1 passed or not present
|
|
|
|
}
|
2022-12-07 23:16:10 +00:00
|
|
|
|
2023-04-24 21:02:32 +00:00
|
|
|
void AtaBaseDevice::device_set_signature() {
|
2022-12-07 23:16:10 +00:00
|
|
|
this->r_sect_count = 1;
|
|
|
|
this->r_sect_num = 1;
|
2023-04-24 21:02:32 +00:00
|
|
|
this->r_dev_head = 0;
|
2022-12-07 23:16:10 +00:00
|
|
|
|
2022-12-12 14:07:19 +00:00
|
|
|
// set protocol signature
|
|
|
|
if (this->device_type == DEVICE_TYPE_ATAPI) {
|
|
|
|
this->r_cylinder_lo = 0x14;
|
|
|
|
this->r_cylinder_hi = 0xEB;
|
2023-04-24 21:02:32 +00:00
|
|
|
this->r_status_save = this->r_status; // for restoring on the first command
|
|
|
|
this->r_status = 0;
|
2022-12-12 14:07:19 +00:00
|
|
|
} else { // assume ATA by default
|
|
|
|
this->r_cylinder_lo = 0;
|
|
|
|
this->r_cylinder_hi = 0;
|
2023-04-24 21:02:32 +00:00
|
|
|
this->r_status = DRDY | DSC; // DSC=1 is required for ATA devices
|
2022-12-12 14:07:19 +00:00
|
|
|
}
|
2022-10-22 18:41:52 +00:00
|
|
|
}
|
|
|
|
|
2022-12-07 21:36:25 +00:00
|
|
|
uint16_t AtaBaseDevice::read(const uint8_t reg_addr) {
|
|
|
|
switch (reg_addr) {
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::DATA:
|
2022-12-07 23:16:10 +00:00
|
|
|
LOG_F(WARNING, "Retrieving data from %s", this->name.c_str());
|
|
|
|
return 0xFFFFU;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::ERROR:
|
2022-12-07 23:16:10 +00:00
|
|
|
return this->r_error;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::SEC_COUNT:
|
2022-12-07 23:16:10 +00:00
|
|
|
return this->r_sect_count;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::SEC_NUM:
|
2022-12-07 23:16:10 +00:00
|
|
|
return this->r_sect_num;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::CYL_LOW:
|
2022-12-07 23:16:10 +00:00
|
|
|
return this->r_cylinder_lo;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::CYL_HIGH:
|
2022-12-07 23:16:10 +00:00
|
|
|
return this->r_cylinder_hi;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::DEVICE_HEAD:
|
2022-12-07 23:16:10 +00:00
|
|
|
return this->r_dev_head;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::STATUS:
|
2022-12-07 23:16:10 +00:00
|
|
|
// TODO: clear pending interrupt
|
|
|
|
return this->r_status;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::ALT_STATUS:
|
2022-12-07 23:16:10 +00:00
|
|
|
return this->r_status;
|
2022-10-22 18:41:52 +00:00
|
|
|
default:
|
2022-12-07 21:36:25 +00:00
|
|
|
LOG_F(WARNING, "Attempted to read unknown IDE register: %x", reg_addr);
|
|
|
|
return 0;
|
2022-10-22 18:41:52 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-12-07 21:36:25 +00:00
|
|
|
void AtaBaseDevice::write(const uint8_t reg_addr, const uint16_t value) {
|
|
|
|
switch (reg_addr) {
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::DATA:
|
2022-12-07 23:16:10 +00:00
|
|
|
LOG_F(WARNING, "Pushing data to %s", this->name.c_str());
|
2022-11-27 04:34:54 +00:00
|
|
|
break;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::FEATURES:
|
2022-12-07 23:16:10 +00:00
|
|
|
this->r_features = value;
|
2022-11-27 04:34:54 +00:00
|
|
|
break;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::SEC_COUNT:
|
2022-12-07 23:16:10 +00:00
|
|
|
this->r_sect_count = value;
|
2022-11-27 04:34:54 +00:00
|
|
|
break;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::SEC_NUM:
|
2022-12-07 23:16:10 +00:00
|
|
|
this->r_sect_num = value;
|
2022-11-27 04:34:54 +00:00
|
|
|
break;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::CYL_LOW:
|
2022-12-07 23:16:10 +00:00
|
|
|
this->r_cylinder_lo = value;
|
2022-11-27 04:34:54 +00:00
|
|
|
break;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::CYL_HIGH:
|
2022-12-07 23:16:10 +00:00
|
|
|
this->r_cylinder_hi = value;
|
2022-11-27 04:34:54 +00:00
|
|
|
break;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::DEVICE_HEAD:
|
2022-12-07 23:16:10 +00:00
|
|
|
this->r_dev_head = value;
|
2022-11-27 04:34:54 +00:00
|
|
|
break;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::COMMAND:
|
2022-12-07 23:16:10 +00:00
|
|
|
this->r_command = value;
|
2022-12-11 23:08:43 +00:00
|
|
|
if (is_selected() || this->r_command == DIAGNOSTICS) {
|
2022-12-07 23:16:10 +00:00
|
|
|
perform_command();
|
|
|
|
}
|
2022-11-27 04:34:54 +00:00
|
|
|
break;
|
2022-12-11 23:08:43 +00:00
|
|
|
case ATA_Reg::DEV_CTRL:
|
2023-04-24 21:02:32 +00:00
|
|
|
this->device_control(value);
|
2022-11-27 04:34:54 +00:00
|
|
|
break;
|
2022-10-22 18:41:52 +00:00
|
|
|
default:
|
2022-12-07 21:36:25 +00:00
|
|
|
LOG_F(WARNING, "Attempted to write unknown IDE register: %x", reg_addr);
|
2022-10-22 18:41:52 +00:00
|
|
|
}
|
2022-10-30 22:38:09 +00:00
|
|
|
}
|
2023-04-24 21:02:32 +00:00
|
|
|
|
|
|
|
void AtaBaseDevice::device_control(const uint8_t new_ctrl) {
|
|
|
|
// perform ATA Soft Reset if requested
|
|
|
|
if ((this->r_dev_ctrl ^ new_ctrl) & SRST) {
|
|
|
|
if (new_ctrl & SRST) { // SRST set -> phase 0 aka self-test
|
|
|
|
this->r_status |= BSY;
|
|
|
|
this->device_reset(true);
|
|
|
|
} else { // SRST cleared -> phase 1 aka signature and error report
|
|
|
|
if (!this->my_dev_id && this->host_obj->is_device1_present())
|
|
|
|
this->r_error |= 0x80;
|
|
|
|
this->device_set_signature();
|
|
|
|
this->r_status &= ~BSY;
|
|
|
|
|
|
|
|
if (this->my_dev_id && this->r_error == 1) {
|
|
|
|
this->host_obj->assert_pdiag();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
this->r_dev_ctrl = new_ctrl;
|
|
|
|
}
|