2022-10-22 18:41:52 +00:00
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/*
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DingusPPC - The Experimental PowerPC Macintosh emulator
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2023-04-24 21:02:32 +00:00
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Copyright (C) 2018-23 divingkatae and maximum
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2022-10-22 18:41:52 +00:00
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(theweirdo) spatium
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(Contact divingkatae#1017 or powermax#2286 on Discord for more info)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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2023-05-15 15:56:14 +00:00
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/** @file Basic ATA device emulation. */
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2022-10-22 18:41:52 +00:00
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2022-12-07 21:36:25 +00:00
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#include <devices/common/ata/atabasedevice.h>
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#include <devices/common/ata/atadefs.h>
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2023-11-03 07:21:33 +00:00
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#include <devices/common/ata/idechannel.h>
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2022-10-22 18:41:52 +00:00
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#include <loguru.hpp>
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2022-12-07 21:36:25 +00:00
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#include <cinttypes>
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2022-10-22 18:41:52 +00:00
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2022-12-08 07:04:09 +00:00
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using namespace ata_interface;
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2022-10-22 18:41:52 +00:00
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2023-04-24 21:02:32 +00:00
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AtaBaseDevice::AtaBaseDevice(const std::string name, uint8_t type) {
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2022-12-07 21:36:25 +00:00
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this->set_name(name);
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2022-10-22 18:41:52 +00:00
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supports_types(HWCompType::IDE_DEV);
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2022-12-05 15:42:51 +00:00
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2023-04-24 21:02:32 +00:00
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this->device_type = type;
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device_reset(false);
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device_set_signature();
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2022-12-07 23:16:10 +00:00
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}
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2023-04-24 21:02:32 +00:00
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void AtaBaseDevice::device_reset(bool is_soft_reset) {
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LOG_F(INFO, "%s: %s-reset triggered", this->name.c_str(),
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is_soft_reset ? "soft" : "hard");
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// Diagnostic code
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this->r_error = 1; // device 0 passed, device 1 passed or not present
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}
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2022-12-07 23:16:10 +00:00
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2023-04-24 21:02:32 +00:00
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void AtaBaseDevice::device_set_signature() {
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2022-12-07 23:16:10 +00:00
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this->r_sect_count = 1;
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this->r_sect_num = 1;
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2023-04-24 21:02:32 +00:00
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this->r_dev_head = 0;
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2022-12-07 23:16:10 +00:00
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2023-05-15 15:56:14 +00:00
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// set ATA protocol signature
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this->r_cylinder_lo = 0;
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this->r_cylinder_hi = 0;
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this->r_status = DRDY | DSC; // DSC=1 is required for ATA devices
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2022-10-22 18:41:52 +00:00
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}
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2022-12-07 21:36:25 +00:00
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uint16_t AtaBaseDevice::read(const uint8_t reg_addr) {
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switch (reg_addr) {
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::DATA:
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2023-11-22 16:00:19 +00:00
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if (this->has_data()) {
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uint16_t ret_data = this->get_data();
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this->xfer_cnt -= 2;
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if (this->xfer_cnt <= 0) {
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this->r_status &= ~DRQ;
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}
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return ret_data;
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} else {
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return 0xFFFFU;
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}
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::ERROR:
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2022-12-07 23:16:10 +00:00
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return this->r_error;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::SEC_COUNT:
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2022-12-07 23:16:10 +00:00
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return this->r_sect_count;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::SEC_NUM:
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2022-12-07 23:16:10 +00:00
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return this->r_sect_num;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::CYL_LOW:
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2022-12-07 23:16:10 +00:00
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return this->r_cylinder_lo;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::CYL_HIGH:
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2022-12-07 23:16:10 +00:00
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return this->r_cylinder_hi;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::DEVICE_HEAD:
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2022-12-07 23:16:10 +00:00
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return this->r_dev_head;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::STATUS:
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2023-11-22 16:00:19 +00:00
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this->update_intrq(0);
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2022-12-07 23:16:10 +00:00
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return this->r_status;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::ALT_STATUS:
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2022-12-07 23:16:10 +00:00
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return this->r_status;
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2022-10-22 18:41:52 +00:00
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default:
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2022-12-07 21:36:25 +00:00
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LOG_F(WARNING, "Attempted to read unknown IDE register: %x", reg_addr);
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return 0;
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2022-10-22 18:41:52 +00:00
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}
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}
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2022-12-07 21:36:25 +00:00
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void AtaBaseDevice::write(const uint8_t reg_addr, const uint16_t value) {
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switch (reg_addr) {
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::DATA:
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2023-11-22 16:00:19 +00:00
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if (this->has_data())
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LOG_F(WARNING, "Pushing data to %s", this->name.c_str());
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2022-11-27 04:34:54 +00:00
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break;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::FEATURES:
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2022-12-07 23:16:10 +00:00
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this->r_features = value;
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2022-11-27 04:34:54 +00:00
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break;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::SEC_COUNT:
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2022-12-07 23:16:10 +00:00
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this->r_sect_count = value;
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2022-11-27 04:34:54 +00:00
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break;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::SEC_NUM:
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2022-12-07 23:16:10 +00:00
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this->r_sect_num = value;
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2022-11-27 04:34:54 +00:00
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break;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::CYL_LOW:
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2022-12-07 23:16:10 +00:00
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this->r_cylinder_lo = value;
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2022-11-27 04:34:54 +00:00
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break;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::CYL_HIGH:
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2022-12-07 23:16:10 +00:00
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this->r_cylinder_hi = value;
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2022-11-27 04:34:54 +00:00
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break;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::DEVICE_HEAD:
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2022-12-07 23:16:10 +00:00
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this->r_dev_head = value;
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2022-11-27 04:34:54 +00:00
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break;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::COMMAND:
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2022-12-07 23:16:10 +00:00
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this->r_command = value;
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2022-12-11 23:08:43 +00:00
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if (is_selected() || this->r_command == DIAGNOSTICS) {
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2022-12-07 23:16:10 +00:00
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perform_command();
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}
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2022-11-27 04:34:54 +00:00
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break;
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2022-12-11 23:08:43 +00:00
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case ATA_Reg::DEV_CTRL:
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2023-04-24 21:02:32 +00:00
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this->device_control(value);
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2022-11-27 04:34:54 +00:00
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break;
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2022-10-22 18:41:52 +00:00
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default:
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2022-12-07 21:36:25 +00:00
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LOG_F(WARNING, "Attempted to write unknown IDE register: %x", reg_addr);
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2022-10-22 18:41:52 +00:00
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}
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2022-10-30 22:38:09 +00:00
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}
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2023-04-24 21:02:32 +00:00
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void AtaBaseDevice::device_control(const uint8_t new_ctrl) {
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// perform ATA Soft Reset if requested
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if ((this->r_dev_ctrl ^ new_ctrl) & SRST) {
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if (new_ctrl & SRST) { // SRST set -> phase 0 aka self-test
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this->r_status |= BSY;
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this->device_reset(true);
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} else { // SRST cleared -> phase 1 aka signature and error report
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if (!this->my_dev_id && this->host_obj->is_device1_present())
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this->r_error |= 0x80;
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this->device_set_signature();
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this->r_status &= ~BSY;
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if (this->my_dev_id && this->r_error == 1) {
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this->host_obj->assert_pdiag();
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}
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}
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}
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this->r_dev_ctrl = new_ctrl;
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}
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2023-06-18 21:30:06 +00:00
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void AtaBaseDevice::update_intrq(uint8_t new_intrq_state) {
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if (!this->is_selected() || (this->r_dev_ctrl & IEN))
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return;
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this->intrq_state = new_intrq_state;
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this->host_obj->report_intrq(new_intrq_state);
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}
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2023-11-22 15:58:25 +00:00
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void AtaBaseDevice::signal_data_ready() {
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this->r_status |= DRQ;
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this->r_status &= ~BSY;
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this->update_intrq(1);
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}
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