escc: Init or reset values in constructor.

Constructor should set all values to something so they are not random.
This commit is contained in:
joevt 2024-04-26 18:12:06 -07:00 committed by dingusdev
parent 5710758dd7
commit 19f06fb3a2
2 changed files with 10 additions and 6 deletions

View File

@ -60,13 +60,15 @@ EsccController::EsccController()
);
this->ch_b->attach_backend(CHARIO_BE_NULL);
this->reg_ptr = WR0; // or RR0
this->master_int_cntrl = 0;
this->reset();
}
void EsccController::reset()
{
this->master_int_cntrl &= ~(WR9_NO_VECTOR | WR9_VECTOR_INCLUDES_STATUS);
this->master_int_cntrl |= WR9_FORCE_HARDWARE_RESET;
this->reg_ptr = WR0; // or RR0
this->ch_a->reset(true);
this->ch_b->reset(true);
@ -209,6 +211,8 @@ void EsccChannel::reset(bool hw_reset)
We use hex values here instead of enums to more
easily compare with the z85c30 data sheet.
*/
this->write_regs[WR0] = 0;
this->write_regs[WR1] &= 0x24;
this->write_regs[WR3] &= 0xFE;
this->write_regs[WR4] |= 0x04;

View File

@ -134,9 +134,9 @@ private:
DmaBidirChannel* dma_ch[2];
std::string name;
uint8_t read_regs[16];
uint8_t write_regs[16];
uint8_t wr7_enh;
uint8_t read_regs[16] = {};
uint8_t write_regs[16] = {};
uint8_t wr7_enh = 0;
uint8_t dpll_active;
DpllMode dpll_mode;
uint8_t dpll_clock_src;
@ -177,8 +177,8 @@ private:
int reg_ptr; // register pointer for reading/writing (same for both channels)
uint8_t master_int_cntrl;
uint8_t int_vec;
uint8_t master_int_cntrl = 0;
uint8_t int_vec = 0;
};
#endif // ESCC_H