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ppcopcodes: Use < 0 instead of & 0x8000000.

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This commit is contained in:
joevt 2024-04-08 21:50:27 -07:00 committed by dingusdev
parent cb05bd05eb
commit 29a832c68d
2 changed files with 9 additions and 9 deletions
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10
cpu/ppc/poweropcodes.cpp
View File

@ -281,7 +281,7 @@ template void dppc_interpreter::power_mul<RC1, OV1>();
template <field_rc rec, field_ov ov> template <field_rc rec, field_ov ov>
void dppc_interpreter::power_nabs() { void dppc_interpreter::power_nabs() {
ppc_grab_regsda(ppc_cur_instruction); ppc_grab_regsda(ppc_cur_instruction);
uint32_t ppc_result_d = ppc_result_a & 0x80000000 ? ppc_result_a : -ppc_result_a; uint32_t ppc_result_d = (int32_t(ppc_result_a) < 0) ? ppc_result_a : -ppc_result_a;
if (rec) if (rec)
ppc_changecrf0(ppc_result_d); ppc_changecrf0(ppc_result_d);
@ -317,7 +317,7 @@ template <field_rc rec>
void dppc_interpreter::power_rrib() { void dppc_interpreter::power_rrib() {
ppc_grab_regssab(ppc_cur_instruction); ppc_grab_regssab(ppc_cur_instruction);
if (ppc_result_d & 0x80000000) { if (int32_t(ppc_result_d) < 0) {
ppc_result_a |= ((ppc_result_d & 0x80000000) >> ppc_result_b); ppc_result_a |= ((ppc_result_d & 0x80000000) >> ppc_result_b);
} else { } else {
ppc_result_a &= ~((ppc_result_d & 0x80000000) >> ppc_result_b); ppc_result_a &= ~((ppc_result_d & 0x80000000) >> ppc_result_b);
@ -454,7 +454,7 @@ void dppc_interpreter::power_sraiq() {
ppc_result_a = (int32_t)ppc_result_d >> rot_sh; ppc_result_a = (int32_t)ppc_result_d >> rot_sh;
ppc_state.spr[SPR::MQ] = (ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh)); ppc_state.spr[SPR::MQ] = (ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh));
if ((ppc_result_d & 0x80000000UL) && (ppc_result_d & mask)) { if ((int32_t(ppc_result_d) < 0) && (ppc_result_d & mask)) {
ppc_state.spr[SPR::XER] |= XER::CA; ppc_state.spr[SPR::XER] |= XER::CA;
} else { } else {
ppc_state.spr[SPR::XER] &= ~XER::CA; ppc_state.spr[SPR::XER] &= ~XER::CA;
@ -477,7 +477,7 @@ void dppc_interpreter::power_sraq() {
ppc_result_a = (int32_t)ppc_result_d >> rot_sh; ppc_result_a = (int32_t)ppc_result_d >> rot_sh;
ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh))); ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
if ((ppc_result_d & 0x80000000UL) && (ppc_result_d & mask)) { if ((int32_t(ppc_result_d) < 0) && (ppc_result_d & mask)) {
ppc_state.spr[SPR::XER] |= XER::CA; ppc_state.spr[SPR::XER] |= XER::CA;
} else { } else {
ppc_state.spr[SPR::XER] &= ~XER::CA; ppc_state.spr[SPR::XER] &= ~XER::CA;
@ -519,7 +519,7 @@ void dppc_interpreter::power_srea() {
ppc_result_a = (int32_t)ppc_result_d >> rot_sh; ppc_result_a = (int32_t)ppc_result_d >> rot_sh;
ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh))); ppc_state.spr[SPR::MQ] = ((ppc_result_d << rot_sh) | (ppc_result_d >> (32 - rot_sh)));
if ((ppc_result_d & 0x80000000UL) && (ppc_result_d & rot_sh)) { if ((int32_t(ppc_result_d) < 0) && (ppc_result_d & rot_sh)) {
ppc_state.spr[SPR::XER] |= XER::CA; ppc_state.spr[SPR::XER] |= XER::CA;
} else { } else {
ppc_state.spr[SPR::XER] &= ~XER::CA; ppc_state.spr[SPR::XER] &= ~XER::CA;

8
cpu/ppc/ppcopcodes.cpp
View File

@ -69,7 +69,7 @@ inline void ppc_carry_sub(uint32_t a, uint32_t b) {
// Affects the XER register's SO and OV Bits // Affects the XER register's SO and OV Bits
inline void ppc_setsoov(uint32_t a, uint32_t b, uint32_t d) { inline void ppc_setsoov(uint32_t a, uint32_t b, uint32_t d) {
if ((a ^ b) & (a ^ d) & 0x80000000UL) { if (int32_t((a ^ b) & (a ^ d)) < 0) {
ppc_state.spr[SPR::XER] |= XER::SO | XER::OV; ppc_state.spr[SPR::XER] |= XER::SO | XER::OV;
} else { } else {
ppc_state.spr[SPR::XER] &= ~XER::OV; ppc_state.spr[SPR::XER] &= ~XER::OV;
@ -533,7 +533,7 @@ void dppc_interpreter::ppc_divw() {
if (!ppc_result_b) { // handle the "anything / 0" case if (!ppc_result_b) { // handle the "anything / 0" case
ppc_result_d = 0; // tested on G4 in Mac OS X 10.4 and Open Firmware. ppc_result_d = 0; // tested on G4 in Mac OS X 10.4 and Open Firmware.
// ppc_result_d = (ppc_result_a & 0x80000000) ? -1 : 0; /* UNDOCUMENTED! */ // ppc_result_d = (int32_t(ppc_result_a) < 0) ? -1 : 0; /* UNDOCUMENTED! */
if (ov) if (ov)
ppc_state.spr[SPR::XER] |= XER::SO | XER::OV; ppc_state.spr[SPR::XER] |= XER::SO | XER::OV;
@ -632,7 +632,7 @@ void dppc_interpreter::ppc_sraw() {
} else { } else {
uint32_t shift = ppc_result_b & 0x1F; uint32_t shift = ppc_result_b & 0x1F;
ppc_result_a = int32_t(ppc_result_d) >> shift; ppc_result_a = int32_t(ppc_result_d) >> shift;
if ((ppc_result_d & 0x80000000UL) && (ppc_result_d & ((1U << shift) - 1))) if ((int32_t(ppc_result_d) < 0) && (ppc_result_d & ((1U << shift) - 1)))
ppc_state.spr[SPR::XER] |= XER::CA; ppc_state.spr[SPR::XER] |= XER::CA;
} }
@ -652,7 +652,7 @@ void dppc_interpreter::ppc_srawi() {
// clear XER[CA] by default // clear XER[CA] by default
ppc_state.spr[SPR::XER] &= ~XER::CA; ppc_state.spr[SPR::XER] &= ~XER::CA;
if ((ppc_result_d & 0x80000000UL) && (ppc_result_d & ((1U << rot_sh) - 1))) if ((int32_t(ppc_result_d) < 0) && (ppc_result_d & ((1U << rot_sh) - 1)))
ppc_state.spr[SPR::XER] |= XER::CA; ppc_state.spr[SPR::XER] |= XER::CA;
ppc_result_a = int32_t(ppc_result_d) >> rot_sh; ppc_result_a = int32_t(ppc_result_d) >> rot_sh;