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ppcopcodes: Cleanup.
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5bbf5ee3af
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@ -66,7 +66,7 @@ void ppc_grab_regsdasimm() {
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inline void ppc_grab_regsdauimm() {
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reg_d = (ppc_cur_instruction >> 21) & 31;
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reg_a = (ppc_cur_instruction >> 16) & 31;
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uimm = ppc_cur_instruction & 0xFFFFUL;
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uimm = uint16_t(ppc_cur_instruction);
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ppc_result_a = ppc_state.gpr[reg_a];
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}
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@ -79,7 +79,7 @@ inline void ppc_grab_regsasimm() {
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inline void ppc_grab_regssauimm() {
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reg_s = (ppc_cur_instruction >> 21) & 31;
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reg_a = (ppc_cur_instruction >> 16) & 31;
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uimm = ppc_cur_instruction & 0xFFFFUL;
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uimm = uint16_t(ppc_cur_instruction);
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ppc_result_d = ppc_state.gpr[reg_s];
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ppc_result_a = ppc_state.gpr[reg_a];
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}
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@ -733,7 +733,7 @@ void dppc_interpreter::ppc_srawi() {
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if ((ppc_result_d & 0x80000000UL) && (ppc_result_d & ((1U << shift) - 1)))
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ppc_state.spr[SPR::XER] |= XER::CA;
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ppc_result_a = int32_t(ppc_result_d) >> shift;
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ppc_result_a = int32_t(ppc_result_d) >> shift;
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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@ -1057,10 +1057,10 @@ void dppc_interpreter::ppc_mftb() {
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switch (ref_spr) {
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case SPR::TBL_U:
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ppc_state.gpr[reg_d] = tbr_value & 0xFFFFFFFFUL;
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ppc_state.gpr[reg_d] = uint32_t(tbr_value);
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break;
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case SPR::TBU_U:
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ppc_state.gpr[reg_d] = (tbr_value >> 32) & 0xFFFFFFFFUL;
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ppc_state.gpr[reg_d] = uint32_t(tbr_value >> 32);
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break;
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default:
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ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::ILLEGAL_OP);
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@ -1097,7 +1097,7 @@ void dppc_interpreter::ppc_mcrxr() {
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void dppc_interpreter::ppc_extsb() {
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ppc_grab_regssa();
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ppc_result_a = (int32_t(int8_t(ppc_result_d)));
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ppc_result_a = int32_t(int8_t(ppc_result_d));
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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@ -1107,7 +1107,7 @@ void dppc_interpreter::ppc_extsb() {
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void dppc_interpreter::ppc_extsh() {
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ppc_grab_regssa();
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ppc_result_a = (int32_t(int16_t(ppc_result_d)));
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ppc_result_a = int32_t(int16_t(ppc_result_d));
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if (rc_flag)
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ppc_changecrf0(ppc_result_a);
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@ -1236,7 +1236,7 @@ void dppc_interpreter::ppc_bcctr() {
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(!(ppc_state.cr & (0x80000000UL >> br_bi)) == !(br_bo & 0x08));
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if (cnd_ok) {
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ppc_next_instruction_address = (ppc_state.spr[SPR::CTR] & 0xFFFFFFFCUL);
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ppc_next_instruction_address = (ppc_state.spr[SPR::CTR] & ~3UL);
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exec_flags = EXEF_BRANCH;
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}
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}
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@ -1249,7 +1249,7 @@ void dppc_interpreter::ppc_bcctrl() {
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(!(ppc_state.cr & (0x80000000UL >> br_bi)) == !(br_bo & 0x08));
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if (cnd_ok) {
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ppc_next_instruction_address = (ppc_state.spr[SPR::CTR] & 0xFFFFFFFCUL);
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ppc_next_instruction_address = (ppc_state.spr[SPR::CTR] & ~3UL);
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exec_flags = EXEF_BRANCH;
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}
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ppc_state.spr[SPR::LR] = ppc_state.pc + 4;
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@ -1268,7 +1268,7 @@ void dppc_interpreter::ppc_bclr() {
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cnd_ok = (br_bo & 0x10) | (!(ppc_state.cr & (0x80000000UL >> br_bi)) == !(br_bo & 0x08));
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if (ctr_ok && cnd_ok) {
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ppc_next_instruction_address = (ppc_state.spr[SPR::LR] & 0xFFFFFFFCUL);
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ppc_next_instruction_address = (ppc_state.spr[SPR::LR] & ~3UL);
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exec_flags = EXEF_BRANCH;
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}
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}
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@ -1286,7 +1286,7 @@ void dppc_interpreter::ppc_bclrl() {
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cnd_ok = (br_bo & 0x10) | (!(ppc_state.cr & (0x80000000UL >> br_bi)) == !(br_bo & 0x08));
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if (ctr_ok && cnd_ok) {
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ppc_next_instruction_address = (ppc_state.spr[SPR::LR] & 0xFFFFFFFCUL);
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ppc_next_instruction_address = (ppc_state.spr[SPR::LR] & ~3UL);
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exec_flags = EXEF_BRANCH;
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}
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ppc_state.spr[SPR::LR] = ppc_state.pc + 4;
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@ -1457,7 +1457,7 @@ void dppc_interpreter::ppc_rfi() {
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// generate External Interrupt Exception
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// if CPU interrupt line is still asserted
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if (ppc_state.msr & MSR::EE && int_pin) {
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uint32_t save_srr0 = ppc_state.spr[SPR::SRR0] & 0xFFFFFFFCUL;
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uint32_t save_srr0 = ppc_state.spr[SPR::SRR0] & ~3UL;
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ppc_exception_handler(Except_Type::EXC_EXT_INT, 0);
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ppc_state.spr[SPR::SRR0] = save_srr0;
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return;
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@ -1466,13 +1466,13 @@ void dppc_interpreter::ppc_rfi() {
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if ((ppc_state.msr & MSR::EE) && dec_exception_pending) {
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dec_exception_pending = false;
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//LOG_F(WARNING, "decrementer exception from rfi msr:0x%X", ppc_state.msr);
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uint32_t save_srr0 = ppc_state.spr[SPR::SRR0] & 0xFFFFFFFCUL;
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uint32_t save_srr0 = ppc_state.spr[SPR::SRR0] & ~3UL;
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ppc_exception_handler(Except_Type::EXC_DECR, 0);
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ppc_state.spr[SPR::SRR0] = save_srr0;
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return;
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}
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ppc_next_instruction_address = ppc_state.spr[SPR::SRR0] & 0xFFFFFFFCUL;
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ppc_next_instruction_address = ppc_state.spr[SPR::SRR0] & ~3UL;
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do_ctx_sync(); // RFI is context synchronizing
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@ -2067,7 +2067,7 @@ void dppc_interpreter::ppc_lmw() {
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num_int_loads++;
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#endif
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ppc_grab_regsda();
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ppc_effective_address = int32_t(int16_t(ppc_cur_instruction & 0xFFFF));
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ppc_effective_address = int32_t(int16_t(ppc_cur_instruction));
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ppc_effective_address += (reg_a > 0) ? ppc_result_a : 0;
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// How many words to load in memory - using a do-while for this
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do {
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