From 2fb23e210eba729b67b0c0613cdbd46697c73796 Mon Sep 17 00:00:00 2001
From: Maxim Poliakovski <maximumspatium@googlemail.com>
Date: Fri, 10 Feb 2023 17:44:16 +0100
Subject: [PATCH] Grackle: implement some register reads to avoid warnings.

---
 devices/memctrl/mpc106.cpp | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/devices/memctrl/mpc106.cpp b/devices/memctrl/mpc106.cpp
index ffd5294..461bd73 100644
--- a/devices/memctrl/mpc106.cpp
+++ b/devices/memctrl/mpc106.cpp
@@ -171,6 +171,18 @@ uint32_t MPC106::pci_cfg_read(uint32_t reg_offs, AccessDetails &details) {
         return 0;
     case GrackleReg::PMCR1:
         return (this->odcr << 24) | (this->pmcr2 << 16) | this->pmcr1;
+    case GrackleReg::MSAR1:
+    case GrackleReg::MSAR2:
+        return this->mem_start[(reg_offs >> 2) & 1];
+    case GrackleReg::EMSAR1:
+    case GrackleReg::EMSAR2:
+        return this->ext_mem_start[(reg_offs >> 2) & 1];
+    case GrackleReg::MEAR1:
+    case GrackleReg::MEAR2:
+        return this->mem_end[(reg_offs >> 2) & 1];
+    case GrackleReg::EMEAR1:
+    case GrackleReg::EMEAR2:
+        return this->ext_mem_end[(reg_offs >> 2) & 1];
     case GrackleReg::MBER:
         return this->mem_bank_en;
     case GrackleReg::PICR1:
@@ -179,6 +191,12 @@ uint32_t MPC106::pci_cfg_read(uint32_t reg_offs, AccessDetails &details) {
         return this->picr2;
     case GrackleReg::MCCR1:
         return this->mccr1;
+    case GrackleReg::MCCR2:
+        return this->mccr2;
+    case GrackleReg::MCCR3:
+        return this->mccr3;
+    case GrackleReg::MCCR4:
+        return this->mccr4;
     default:
         LOG_READ_UNIMPLEMENTED_CONFIG_REGISTER();
     }