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Grackle: implement some register reads to avoid warnings.
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@ -171,6 +171,18 @@ uint32_t MPC106::pci_cfg_read(uint32_t reg_offs, AccessDetails &details) {
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return 0;
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return 0;
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case GrackleReg::PMCR1:
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case GrackleReg::PMCR1:
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return (this->odcr << 24) | (this->pmcr2 << 16) | this->pmcr1;
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return (this->odcr << 24) | (this->pmcr2 << 16) | this->pmcr1;
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case GrackleReg::MSAR1:
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case GrackleReg::MSAR2:
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return this->mem_start[(reg_offs >> 2) & 1];
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case GrackleReg::EMSAR1:
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case GrackleReg::EMSAR2:
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return this->ext_mem_start[(reg_offs >> 2) & 1];
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case GrackleReg::MEAR1:
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case GrackleReg::MEAR2:
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return this->mem_end[(reg_offs >> 2) & 1];
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case GrackleReg::EMEAR1:
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case GrackleReg::EMEAR2:
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return this->ext_mem_end[(reg_offs >> 2) & 1];
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case GrackleReg::MBER:
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case GrackleReg::MBER:
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return this->mem_bank_en;
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return this->mem_bank_en;
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case GrackleReg::PICR1:
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case GrackleReg::PICR1:
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@ -179,6 +191,12 @@ uint32_t MPC106::pci_cfg_read(uint32_t reg_offs, AccessDetails &details) {
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return this->picr2;
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return this->picr2;
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case GrackleReg::MCCR1:
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case GrackleReg::MCCR1:
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return this->mccr1;
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return this->mccr1;
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case GrackleReg::MCCR2:
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return this->mccr2;
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case GrackleReg::MCCR3:
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return this->mccr3;
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case GrackleReg::MCCR4:
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return this->mccr4;
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default:
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default:
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LOG_READ_UNIMPLEMENTED_CONFIG_REGISTER();
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LOG_READ_UNIMPLEMENTED_CONFIG_REGISTER();
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}
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}
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