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Merge pull request #8 from maximumspatium/master
Fix for conditional branches and some more cleanup.
This commit is contained in:
dingusdev
GitHub
commit
53cb4206d0
@ -197,7 +197,7 @@ extern void ppc_grab_regssab();
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extern void ppc_grab_regsdasimm();
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extern void ppc_grab_regsdauimm();
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extern void ppc_grab_regssasimm();
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extern void ppc_grab_regsasimm();
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extern void ppc_grab_regssauimm();
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extern void ppc_grab_regsfpdb();
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@ -772,22 +772,21 @@ void address_quickgrab_translate(uint32_t address_grab, uint8_t num_bytes)
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//regular grabbing
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else if (address_grab < 0x80000000){
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if ((address_grab >= 0x40000000) && (address_grab < 0x40400000) && is_nubus){
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storage_area = address_grab % rom_file_setsize;
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grab_macmem_ptr = machine_sysrom_mem;
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ppc_set_return_val(storage_area, num_bytes);
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return;
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}
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if (mpc106_check_membound(address_grab)){
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if (address_grab > 0x03ffffff){ //for debug purposes
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storage_area = address_grab;
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grab_macmem_ptr = machine_sysram_mem;
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}
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else if ((address_grab >= 0x40000000) && (address_grab < 0x40400000)){
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if (is_nubus){
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storage_area = address_grab % rom_file_setsize;
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grab_macmem_ptr = machine_sysrom_mem;
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ppc_set_return_val(storage_area, num_bytes);
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return;
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}
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else{
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storage_area = address_grab;
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grab_macmem_ptr = machine_sysram_mem;
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}
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storage_area = address_grab;
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grab_macmem_ptr = machine_sysram_mem;
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}
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else if ((address_grab >= 0x5fffe000) && (address_grab <= 0x5fffffff)){
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storage_area = address_grab % 0x2000;
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227
ppcopcodes.cpp
227
ppcopcodes.cpp
@ -30,8 +30,6 @@
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uint32_t xercon;
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uint32_t cmp_c;
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uint32_t crm;
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uint32_t br_bo;
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uint32_t br_bi;
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uint32_t rot_sh;
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uint32_t rot_mb;
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uint32_t rot_me;
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@ -43,7 +41,6 @@
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uint32_t ppc_to;
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int32_t simm;
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int32_t adr_li;
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int32_t br_bd;
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//Used for GP calcs
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uint32_t ppc_result_a = 0;
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@ -115,12 +112,10 @@ void ppc_grab_regsdauimm(){
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ppc_result_a = ppc_state.ppc_gpr[reg_a];
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}
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void ppc_grab_regssasimm(){
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reg_s = (ppc_cur_instruction >> 21) & 31;
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void ppc_grab_regsasimm(){
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reg_a = (ppc_cur_instruction >> 16) & 31;
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simm = (int32_t)((int16_t)((ppc_cur_instruction) & 65535));
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simm = (int32_t)((int16_t)(ppc_cur_instruction & 65535));
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ppc_result_a = ppc_state.ppc_gpr[reg_a];
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ppc_result_d = ppc_state.ppc_gpr[reg_s];
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}
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void ppc_grab_regssauimm(){
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@ -1560,41 +1555,39 @@ void ppc_bla(){
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grab_branch = 1;
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}
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void ppc_bc(){
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br_bo = (ppc_cur_instruction >> 21) & 31;
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br_bi = (ppc_cur_instruction >> 16) & 31;
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br_bd = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFC));
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uint32_t ctr_ok = 1;
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uint32_t cnd_ok = 1;
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void ppc_bc()
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{
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uint32_t ctr_ok;
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uint32_t cnd_ok;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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int32_t br_bd = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFC));
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if (!(br_bo & 0x04)){
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(ppc_state.ppc_spr[9])--;
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(ppc_state.ppc_spr[9])--; /* decrement CTR */
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}
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ctr_ok = ((br_bo & 0x04) || ((ppc_state.ppc_spr[9] != 0) ^ (br_bo & 0x02)));
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cnd_ok = ((br_bo & 0x10) || !((ppc_state.ppc_cr & (0x80000000 >> br_bi)) ^ (br_bo & 0x08)));
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ctr_ok = (br_bo & 0x04) || ((ppc_state.ppc_spr[9] != 0) == !(br_bo & 0x02));
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cnd_ok = (br_bo & 0x10) || (!(ppc_state.ppc_cr & (0x80000000 >> br_bi)) == !(br_bo & 0x08));
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if (ctr_ok && cnd_ok){
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ppc_next_instruction_address = (ppc_state.ppc_pc + br_bd);
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grab_branch = 1;
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}
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/*
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else{
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printf("BRANCH FAILED: %d %d", ctr_ok, cnd_ok);
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}*/
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}
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void ppc_bca(){
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br_bo = (ppc_cur_instruction >> 21) & 31;
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br_bi = (ppc_cur_instruction >> 16) & 31;
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br_bd = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFC));
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uint32_t ctr_ok = 1;
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uint32_t cnd_ok = 1;
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void ppc_bca()
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{
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uint32_t ctr_ok;
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uint32_t cnd_ok;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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int32_t br_bd = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFC));
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if (!(br_bo & 0x04)){
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(ppc_state.ppc_spr[9])--;
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(ppc_state.ppc_spr[9])--; /* decrement CTR */
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}
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ctr_ok = ((br_bo & 0x04) || ((ppc_state.ppc_spr[9] != 0) ^ (br_bo & 0x02)));
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cnd_ok = ((br_bo & 0x10) || !((ppc_state.ppc_cr & (0x80000000 >> br_bi)) ^ (br_bo & 0x08)));
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ctr_ok = (br_bo & 0x04) || ((ppc_state.ppc_spr[9] != 0) == !(br_bo & 0x02));
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cnd_ok = (br_bo & 0x10) || (!(ppc_state.ppc_cr & (0x80000000 >> br_bi)) == !(br_bo & 0x08));
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if (ctr_ok && cnd_ok){
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ppc_next_instruction_address = br_bd;
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@ -1602,19 +1595,19 @@ void ppc_bca(){
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}
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}
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void ppc_bcl(){
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br_bo = (ppc_cur_instruction >> 21) & 31;
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br_bi = (ppc_cur_instruction >> 16) & 31;
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br_bd = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFC));
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uint32_t ctr_ok = 1;
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uint32_t cnd_ok = 1;
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void ppc_bcl()
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{
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uint32_t ctr_ok;
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uint32_t cnd_ok;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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int32_t br_bd = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFC));
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if (!(br_bo & 0x04)){
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(ppc_state.ppc_spr[9])--;
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(ppc_state.ppc_spr[9])--; /* decrement CTR */
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}
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ctr_ok = ((br_bo & 0x04) || ((ppc_state.ppc_spr[9] != 0) ^ (br_bo & 0x02)));
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cnd_ok = ((br_bo & 0x10) || !((ppc_state.ppc_cr & (0x80000000 >> br_bi)) ^ (br_bo & 0x08)));
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ctr_ok = (br_bo & 0x04) || ((ppc_state.ppc_spr[9] != 0) == !(br_bo & 0x02));
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cnd_ok = (br_bo & 0x10) || (!(ppc_state.ppc_cr & (0x80000000 >> br_bi)) == !(br_bo & 0x08));
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if (ctr_ok && cnd_ok){
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ppc_next_instruction_address = (ppc_state.ppc_pc + br_bd);
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@ -1623,19 +1616,19 @@ void ppc_bcl(){
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ppc_state.ppc_spr[8] = ppc_state.ppc_pc + 4;
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}
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void ppc_bcla(){
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br_bo = (ppc_cur_instruction >> 21) & 31;
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br_bi = (ppc_cur_instruction >> 16) & 31;
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br_bd = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFC));
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uint32_t ctr_ok = 1;
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uint32_t cnd_ok = 1;
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void ppc_bcla()
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{
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uint32_t ctr_ok;
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uint32_t cnd_ok;
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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int32_t br_bd = (int32_t)((int16_t)(ppc_cur_instruction & 0xFFFC));
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if (!(br_bo & 0x04)){
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(ppc_state.ppc_spr[9])--;
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(ppc_state.ppc_spr[9])--; /* decrement CTR */
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}
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ctr_ok = ((br_bo & 0x04) || ((ppc_state.ppc_spr[9] != 0) ^ (br_bo & 0x02)));
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cnd_ok = ((br_bo & 0x10) || !((ppc_state.ppc_cr & (0x80000000 >> br_bi)) ^ (br_bo & 0x08)));
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ctr_ok = (br_bo & 0x04) || ((ppc_state.ppc_spr[9] != 0) == !(br_bo & 0x02));
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cnd_ok = (br_bo & 0x10) || (!(ppc_state.ppc_cr & (0x80000000 >> br_bi)) == !(br_bo & 0x08));
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if (ctr_ok && cnd_ok){
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ppc_next_instruction_address = br_bd;
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@ -1644,66 +1637,64 @@ void ppc_bcla(){
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ppc_state.ppc_spr[8] = ppc_state.ppc_pc + 4;
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}
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void ppc_bcctr(){
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br_bo = (ppc_cur_instruction >> 21) & 31;
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br_bi = (ppc_cur_instruction >> 16) & 31;
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void ppc_bcctr()
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{
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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uint32_t cnd_ok = 1;
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cnd_ok = ((br_bo & 0x10) || !((ppc_state.ppc_cr & (0x80000000 >> br_bi)) ^ (br_bo & 0x08)));
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uint32_t cnd_ok = (br_bo & 0x10) || (!(ppc_state.ppc_cr & (0x80000000 >> br_bi)) == !(br_bo & 0x08));
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if (cnd_ok){
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adr_li = (ppc_state.ppc_spr[9] & 0xFFFFFFFC);
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ppc_next_instruction_address = adr_li;
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ppc_next_instruction_address = (ppc_state.ppc_spr[9] & 0xFFFFFFFC);
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grab_branch = 1;
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}
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}
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void ppc_bcctrl(){
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br_bo = (ppc_cur_instruction >> 21) & 31;
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br_bi = (ppc_cur_instruction >> 16) & 31;
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void ppc_bcctrl()
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{
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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uint32_t cnd_ok = 1;
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cnd_ok = ((br_bo & 0x10) || !((ppc_state.ppc_cr & (0x80000000 >> br_bi)) ^ (br_bo & 0x08)));
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uint32_t cnd_ok = (br_bo & 0x10) || (!(ppc_state.ppc_cr & (0x80000000 >> br_bi)) == !(br_bo & 0x08));
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if (cnd_ok){
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adr_li = (ppc_state.ppc_spr[9] & 0xFFFFFFFC);
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ppc_next_instruction_address = adr_li;
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ppc_next_instruction_address = (ppc_state.ppc_spr[9] & 0xFFFFFFFC);
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grab_branch = 1;
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}
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ppc_state.ppc_spr[8] = ppc_state.ppc_pc + 4;
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}
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void ppc_bclr(){
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br_bo = (ppc_cur_instruction >> 21) & 31;
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br_bi = (ppc_cur_instruction >> 16) & 31;
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uint32_t ctr_ok = 1;
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uint32_t cnd_ok = 1;
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void ppc_bclr()
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{
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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uint32_t ctr_ok;
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uint32_t cnd_ok;
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if (!(br_bo & 0x04)){
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(ppc_state.ppc_spr[9])--;
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(ppc_state.ppc_spr[9])--; /* decrement CTR */
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}
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ctr_ok = ((br_bo & 0x04) | ((ppc_state.ppc_spr[9] != 0) ^ (br_bo & 0x02)));
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cnd_ok = ((br_bo & 0x10) || !((ppc_state.ppc_cr & (0x80000000 >> br_bi)) ^ (br_bo & 0x08)));
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ctr_ok = (br_bo & 0x04) || ((ppc_state.ppc_spr[9] != 0) == !(br_bo & 0x02));
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cnd_ok = (br_bo & 0x10) || (!(ppc_state.ppc_cr & (0x80000000 >> br_bi)) == !(br_bo & 0x08));
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if (ctr_ok && cnd_ok){
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ppc_next_instruction_address = (ppc_state.ppc_spr[8] & 0xFFFFFFFC);
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grab_branch = 1;
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}
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else{
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printf("Branch failed. \n");
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}
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}
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void ppc_bclrl(){
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br_bo = (ppc_cur_instruction >> 21) & 31;
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br_bi = (ppc_cur_instruction >> 16) & 31;
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uint32_t ctr_ok = 1;
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uint32_t cnd_ok = 1;
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void ppc_bclrl()
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{
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uint32_t br_bo = (ppc_cur_instruction >> 21) & 31;
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uint32_t br_bi = (ppc_cur_instruction >> 16) & 31;
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uint32_t ctr_ok;
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uint32_t cnd_ok;
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if (!(br_bo & 0x04)){
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(ppc_state.ppc_spr[9])--;
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(ppc_state.ppc_spr[9])--; /* decrement CTR */
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}
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ctr_ok = ((br_bo & 0x04) | ((ppc_state.ppc_spr[9] != 0) ^ (br_bo & 0x02)));
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cnd_ok = ((br_bo & 0x10) || !((ppc_state.ppc_cr & (0x80000000 >> br_bi)) ^ (br_bo & 0x08)));
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ctr_ok = (br_bo & 0x04) || ((ppc_state.ppc_spr[9] != 0) == !(br_bo & 0x02));
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cnd_ok = (br_bo & 0x10) || (!(ppc_state.ppc_cr & (0x80000000 >> br_bi)) == !(br_bo & 0x08));
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if (ctr_ok && cnd_ok){
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ppc_next_instruction_address = (ppc_state.ppc_spr[8] & 0xFFFFFFFC);
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@ -1728,45 +1719,51 @@ void ppc_cmp(){
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}
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void ppc_cmpi(){
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//if (!((ppc_cur_instruction >> 21) && 0x1)){
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crf_d = (ppc_cur_instruction >> 23) & 7;
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crf_d = crf_d << 2;
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ppc_grab_regssasimm();
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xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
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cmp_c = (((int32_t)ppc_result_a) == simm) ? 0x20000000 : (((int32_t)ppc_result_a) > simm) ? 0x40000000 : 0x80000000;
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ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
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// }
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//else{
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// printf("Warning: Invalid CMP Instruction.");
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//}
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#ifdef CHECK_INVALID
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if (ppc_cur_instruction & 0x200000) {
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printf("WARNING: invalid CMPI instruction form (L=1)!\n");
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return;
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}
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#endif
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crf_d = (ppc_cur_instruction >> 23) & 7;
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crf_d = crf_d << 2;
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ppc_grab_regsasimm();
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xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
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cmp_c = (((int32_t)ppc_result_a) == simm) ? 0x20000000 : (((int32_t)ppc_result_a) > simm) ? 0x40000000 : 0x80000000;
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ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
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}
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void ppc_cmpl(){
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//if (!((ppc_cur_instruction >> 21) && 0x1)){
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crf_d = (ppc_cur_instruction >> 23) & 7;
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crf_d = crf_d << 2;
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ppc_grab_regssab();
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xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
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cmp_c = (ppc_result_a == ppc_result_b) ? 0x20000000 : (ppc_result_a > ppc_result_b) ? 0x40000000 : 0x80000000;
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ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
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//}
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//else{
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// printf("Warning: Invalid CMP Instruction.");
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//}
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#ifdef CHECK_INVALID
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if (ppc_cur_instruction & 0x200000) {
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printf("WARNING: invalid CMPL instruction form (L=1)!\n");
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return;
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}
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#endif
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crf_d = (ppc_cur_instruction >> 23) & 7;
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crf_d = crf_d << 2;
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ppc_grab_regssab();
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xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
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cmp_c = (ppc_result_a == ppc_result_b) ? 0x20000000 : (ppc_result_a > ppc_result_b) ? 0x40000000 : 0x80000000;
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ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
|
||||
}
|
||||
|
||||
void ppc_cmpli(){
|
||||
// if (!((ppc_cur_instruction >> 21) && 0x1)){
|
||||
crf_d = (ppc_cur_instruction >> 23) & 7;
|
||||
crf_d = crf_d << 2;
|
||||
ppc_grab_regssauimm();
|
||||
xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
|
||||
cmp_c = (ppc_result_a == uimm) ? 0x20000000 : (ppc_result_a > uimm) ? 0x40000000 : 0x80000000;
|
||||
ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
|
||||
// }
|
||||
//else{
|
||||
// printf("Warning: Invalid CMP Instruction.");
|
||||
// }
|
||||
#ifdef CHECK_INVALID
|
||||
if (ppc_cur_instruction & 0x200000) {
|
||||
printf("WARNING: invalid CMPLI instruction form (L=1)!\n");
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
crf_d = (ppc_cur_instruction >> 23) & 7;
|
||||
crf_d = crf_d << 2;
|
||||
ppc_grab_regssauimm();
|
||||
xercon = (ppc_state.ppc_spr[1] & 0x80000000) >> 3;
|
||||
cmp_c = (ppc_result_a == uimm) ? 0x20000000 : (ppc_result_a > uimm) ? 0x40000000 : 0x80000000;
|
||||
ppc_state.ppc_cr = ((ppc_state.ppc_cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d));
|
||||
}
|
||||
|
||||
//Condition Register Changes
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user