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https://github.com/dingusdev/dingusppc.git
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MPC106: use common PCI configuration code.
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@ -33,17 +33,25 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
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#include <loguru.hpp>
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MPC106::MPC106() : MemCtrlBase(), PCIDevice("Grackle PCI host bridge"), PCIHost()
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MPC106::MPC106() : MemCtrlBase(), PCIDevice("Grackle"), PCIHost()
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{
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this->name = "Grackle";
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supports_types(HWCompType::MEM_CTRL | HWCompType::MMIO_DEV |
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HWCompType::PCI_HOST | HWCompType::PCI_DEV);
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/* add PCI/ISA I/O space, 64K for now */
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// populate PCI config header
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this->vendor_id = PCI_VENDOR_MOTOROLA;
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this->device_id = 0x0002;
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this->class_rev = 0x06000040;
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this->cache_ln_sz = 8;
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this->command = 6;
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this->status = 0x80;
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// add PCI/ISA I/O space, 64K for now
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add_mmio_region(0xFE000000, 0x10000, this);
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/* add memory mapped I/O region for MPC106 registers */
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// add memory mapped I/O region for MPC106 registers
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add_mmio_region(0xFEC00000, 0x300000, this);
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}
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@ -51,8 +59,8 @@ uint32_t MPC106::read(uint32_t reg_start, uint32_t offset, int size) {
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uint32_t result;
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if (reg_start == 0xFE000000) {
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/* broadcast I/O request to devices that support I/O space
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until a device returns true that means "request accepted" */
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// broadcast I/O request to devices that support I/O space
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// until a device returns true that means "request accepted"
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for (auto& dev : this->io_space_devs) {
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if (dev->pci_io_read(offset, size, &result)) {
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return result;
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@ -66,15 +74,15 @@ uint32_t MPC106::read(uint32_t reg_start, uint32_t offset, int size) {
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}
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}
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/* FIXME: reading from CONFIG_ADDR is ignored for now */
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// FIXME: reading from CONFIG_ADDR is ignored for now
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return 0;
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}
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void MPC106::write(uint32_t reg_start, uint32_t offset, uint32_t value, int size) {
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if (reg_start == 0xFE000000) {
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/* broadcast I/O request to devices that support I/O space
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until a device returns true that means "request accepted" */
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// broadcast I/O request to devices that support I/O space
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// until a device returns true that means "request accepted"
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for (auto& dev : this->io_space_devs) {
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if (dev->pci_io_write(offset, value, size)) {
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return;
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@ -163,6 +171,10 @@ uint32_t MPC106::pci_cfg_read(uint32_t reg_offs, uint32_t size) {
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LOG_F(9, "read from Grackle register %08X\n", reg_offs);
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#endif
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if (reg_offs < 64) {
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return PCIDevice::pci_cfg_read(reg_offs, size);
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}
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return read_mem(&this->my_pci_cfg_hdr[reg_offs], size);
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}
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@ -171,6 +183,11 @@ void MPC106::pci_cfg_write(uint32_t reg_offs, uint32_t value, uint32_t size) {
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LOG_F(9, "write %08X to Grackle register %08X\n", value, reg_offs);
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#endif
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if (reg_offs < 64) {
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PCIDevice::pci_cfg_write(reg_offs, value, size);
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return;
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}
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// FIXME: implement write-protection for read-only registers
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write_mem(&this->my_pci_cfg_hdr[reg_offs], value, size);
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