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Implement writes to SCSI Pseudo-DMA register.
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@ -190,6 +190,21 @@ uint16_t Sc53C94::pseudo_dma_read()
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return data_word;
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return data_word;
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}
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}
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void Sc53C94::pseudo_dma_write(uint16_t data) {
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this->fifo_push((data >> 8) & 0xFFU);
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this->fifo_push(data & 0xFFU);
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// update DMA status
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if (this->is_dma_cmd) {
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this->xfer_count -= 2;
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if (!this->xfer_count) {
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this->status |= STAT_TC; // signal zero transfer count
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//this->cur_state = SeqState::XFER_END;
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this->sequencer();
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}
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}
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}
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void Sc53C94::update_command_reg(uint8_t cmd)
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void Sc53C94::update_command_reg(uint8_t cmd)
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{
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{
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if (this->on_reset && (cmd & 0x7F) != CMD_NOP) {
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if (this->on_reset && (cmd & 0x7F) != CMD_NOP) {
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@ -164,6 +164,7 @@ public:
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uint8_t read(uint8_t reg_offset);
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uint8_t read(uint8_t reg_offset);
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void write(uint8_t reg_offset, uint8_t value);
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void write(uint8_t reg_offset, uint8_t value);
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uint16_t pseudo_dma_read();
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uint16_t pseudo_dma_read();
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void pseudo_dma_write(uint16_t data);
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// real DMA control
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// real DMA control
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void real_dma_xfer(int direction);
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void real_dma_xfer(int direction);
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@ -223,7 +223,10 @@ void AMIC::write(uint32_t rgn_start, uint32_t offset, uint32_t value, int size)
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this->mace->write((offset >> 4) & 0x1F, value);
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this->mace->write((offset >> 4) & 0x1F, value);
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return;
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return;
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case 0x10:
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case 0x10:
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this->scsi->write((offset >> 4) & 0xF, value);
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if (offset & 0x100)
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this->scsi->pseudo_dma_write(value);
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else
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this->scsi->write((offset >> 4) & 0xF, value);
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return;
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return;
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case 0x14: // Sound registers
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case 0x14: // Sound registers
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switch(offset) {
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switch(offset) {
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