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Simplify registration of HW component types.

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This commit is contained in:
Maxim Poliakovski 2022-01-26 16:45:21 +01:00
parent dc34f282b7
commit 5c177cc50f
16 changed files with 48 additions and 74 deletions
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39
devices/common/hwcomponent.h
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@ -22,26 +22,26 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#ifndef HW_COMPONENT_H
#define HW_COMPONENT_H
#include <cinttypes>
#include <string>
/** types of different HW components */
enum HWCompType : int {
UNKNOWN = 0, /* unknown component type */
MEM_CTRL = 10, /* memory controller */
ROM = 20, /* read-only memory */
RAM = 30, /* random access memory */
MMIO_DEV = 40, /* memory mapped I/O device */
PCI_HOST = 50, /* PCI host */
PCI_DEV = 51, /* PCI device */
I2C_HOST = 60, /* I2C host */
I2C_DEV = 61, /* I2C device */
ADB_HOST = 70, /* ADB host */
ADB_DEV = 71, /* ADB device */
INT_CTRL = 80, /* interrupt controller */
SND_SERVER = 100, /* host sound server */
enum HWCompType {
UNKNOWN = 0ULL, /* unknown component type */
MEM_CTRL = 1ULL << 0, /* memory controller */
ROM = 1ULL << 2, /* read-only memory */
RAM = 1ULL << 3, /* random access memory */
MMIO_DEV = 1ULL << 4, /* memory mapped I/O device */
PCI_HOST = 1ULL << 5, /* PCI host */
PCI_DEV = 1ULL << 6, /* PCI device */
I2C_HOST = 1ULL << 8, /* I2C host */
I2C_DEV = 1ULL << 9, /* I2C device */
ADB_HOST = 1ULL << 12, /* ADB host */
ADB_DEV = 1ULL << 13, /* ADB device */
INT_CTRL = 1ULL << 16, /* interrupt controller */
SND_SERVER = 1ULL << 31, /* host sound server */
};
/** Abstract base class for HW components. */
class HWComponent {
public:
@ -55,7 +55,13 @@ public:
this->name = name;
};
virtual bool supports_type(HWCompType type) = 0;
virtual bool supports_type(HWCompType type) {
return !!(this->supported_types & type);
};
virtual void supports_types(uint64_t types) {
this->supported_types = types;
};
virtual int device_postinit() {
return 0;
@ -63,6 +69,7 @@ public:
protected:
std::string name;
uint64_t supported_types = HWCompType::UNKNOWN;
};
#endif /* HW_COMPONENT_H */

10
devices/common/machineid.h
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@ -51,13 +51,10 @@ public:
this->id[1] = 0x5A;
this->id[2] = (id >> 8) & 0xFF;
this->id[3] = id & 0xFF;
supports_types(HWCompType::MMIO_DEV);
};
~NubusMacID() = default;
bool supports_type(HWCompType type) {
return type == HWCompType::MMIO_DEV;
};
uint32_t read(uint32_t reg_start, uint32_t offset, int size) {
return (offset < 4 ? this->id[offset] : 0);
};
@ -80,13 +77,10 @@ class GossamerID : public MMIODevice {
public:
GossamerID(const uint16_t id) {
this->id = id, this->name = "Machine-id";
supports_types(HWCompType::MMIO_DEV);
};
~GossamerID() = default;
bool supports_type(HWCompType type) {
return type == HWCompType::MMIO_DEV;
};
uint32_t read(uint32_t reg_start, uint32_t offset, int size) {
return ((!offset && size == 2) ? this->id : 0);
};

2
devices/common/viacuda.cpp
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@ -38,6 +38,8 @@ using namespace std;
ViaCuda::ViaCuda() {
this->name = "ViaCuda";
supports_types(HWCompType::ADB_HOST | HWCompType::I2C_HOST);
// VIA reset clears all internal registers to logic 0
// except timers/counters and the shift register
// as stated in the 6522 datasheet

6
devices/common/viacuda.h
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@ -155,10 +155,6 @@ public:
~ViaCuda() = default;
// HWComponent methods
bool supports_type(HWCompType type) {
return (type == HWCompType::ADB_HOST || type == HWCompType::I2C_HOST);
};
int device_postinit();
uint8_t read(int reg);
@ -170,7 +166,7 @@ private:
// VIA virtual HW registers
uint8_t via_regs[16];
float via_clk_dur; // one VIA clock duration = 1,27655 µs
float via_clk_dur; // one VIA clock duration = 1,27655 us
// VIA internal state
uint8_t _via_ifr;

3
devices/ioctrl/amic.cpp
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@ -27,6 +27,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#include <core/timermanager.h>
#include <cpu/ppc/ppcemu.h>
#include <cpu/ppc/ppcmmu.h>
#include <devices/common/hwcomponent.h>
#include <devices/common/scsi/sc53c94.h>
#include <devices/common/viacuda.h>
#include <devices/ethernet/mace.h>
@ -47,6 +48,8 @@ AMIC::AMIC() : MMIODevice()
{
this->name = "Apple Memory-mapped I/O Controller";
supports_types(HWCompType::MMIO_DEV | HWCompType::INT_CTRL);
// register I/O devices
this->scsi = std::unique_ptr<Sc53C94> (new Sc53C94());
this->escc = std::unique_ptr<EsccController> (new EsccController());

4
devices/ioctrl/amic.h
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@ -143,10 +143,6 @@ public:
~AMIC() = default;
// HWComponent methods
bool supports_type(HWCompType type) {
return (type == HWCompType::MMIO_DEV) || (type == HWCompType::INT_CTRL);
};
int device_postinit();
/* MMIODevice methods */

3
devices/ioctrl/heathrow.cpp
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@ -21,6 +21,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#include <cpu/ppc/ppcemu.h>
#include <devices/common/dbdma.h>
#include <devices/common/hwcomponent.h>
#include <devices/common/viacuda.h>
#include <devices/floppy/swim3.h>
#include <devices/ioctrl/macio.h>
@ -43,6 +44,8 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
using namespace std;
HeathrowIC::HeathrowIC() : PCIDevice("mac-io/heathrow") {
supports_types(HWCompType::MMIO_DEV | HWCompType::INT_CTRL);
this->nvram = std::unique_ptr<NVram> (new NVram());
this->viacuda = std::unique_ptr<ViaCuda> (new ViaCuda());

5
devices/ioctrl/macio.h
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@ -52,7 +52,6 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#define MACIO_H
#include <devices/common/dbdma.h>
#include <devices/common/hwcomponent.h>
#include <devices/common/mmiodevice.h>
#include <devices/common/nvram.h>
#include <devices/common/pci/pcidevice.h>
@ -98,10 +97,6 @@ public:
HeathrowIC();
~HeathrowIC() = default;
bool supports_type(HWCompType type) {
return (type == HWCompType::MMIO_DEV) || (type == HWCompType::INT_CTRL);
};
/* PCI device methods */
bool supports_io_space(void) {
return false;

11
devices/memctrl/hmc.cpp
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@ -24,12 +24,15 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
Author: Max Poliakovski
*/
#include <devices/common/hwcomponent.h>
#include <devices/memctrl/hmc.h>
HMC::HMC() : MemCtrlBase()
{
this->name = "Highspeed Memory Controller";
supports_types(HWCompType::MEM_CTRL | HWCompType::MMIO_DEV);
/* add memory mapped I/O region for the HMC control register */
add_mmio_region(0x50F40000, 0x10000, this);
@ -37,14 +40,6 @@ HMC::HMC() : MemCtrlBase()
this->bit_pos = 0;
}
bool HMC::supports_type(HWCompType type) {
if (type == HWCompType::MEM_CTRL || type == HWCompType::MMIO_DEV) {
return true;
} else {
return false;
}
}
uint32_t HMC::read(uint32_t reg_start, uint32_t offset, int size)
{
if (!offset)

3
devices/memctrl/hmc.h
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@ -31,7 +31,6 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#ifndef HMC_H
#define HMC_H
#include <devices/common/hwcomponent.h>
#include <devices/common/mmiodevice.h>
#include <devices/memctrl/memctrlbase.h>
@ -46,8 +45,6 @@ public:
HMC();
~HMC() = default;
bool supports_type(HWCompType type);
/* MMIODevice methods */
uint32_t read(uint32_t reg_start, uint32_t offset, int size);
void write(uint32_t reg_start, uint32_t offset, uint32_t value, int size);

12
devices/memctrl/mpc106.cpp
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@ -39,6 +39,9 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
MPC106::MPC106() : MemCtrlBase(), PCIDevice("Grackle PCI host bridge") {
this->name = "Grackle";
supports_types(HWCompType::MEM_CTRL | HWCompType::MMIO_DEV |
HWCompType::PCI_HOST | HWCompType::PCI_DEV);
/* add PCI/ISA I/O space, 64K for now */
add_mmio_region(0xFE000000, 0x10000, this);
@ -53,15 +56,6 @@ MPC106::~MPC106() {
this->pci_0_bus.clear();
}
bool MPC106::supports_type(HWCompType type) {
if (type == HWCompType::MEM_CTRL || type == HWCompType::MMIO_DEV ||
type == HWCompType::PCI_HOST || type == HWCompType::PCI_DEV) {
return true;
} else {
return false;
}
}
uint32_t MPC106::read(uint32_t reg_start, uint32_t offset, int size) {
uint32_t result;

3
devices/memctrl/mpc106.h
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@ -35,7 +35,6 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#ifndef MPC106_H_
#define MPC106_H_
#include <devices/common/hwcomponent.h>
#include <devices/common/mmiodevice.h>
#include <devices/common/pci/pcidevice.h>
#include <devices/common/pci/pcihost.h>
@ -50,8 +49,6 @@ public:
MPC106();
~MPC106();
bool supports_type(HWCompType type);
uint32_t read(uint32_t reg_start, uint32_t offset, int size);
void write(uint32_t reg_start, uint32_t offset, uint32_t value, int size);

5
devices/memctrl/spdram.h
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@ -63,14 +63,11 @@ public:
SpdSdram168(uint8_t addr) {
this->dev_addr = addr;
this->pos = 0;
supports_types(HWCompType::RAM);
};
~SpdSdram168() = default;
bool supports_type(HWCompType type) {
return type == HWCompType::RAM;
};
void set_capacity(int capacity_megs) {
switch (capacity_megs) {
case 32:

9
devices/sound/soundserver.h
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@ -46,7 +46,10 @@ enum {
class SoundServer : public HWComponent {
public:
SoundServer() { this->start(); };
SoundServer() {
supports_types(HWCompType::SND_SERVER);
this->start();
};
~SoundServer() { this->shutdown(); };
int start();
@ -55,10 +58,6 @@ public:
int start_out_stream();
void close_out_stream();
bool supports_type(HWCompType type) {
return type == HWCompType::SND_SERVER;
};
private:
int status; /* server status */
cubeb *cubeb_ctx;

3
devices/video/atirage.cpp
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@ -19,6 +19,7 @@ You should have received a copy of the GNU General Public License
along with this program. If not, see <https://www.gnu.org/licenses/>.
*/
#include <devices/common/hwcomponent.h>
#include <devices/common/pci/pcidevice.h>
#include <devices/video/atirage.h>
#include <devices/video/displayid.h>
@ -92,6 +93,8 @@ ATIRage::ATIRage(uint16_t dev_id, uint32_t vmem_size_mb)
{
uint8_t asic_id;
supports_types(HWCompType::MMIO_DEV | HWCompType::PCI_DEV);
this->vram_size = vmem_size_mb << 20; // convert MBs to bytes
/* allocate video RAM */

4
devices/video/atirage.h
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@ -203,10 +203,6 @@ public:
uint32_t read(uint32_t reg_start, uint32_t offset, int size);
void write(uint32_t reg_start, uint32_t offset, uint32_t value, int size);
bool supports_type(HWCompType type) {
return type == HWCompType::MMIO_DEV;
};
/* PCI device methods */
bool supports_io_space(void) {
return true;