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appleramdac: Cursor lo-byte position delay option.
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@ -87,13 +87,18 @@ void AppleRamdac::iodev_write(uint32_t address, uint16_t value) {
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case RamdacRegs::MULTI:
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switch (this->dac_addr) {
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case RamdacRegs::CURSOR_POS_HI:
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#ifdef CURSOR_LO_DELAY // HACK: prevents artifacts in some cases, disabled by default
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if (this->cursor_timer_id) {
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TimerManager::get_instance()->cancel_timer(this->cursor_timer_id);
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cursor_timer_id = 0;
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}
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this->cursor_xpos = (value << 8) | this->cursor_pos_lo;
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#else
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this->cursor_xpos = (value << 8) | (this->cursor_xpos & 0xff);
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#endif
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break;
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case RamdacRegs::CURSOR_POS_LO:
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#ifdef CURSOR_LO_DELAY // HACK: prevents artifacts in some cases, disabled by default
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if (this->cursor_timer_id) {
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TimerManager::get_instance()->cancel_timer(this->cursor_timer_id);
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this->cursor_xpos = (this->cursor_xpos & 0xff00) | (this->cursor_pos_lo & 0x00ff);
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@ -101,9 +106,12 @@ void AppleRamdac::iodev_write(uint32_t address, uint16_t value) {
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}
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this->cursor_pos_lo = value;
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this->cursor_timer_id = TimerManager::get_instance()->add_oneshot_timer(
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1000000000 / 60, [this]() {
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NS_PER_SEC / 60, [this]() {
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this->cursor_xpos = (this->cursor_xpos & 0xff00) | (this->cursor_pos_lo & 0x00ff);
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});
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#else
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this->cursor_xpos = (this->cursor_xpos & 0xff00) | (value & 0x00ff);
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#endif
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break;
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case RamdacRegs::MISC_CTRL:
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if (bit_changed(this->dac_cr, value, 1)) {
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@ -19,6 +19,24 @@ You should have received a copy of the GNU General Public License
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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//#define CURSOR_LO_DELAY
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/* Uncomment this to add a delay before allowing the low byte of the cursor
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position to be latched. In that case, a write to the high byte of the
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cursor position latches the low byte immediately since the high byte is
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expected to always be the second byte written. This change solves the issue
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described below.
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The horizontal position of the cursor may be incorrect between the times
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when the low byte and the high byte are written. This is true when both
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bytes change such as when the position changes from 0xFF to 0x100. This is
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usually not a problem since the position usually changes only during a VBL.
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In the case of Open Firmware, there is at least 2 ms between writes so
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the cursor position could be incorrect for a third of the refresh cycle.
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Open Firmware doesn't use VBLs. It also doesn't usually use a hardware
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cursor so this change isn't usually useful.
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*/
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/** Definitions for the Apple RAMDAC ASICs (RaDACal & DACula). */
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#ifndef APPLE_RAMDAC_H
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@ -107,7 +125,6 @@ protected:
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uint16_t cursor_xpos = 0; // horizontal position of the cursor region
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uint16_t cursor_ypos = 0;
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uint16_t cursor_height = 0;
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uint8_t cursor_pos_lo = 0;
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uint8_t clk_m[2] = {};
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uint8_t clk_pn[2] = {};
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uint8_t pll_cr = 0;
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@ -118,7 +135,10 @@ protected:
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int video_width = 0;
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int video_height = 0;
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uint32_t fb_pitch = 0;
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#ifdef CURSOR_LO_DELAY
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uint8_t cursor_pos_lo = 0;
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uint32_t cursor_timer_id = 0;
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#endif
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};
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#endif // APPLE_RAMDAC_H
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