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ppcopcodes: Add Privileged exception for SPRs.

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Accessing an SPR with bit 4 set (> 15) requires supervisor privilege and should cause a supervisor-level instruction exception (privileged instruction type program exception).
This commit is contained in:
joevt 2024-04-08 22:35:37 -07:00 committed by dingusdev
parent 0273867c49
commit 67a5c39b1c
1 changed files with 10 additions and 4 deletions
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14
cpu/ppc/ppcopcodes.cpp
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@ -888,11 +888,14 @@ void dppc_interpreter::ppc_mfspr() {
ppc_grab_dab(ppc_cur_instruction); ppc_grab_dab(ppc_cur_instruction);
uint32_t ref_spr = (reg_b << 5) | reg_a; uint32_t ref_spr = (reg_b << 5) | reg_a;
if (ref_spr & 0x10) {
#ifdef CPU_PROFILING #ifdef CPU_PROFILING
if (ref_spr > 31) {
num_supervisor_instrs++; num_supervisor_instrs++;
}
#endif #endif
if (ppc_state.msr & MSR::PR) {
ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::NOT_ALLOWED);
}
}
switch (ref_spr) { switch (ref_spr) {
case SPR::RTCL_U: case SPR::RTCL_U:
@ -915,11 +918,14 @@ void dppc_interpreter::ppc_mtspr() {
ppc_grab_dab(ppc_cur_instruction); ppc_grab_dab(ppc_cur_instruction);
uint32_t ref_spr = (reg_b << 5) | reg_a; uint32_t ref_spr = (reg_b << 5) | reg_a;
if (ref_spr & 0x10) {
#ifdef CPU_PROFILING #ifdef CPU_PROFILING
if (ref_spr > 31) {
num_supervisor_instrs++; num_supervisor_instrs++;
}
#endif #endif
if (ppc_state.msr & MSR::PR) {
ppc_exception_handler(Except_Type::EXC_PROGRAM, Exc_Cause::NOT_ALLOWED);
}
}
if (ref_spr == SPR::PVR || ( if (ref_spr == SPR::PVR || (
ref_spr == SPR::MQ && !is_601 ref_spr == SPR::MQ && !is_601