From e344b089b3fa99880d1fb030c5f6e5faf1bb1b48 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Sat, 9 Oct 2021 15:08:53 -0700 Subject: [PATCH 01/11] Floating point overhaul, part 1 Cleaned up formatting and reworked the INF/NAN checks --- cpu/ppc/ppcemu.h | 65 +++++++- cpu/ppc/ppcexec.cpp | 9 +- cpu/ppc/ppcfpopcodes.cpp | 321 +++++++++++++++++---------------------- 3 files changed, 210 insertions(+), 185 deletions(-) diff --git a/cpu/ppc/ppcemu.h b/cpu/ppc/ppcemu.h index 3b97f85..997b992 100644 --- a/cpu/ppc/ppcemu.h +++ b/cpu/ppc/ppcemu.h @@ -200,6 +200,70 @@ enum class BB_end_kind { BB_RFI /* the rfi instruction is encountered */ }; +enum class CR_select { + CR0_field = (0xF << 28), +}; + +enum class CRx_bit { + CR_SO = 0, + CR_EQ, + CR_GT, + CR_LT +}; + +enum class CR1_bit { + CR1_OX = 24, + CR1_VX, + CR1_FEX, + CR1_FX, +}; + +enum class FPSCR_bit { + FPSCR_RN = 0x3, + FPSCR_NI = 0x4, + FPSCR_XE = 0x8, + FPSCR_ZE = 0x10, + FPSCR_UE = 0x20, + FPSCR_OE = 0x40, + FPSCR_VE = 0x80, + FPSCR_VXCVI = 0x100, + FPSCR_VXSQRT = 0x200, + FPSCR_VXSOFT = 0x400, + FPSCR_FPRF = 0x1F000, + FPSCR_FPCC_FUNAN = 0x10000, + FPSCR_FPCC_ZERO = 0x8000, + FPSCR_FPCC_POS = 0x4000, + FPSCR_FPCC_NEG = 0x2000, + FPSCR_FPCC_FPRCD = 0x1000, + FPSCR_FI = (1 << 17), + FPSCR_FR = (1 << 18), + FPSCR_VXVC = (1 << 19), + FPSCR_VXIMZ = (1 << 20), + FPSCR_VXZDZ = (1 << 21), + FPSCR_VXIDI = (1 << 22), + FPSCR_VXISI = (1 << 23), + FPSCR_VXSNAN = (1 << 24), + FPSCR_XX = (1 << 25), + FPSCR_ZX = (1 << 26), + FPSCR_UX = (1 << 27), + FPSCR_OX = (1 << 28), + FPSCR_VX = (1 << 29), + FPSCR_FEX = (1 << 30), + FPSCR_FX = (1 << 31) +}; + +//for inf and nan checks +enum FPOP : int { + DIV = 0x12, + SUB = 0x14, + ADD = 0x15, + MUL = 0x19, + FMSUB = 0x1C, + FMADD = 0x1D, + FNMSUB = 0x1E, + FNMADD = 0x1F, +}; + /** PowerPC exception types. */ enum class Except_Type { EXC_SYSTEM_RESET = 1, @@ -271,7 +335,6 @@ void ppc_opcode63(); void initialize_ppc_opcode_tables(); -extern bool ppc_confirm_inf_nan(uint64_t input_a, uint64_t input_b, bool is_single, uint32_t op); extern double fp_return_double(uint32_t reg); extern uint64_t fp_return_uint64(uint32_t reg); diff --git a/cpu/ppc/ppcexec.cpp b/cpu/ppc/ppcexec.cpp index e8dd4b5..06b4508 100644 --- a/cpu/ppc/ppcexec.cpp +++ b/cpu/ppc/ppcexec.cpp @@ -253,8 +253,7 @@ void ppc_opcode31() { oe_flag = ppc_cur_instruction & 0x400; #ifdef EXHAUSTIVE_DEBUG - uint32_t regrab = (uint32_t)subop_grab; - LOG_F(INFO, "Executing Opcode 63 table subopcode entry \n", regrab); + LOG_F(INFO, "Executing Opcode 31 table subopcode entry %n \n", (uint32_t)subop_grab); #endif // EXHAUSTIVE_DEBUG SubOpcode31Grabber[subop_grab](); @@ -264,8 +263,7 @@ void ppc_opcode59() { uint16_t subop_grab = (ppc_cur_instruction >> 1) & 0x1F; rc_flag = ppc_cur_instruction & 1; #ifdef EXHAUSTIVE_DEBUG - uint32_t regrab = (uint32_t)subop_grab; - LOG_F(INFO, "Executing Opcode 59 table subopcode entry \n", regrab); + LOG_F(INFO, "Executing Opcode 59 table subopcode entry %n \n", (uint32_t)subop_grab); #endif // EXHAUSTIVE_DEBUG SubOpcode59Grabber[subop_grab](); } @@ -274,8 +272,7 @@ void ppc_opcode63() { uint16_t subop_grab = (ppc_cur_instruction >> 1) & 0x3FF; rc_flag = ppc_cur_instruction & 1; #ifdef EXHAUSTIVE_DEBUG - uint32_t regrab = (uint32_t)subop_grab; - LOG_F(INFO, "Executing Opcode 63 table subopcode entry \n", regrab); + LOG_F(INFO, "Executing Opcode 63 table subopcode entry %n \n", (uint32_t)subop_grab); #endif // EXHAUSTIVE_DEBUG SubOpcode63Grabber[subop_grab](); } diff --git a/cpu/ppc/ppcfpopcodes.cpp b/cpu/ppc/ppcfpopcodes.cpp index 6c14d02..e247c41 100644 --- a/cpu/ppc/ppcfpopcodes.cpp +++ b/cpu/ppc/ppcfpopcodes.cpp @@ -25,6 +25,7 @@ along with this program. If not, see . #include "ppcmmu.h" #include #include +#include #include #include #include @@ -179,141 +180,115 @@ int64_t round_to_neg_inf(double f) { return static_cast(floor(f)); } -void ppc_toggle_fpscr_fex() { - bool fex_result = ((ppc_state.fpscr & 0x20000000) & (ppc_state.fpscr & 0x80)); - fex_result |= ((ppc_state.fpscr & 0x10000000) & (ppc_state.fpscr & 0x40)); - fex_result |= ((ppc_state.fpscr & 0x8000000) & (ppc_state.fpscr & 0x20)); - fex_result |= ((ppc_state.fpscr & 0x4000000) & (ppc_state.fpscr & 0x10)); - fex_result |= ((ppc_state.fpscr & 0x2000000) & (ppc_state.fpscr & 0x8)); - ppc_state.fpscr |= (fex_result << 30); +void update_fpscr_fex() { + int fex_result = !!((ppc_state.fpscr & (ppc_state.fpscr << 22)) & 0x3E000000); + ppc_state.fpscr = (ppc_state.fpscr & ~0x40000000) | (fex_result << 30); } -bool ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, bool is_single, uint32_t op) { - uint64_t input_a = ppc_state.fpr[chosen_reg_1].int64_r; - uint64_t input_b = ppc_state.fpr[chosen_reg_2].int64_r; +template +constexpr auto ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chosen_reg_3, uint32_t op) { + T input_a = T(ppc_state.fpr[chosen_reg_1].int64_r); + T input_b = T(ppc_state.fpr[chosen_reg_2].int64_r); + T input_c = T(ppc_state.fpr[chosen_reg_3].int64_r); - if (is_single) { - uint32_t exp_a = (input_a >> 23) & 0xff; - uint32_t exp_b = (input_b >> 23) & 0xff; + ppc_state.fpscr &= 0x7fbfffff; - ppc_state.fpscr &= 0x7fbfffff; + bool inf_or_nan = false; - switch (op) { - case 36: - if ((exp_a == 0xff) && (exp_b == 0xff)) { - ppc_state.fpscr |= 0x80400000; - ppc_toggle_fpscr_fex(); - return true; - } else if ((input_a == 0) && (input_b == 0)) { - ppc_state.fpscr |= 0x80200000; - ppc_toggle_fpscr_fex(); - return true; + switch (op) { + case FPOP::DIV: + if (isnan(input_a) && isnan(input_b)) { + ppc_state.fpscr |= ((uint32_t)FPSCR_bit::FPSCR_FX | (uint32_t)FPSCR_bit::FPSCR_VXIDI); + inf_or_nan = true; + } else if ((input_a == FP_ZERO) && (input_b == FP_ZERO)) { + ppc_state.fpscr |= ((uint32_t)FPSCR_bit::FPSCR_FX | (uint32_t)FPSCR_bit::FPSCR_VXZDZ); + inf_or_nan = true; } + update_fpscr_fex(); + return inf_or_nan; break; - case 40: - if ((exp_a == 0xff) && (exp_b == 0xff)) { - ppc_state.fpscr |= 0x80800000; - ppc_toggle_fpscr_fex(); - return true; + case FPOP::SUB: + if (isnan(input_a) && isnan(input_b)) { + ppc_state.fpscr |= ((uint32_t)FPSCR_bit::FPSCR_FX | (uint32_t)FPSCR_bit::FPSCR_VXISI); + inf_or_nan = true; } + update_fpscr_fex(); + return inf_or_nan; break; - case 50: - if (((exp_a == 0xff) & (input_b == 0)) | ((exp_b == 0xff) & (input_a == 0))) { + case FPOP::ADD: + if ((isnan(input_a) & (input_b == FP_ZERO)) | (isnan(input_b) & (input_a == FP_ZERO))) { ppc_state.fpscr |= 0x80100000; - ppc_toggle_fpscr_fex(); - return true; + inf_or_nan = true; } + update_fpscr_fex(); + return inf_or_nan; break; - case 56: - case 58: - if ((exp_a == 0xff) && (exp_b == 0xff)) { - ppc_state.fpscr |= 0x80800000; - ppc_toggle_fpscr_fex(); - return true; + case FPOP::MUL: + if (((input_a == FP_ZERO) && (input_c == FP_INFINITE)) || + ((input_c == FP_ZERO) && (input_a == FP_INFINITE))) { + ppc_state.fpscr |= + ((uint32_t)FPSCR_bit::FPSCR_FX | (uint32_t)FPSCR_bit::FPSCR_VXSNAN | + (uint32_t)FPSCR_bit::FPSCR_VXIMZ); + inf_or_nan = true; } + update_fpscr_fex(); + return inf_or_nan; + break; + case FPOP::FMSUB: + case FPOP::FNMSUB: + if (isnan(input_a) || isnan(input_b) || isnan(input_c)) { + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; + inf_or_nan = true; + if (((input_a == FP_ZERO) && (input_c == FP_INFINITE)) || + ((input_c == FP_ZERO) && (input_a == FP_INFINITE))) { + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXIMZ; + } + } + + update_fpscr_fex(); + return inf_or_nan; + break; + case FPOP::FMADD: + case FPOP::FNMADD: + if (isnan(input_a) || isnan(input_b) || isnan(input_c)) { + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; + inf_or_nan = true; + } + + update_fpscr_fex(); + return inf_or_nan; break; default: return false; } - } else { - uint32_t exp_a = (input_a >> 52) & 0x7ff; - uint32_t exp_b = (input_b >> 52) & 0x7ff; +} - ppc_state.fpscr &= 0x7fbfffff; - - switch (op) { - case 36: - if ((exp_a == 0x7ff) && (exp_b == 0x7ff)) { - ppc_state.fpscr |= 0x80400000; - ppc_toggle_fpscr_fex(); - return true; - } else if ((input_a == 0) && (input_b == 0)) { - ppc_state.fpscr |= 0x80200000; - ppc_toggle_fpscr_fex(); - return true; - } - break; - case 40: - if ((exp_a == 0x7ff) && (exp_b == 0x7ff)) { - ppc_state.fpscr |= 0x80800000; - ppc_toggle_fpscr_fex(); - return true; - } - break; - case 50: - if (((exp_a == 0x7ff) & (input_b == 0)) | ((exp_b == 0x7ff) & (input_a == 0))) { - ppc_state.fpscr |= 0x80100000; - ppc_toggle_fpscr_fex(); - return true; - } - break; - case 56: - case 58: - if ((exp_a == 0xff) && (exp_b == 0xff)) { - ppc_state.fpscr |= 0x80800000; - ppc_toggle_fpscr_fex(); - return true; - } - break; - default: - return false; - } - } - - return false; -} - -void fpresult_update(uint64_t set_result, bool confirm_arc) { +void fpresult_update(double set_result, bool confirm_arc) { bool confirm_ov = (bool)std::fetestexcept(FE_OVERFLOW); if (confirm_ov) { - ppc_state.fpscr |= 0x80001000; + ppc_state.fpscr |= ((uint32_t)FPSCR_bit::FPSCR_FX | ((uint32_t)FPSCR_bit::FPSCR_FPRF & (uint32_t)FPSCR_bit::FPSCR_FPCC_FUNAN)); } if (confirm_arc) { - ppc_state.fpscr |= 0x80010000; + ppc_state.fpscr |= ((uint32_t)FPSCR_bit::FPSCR_FX | ((uint32_t)FPSCR_bit::FPSCR_FPRF & (uint32_t)FPSCR_bit::FPSCR_FPCC_FUNAN)); ppc_state.fpscr &= 0xFFFF0FFF; - if (set_result == 0) { - ppc_state.fpscr |= 0x2000; + if (set_result == 0.0) { + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_FPCC_NEG; } else { - if (set_result < 0) { - ppc_state.fpscr |= 0x8000; - } else if (set_result > 0) { - ppc_state.fpscr |= 0x4000; + if (set_result < 0.0) { + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_FPCC_ZERO; + } else if (set_result > 0.0) { + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_FPCC_POS; } else { - ppc_state.fpscr |= 0x1000; + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_FPCC_FPRCD; } } } } -void ppc_frsqrte_result() { - if (ppc_result64_d & 0x007FF000000000000UL) { - } -} - void ppc_changecrf1() { ppc_state.cr &= 0xF0FFFFFF; ppc_state.cr |= (ppc_state.fpscr & 0xF0000000) >> 4; @@ -323,7 +298,7 @@ void ppc_changecrf1() { void dppc_interpreter::ppc_fadd() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, false, 58)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::ADD)) { ppc_dblresult64_d = val_reg_a + val_reg_b; ppc_store_dfpresult_flt(reg_d); } @@ -335,7 +310,7 @@ void dppc_interpreter::ppc_fadd() { void dppc_interpreter::ppc_fsub() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, false, 56)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::SUB)) { ppc_dblresult64_d = val_reg_a - val_reg_b; ppc_store_dfpresult_flt(reg_d); } @@ -347,7 +322,7 @@ void dppc_interpreter::ppc_fsub() { void dppc_interpreter::ppc_fdiv() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, false, 36)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::DIV)) { ppc_dblresult64_d = val_reg_a / val_reg_b; ppc_store_dfpresult_flt(reg_d); } @@ -359,7 +334,7 @@ void dppc_interpreter::ppc_fdiv() { void dppc_interpreter::ppc_fmul() { ppc_grab_regsfpdac(); - if (!ppc_confirm_inf_nan(reg_a, reg_c, false, 50)) { + if (!ppc_confirm_inf_nan(reg_a, reg_c, 0, FPOP::MUL)) { ppc_dblresult64_d = val_reg_a * val_reg_c; ppc_store_dfpresult_flt(reg_d); } @@ -371,14 +346,11 @@ void dppc_interpreter::ppc_fmul() { void dppc_interpreter::ppc_fmadd() { ppc_grab_regsfpdabc(); - if (!ppc_confirm_inf_nan(reg_a, reg_c, false, 50)) { - ppc_dblresult64_d = (val_reg_a * val_reg_c); - if (!ppc_confirm_inf_nan(reg_a, reg_b, false, 58)) { - ppc_dblresult64_d += val_reg_b; - } + if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FMADD)) { + ppc_dblresult64_d = std::fma(val_reg_a, val_reg_c, val_reg_b); + ppc_store_dfpresult_flt(reg_d); } - ppc_store_dfpresult_flt(reg_d); if (rc_flag) ppc_changecrf1(); @@ -387,14 +359,12 @@ void dppc_interpreter::ppc_fmadd() { void dppc_interpreter::ppc_fmsub() { ppc_grab_regsfpdabc(); - if (!ppc_confirm_inf_nan(reg_a, reg_c, false, 50)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FMSUB)) { ppc_dblresult64_d = (val_reg_a * val_reg_c); - if (!ppc_confirm_inf_nan(reg_d, reg_b, false, 56)) { - ppc_dblresult64_d -= val_reg_b; - } + ppc_dblresult64_d -= val_reg_b; + ppc_store_dfpresult_flt(reg_d); } - ppc_store_dfpresult_flt(reg_d); if (rc_flag) ppc_changecrf1(); @@ -403,16 +373,13 @@ void dppc_interpreter::ppc_fmsub() { void dppc_interpreter::ppc_fnmadd() { ppc_grab_regsfpdabc(); - if (!ppc_confirm_inf_nan(reg_a, reg_c, false, 50)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FNMADD)) { ppc_dblresult64_d = (val_reg_a * val_reg_c); - if (!ppc_confirm_inf_nan(reg_a, reg_b, false, 58)) { - ppc_dblresult64_d += val_reg_b; - } + ppc_dblresult64_d += val_reg_b; + ppc_dblresult64_d = -ppc_dblresult64_d; + ppc_store_dfpresult_flt(reg_d); } - ppc_dblresult64_d = -ppc_dblresult64_d; - ppc_store_dfpresult_flt(reg_d); - if (rc_flag) ppc_changecrf1(); } @@ -420,15 +387,12 @@ void dppc_interpreter::ppc_fnmadd() { void dppc_interpreter::ppc_fnmsub() { ppc_grab_regsfpdabc(); - if (!ppc_confirm_inf_nan(reg_a, reg_c, false, 50)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FNMSUB)) { ppc_dblresult64_d = (val_reg_a * val_reg_c); - if (!ppc_confirm_inf_nan(reg_d, reg_b, false, 56)) { - ppc_dblresult64_d -= val_reg_b; - } + ppc_dblresult64_d -= val_reg_b; + ppc_store_dfpresult_flt(reg_d); } - ppc_dblresult64_d = -ppc_dblresult64_d; - ppc_store_dfpresult_flt(reg_d); if (rc_flag) ppc_changecrf1(); @@ -437,7 +401,7 @@ void dppc_interpreter::ppc_fnmsub() { void dppc_interpreter::ppc_fadds() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, true, 58)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::ADD)) { float intermediate = (float)val_reg_a + (float)val_reg_b; ppc_dblresult64_d = static_cast(intermediate); ppc_store_sfpresult_flt(reg_d); @@ -450,7 +414,7 @@ void dppc_interpreter::ppc_fadds() { void dppc_interpreter::ppc_fsubs() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, true, 56)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::SUB)) { float intermediate = (float)val_reg_a - (float)val_reg_b; ppc_dblresult64_d = static_cast(intermediate); ppc_store_sfpresult_flt(reg_d); @@ -463,7 +427,7 @@ void dppc_interpreter::ppc_fsubs() { void dppc_interpreter::ppc_fmuls() { ppc_grab_regsfpdac(); - if (!ppc_confirm_inf_nan(reg_a, reg_c, true, 50)) { + if (!ppc_confirm_inf_nan(reg_a, 0, reg_c, FPOP::MUL)) { float intermediate = (float)val_reg_a * (float)val_reg_c; ppc_dblresult64_d = static_cast(intermediate); ppc_store_sfpresult_flt(reg_d); @@ -476,7 +440,7 @@ void dppc_interpreter::ppc_fmuls() { void dppc_interpreter::ppc_fdivs() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, true, 36)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::DIV)) { float intermediate = (float)val_reg_a / (float)val_reg_b; ppc_dblresult64_d = static_cast(intermediate); ppc_store_sfpresult_flt(reg_d); @@ -491,14 +455,11 @@ void dppc_interpreter::ppc_fmadds() { float intermediate; - if (!ppc_confirm_inf_nan(reg_a, reg_b, true, 58)) { - intermediate = (float)val_reg_a * (float)val_reg_c; - if (!ppc_confirm_inf_nan(reg_a, reg_b, true, 58)) { - intermediate += (float)val_reg_b; - ppc_dblresult64_d = static_cast(intermediate); + if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FMADD)) { + ppc_dblresult64_d = static_cast(std::fma( + (float)val_reg_a, (float)val_reg_c, (float)val_reg_b)); - ppc_store_sfpresult_flt(reg_d); - } + ppc_store_sfpresult_flt(reg_d); } if (rc_flag) @@ -510,14 +471,12 @@ void dppc_interpreter::ppc_fmsubs() { float intermediate; - if (!ppc_confirm_inf_nan(reg_a, reg_c, false, 50)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FMSUB)) { intermediate = (float)val_reg_a * (float)val_reg_c; - if (!ppc_confirm_inf_nan(reg_d, reg_b, false, 56)) { - intermediate -= (float)val_reg_b; - ppc_dblresult64_d = static_cast(intermediate); + intermediate -= (float)val_reg_b; + ppc_dblresult64_d = static_cast(intermediate); - ppc_store_sfpresult_flt(reg_d); - } + ppc_store_sfpresult_flt(reg_d); } if (rc_flag) @@ -529,16 +488,14 @@ void dppc_interpreter::ppc_fnmadds() { float intermediate; - if (!ppc_confirm_inf_nan(reg_a, reg_b, true, 58)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FNMADD)) { intermediate = (float)val_reg_a * (float)val_reg_c; - if (!ppc_confirm_inf_nan(reg_a, reg_b, true, 58)) { - intermediate += (float)val_reg_b; - intermediate = -intermediate; + intermediate += (float)val_reg_b; + intermediate = -intermediate; - ppc_dblresult64_d = static_cast(intermediate); + ppc_dblresult64_d = static_cast(intermediate); - ppc_store_sfpresult_flt(reg_d); - } + ppc_store_sfpresult_flt(reg_d); } if (rc_flag) @@ -550,16 +507,14 @@ void dppc_interpreter::ppc_fnmsubs() { float intermediate; - if (!ppc_confirm_inf_nan(reg_a, reg_c, false, 50)) { + if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FNMSUB)) { intermediate = (float)val_reg_a * (float)val_reg_c; - if (!ppc_confirm_inf_nan(reg_d, reg_b, false, 56)) { - intermediate -= (float)val_reg_b; - intermediate = -intermediate; + intermediate -= (float)val_reg_b; + intermediate = -intermediate; - ppc_dblresult64_d = static_cast(intermediate); + ppc_dblresult64_d = static_cast(intermediate); - ppc_store_sfpresult_flt(reg_d); - } + ppc_store_sfpresult_flt(reg_d); } if (rc_flag) @@ -687,12 +642,16 @@ void dppc_interpreter::ppc_fctiw() { switch (ppc_state.fpscr & 0x3) { case 0: ppc_result64_d = round_to_nearest(val_reg_b); + break; case 1: ppc_result64_d = round_to_zero(val_reg_b); + break; case 2: ppc_result64_d = round_to_pos_inf(val_reg_b); + break; case 3: ppc_result64_d = round_to_neg_inf(val_reg_b); + break; } ppc_store_dfpresult_int(reg_d); @@ -1027,25 +986,28 @@ void dppc_interpreter::ppc_fcmpo() { ppc_state.fpscr &= 0xFFFF0FFF; if (std::isnan(db_test_a) || std::isnan(db_test_b)) { - cmp_c |= 0x01; + cmp_c |= (1 << (uint32_t)CRx_bit::CR_SO); } else if (db_test_a < db_test_b) { - cmp_c |= 0x08; + cmp_c |= (1 << (uint32_t)CRx_bit::CR_LT); } else if (db_test_a > db_test_b) { - cmp_c |= 0x04; + cmp_c |= (1 << (uint32_t)CRx_bit::CR_GT); } else { - cmp_c |= 0x02; + cmp_c |= (1 << (uint32_t)CRx_bit::CR_EQ); } - ppc_state.fpscr |= (cmp_c << 12); - ppc_state.cr = ((ppc_state.cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d)); + fpresult_update(db_test_a, true); - if ((db_test_a == snan) || (db_test_b == snan)) { - ppc_state.fpscr |= 0x1000000; + ppc_state.fpscr = (ppc_state.fpscr & ~((uint32_t)FPSCR_bit::FPSCR_FPRF)) | (cmp_c << 12); + ppc_state.cr = + ((ppc_state.cr & ~((uint32_t)CR_select::CR0_field >> crf_d)) | ((cmp_c + xercon) >> crf_d)); + + if (std::isnan(db_test_a) || std::isnan(db_test_b)) { + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; if (ppc_state.fpscr & 0x80) { - ppc_state.fpscr |= 0x80000; + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXVC; } } else if ((db_test_a == qnan) || (db_test_b == qnan)) { - ppc_state.fpscr |= 0x80000; + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXVC; } } @@ -1055,19 +1017,22 @@ void dppc_interpreter::ppc_fcmpu() { ppc_state.fpscr &= 0xFFFF0FFF; if (std::isnan(db_test_a) || std::isnan(db_test_b)) { - cmp_c |= 0x01; + cmp_c |= (1 << (uint32_t)CRx_bit::CR_SO); } else if (db_test_a < db_test_b) { - cmp_c |= 0x08; + cmp_c |= (1 << (uint32_t)CRx_bit::CR_LT); } else if (db_test_a > db_test_b) { - cmp_c |= 0x04; + cmp_c |= (1 << (uint32_t)CRx_bit::CR_GT); } else { - cmp_c |= 0x02; + cmp_c |= (1 << (uint32_t)CRx_bit::CR_EQ); } - ppc_state.fpscr |= (cmp_c << 12); - ppc_state.cr = ((ppc_state.cr & ~(0xf0000000 >> crf_d)) | ((cmp_c + xercon) >> crf_d)); + fpresult_update(db_test_a, true); - if ((db_test_a == snan) || (db_test_b == snan)) { - ppc_state.fpscr |= 0x1000000; + ppc_state.fpscr = (ppc_state.fpscr & ~((uint32_t)FPSCR_bit::FPSCR_FPRF)) | (cmp_c << 12); + ppc_state.cr = + ((ppc_state.cr & ~((uint32_t)CR_select::CR0_field >> crf_d)) | ((cmp_c + xercon) >> crf_d)); + + if (std::isnan(db_test_a) || std::isnan(db_test_b)) { + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; } } From 2d65ed47fc57279c83cd606d5e3389fd0b470d40 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Sat, 9 Oct 2021 19:42:25 -0700 Subject: [PATCH 02/11] Floating point overhaul, part 2 Further formatting fixes. Removed obsoleted separation definitions. Fixed rounding to nearest. --- cpu/ppc/ppcemu.h | 6 +-- cpu/ppc/ppcfpopcodes.cpp | 104 +++++++++++++++++---------------------- 2 files changed, 45 insertions(+), 65 deletions(-) diff --git a/cpu/ppc/ppcemu.h b/cpu/ppc/ppcemu.h index 997b992..a4bacb2 100644 --- a/cpu/ppc/ppcemu.h +++ b/cpu/ppc/ppcemu.h @@ -202,6 +202,7 @@ enum class BB_end_kind { enum class CR_select { CR0_field = (0xF << 28), + CR1_field = (0xF << 24), }; enum class CRx_bit { @@ -479,15 +480,10 @@ extern void ppc_mtspr(); extern void ppc_mtfsb0(); extern void ppc_mtfsb1(); extern void ppc_mcrfs(); -extern void ppc_mtfsb0dot(); -extern void ppc_mtfsb1dot(); extern void ppc_fmr(); extern void ppc_mffs(); -extern void ppc_mffsdot(); extern void ppc_mtfsf(); -extern void ppc_mtfsfdot(); extern void ppc_mtfsfi(); -extern void ppc_mtfsfidot(); extern void ppc_addi(); extern void ppc_addic(); diff --git a/cpu/ppc/ppcfpopcodes.cpp b/cpu/ppc/ppcfpopcodes.cpp index e247c41..9bfd5ee 100644 --- a/cpu/ppc/ppcfpopcodes.cpp +++ b/cpu/ppc/ppcfpopcodes.cpp @@ -162,9 +162,9 @@ void ppc_divbyzero(uint64_t input_a, uint64_t input_b, bool is_single) { int64_t round_to_nearest(double f) { if (f >= 0.0) { - return static_cast(static_cast (f + 0.5)); + return static_cast(static_cast (ceil(f))); } else { - return static_cast(static_cast (-f + 0.5)); + return static_cast(static_cast (floor(f))); } } @@ -290,8 +290,8 @@ void fpresult_update(double set_result, bool confirm_arc) { } void ppc_changecrf1() { - ppc_state.cr &= 0xF0FFFFFF; - ppc_state.cr |= (ppc_state.fpscr & 0xF0000000) >> 4; + ppc_state.cr &= ~((uint32_t)CR_select::CR1_field); + ppc_state.cr |= (ppc_state.fpscr & (uint32_t)CR_select::CR0_field) >> 4; } // Floating Point Arithmetic @@ -558,7 +558,7 @@ void dppc_interpreter::ppc_fneg() { void dppc_interpreter::ppc_fsel() { ppc_grab_regsfpdabc(); - ppc_dblresult64_d = (val_reg_a >= 0.0) ? val_reg_c : val_reg_b; + ppc_dblresult64_d = (val_reg_a >= -0.0) ? val_reg_c : val_reg_b; ppc_store_dfpresult_flt(reg_d); @@ -613,11 +613,23 @@ void dppc_interpreter::ppc_frsp() { void dppc_interpreter::ppc_fres() { ppc_grab_regsfpdb(); - float testf2 = (float)GET_FPR(reg_b); + double start_num = GET_FPR(reg_b); + float testf2 = (float)start_num; testf2 = 1 / testf2; ppc_dblresult64_d = (double)testf2; ppc_store_dfpresult_flt(reg_d); + if (start_num == 0.0) { + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_ZX; + } + else if (std::isnan(start_num)) { + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; + } + else if (std::isinf(start_num)){ + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; + ppc_state.fpscr &= 0xFFF9FFFF; + } + if (rc_flag) ppc_changecrf1(); } @@ -628,15 +640,15 @@ void dppc_interpreter::ppc_fctiw() { if (std::isnan(val_reg_b)) { ppc_state.fpr[reg_d].int64_r = 0x80000000; - ppc_state.fpscr |= 0x1000100; + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN | (uint32_t)FPSCR_bit::FPSCR_VXCVI; } else if (val_reg_b > static_cast(0x7fffffff)) { ppc_state.fpr[reg_d].int64_r = 0x7fffffff; - ppc_state.fpscr |= 0x100; + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXCVI; } else if (val_reg_b < -static_cast(0x80000000)) { ppc_state.fpr[reg_d].int64_r = 0x80000000; - ppc_state.fpscr |= 0x100; + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXCVI; } else { switch (ppc_state.fpscr & 0x3) { @@ -668,15 +680,15 @@ void dppc_interpreter::ppc_fctiwz() { if (std::isnan(val_reg_b)) { ppc_state.fpr[reg_d].int64_r = 0x80000000; - ppc_state.fpscr |= 0x1000100; + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN | (uint32_t)FPSCR_bit::FPSCR_VXCVI; } else if (val_reg_b > static_cast(0x7fffffff)) { ppc_state.fpr[reg_d].int64_r = 0x7fffffff; - ppc_state.fpscr |= 0x100; + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXCVI; } else if (val_reg_b < -static_cast(0x80000000)) { ppc_state.fpr[reg_d].int64_r = 0x80000000; - ppc_state.fpscr |= 0x100; + ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXCVI; } else { ppc_result64_d = round_to_zero(val_reg_b); @@ -873,22 +885,23 @@ void dppc_interpreter::ppc_fmr() { ppc_state.fpr[reg_d].dbl64_r = ppc_state.fpr[reg_b].dbl64_r; } - void dppc_interpreter::ppc_mffs() { ppc_grab_regsda(); - uint64_t fpstore1 = ppc_state.fpr[reg_d].int64_r & 0xFFFFFFFF00000000; - uint64_t fpstore2 = ppc_state.fpscr & 0x00000000FFFFFFFF; - fpstore1 |= fpstore2; - fp_save_uint64(fpstore1); -} + uint64_t fpstore1 = 0; -void dppc_interpreter::ppc_mffsdot() { - ppc_grab_regsda(); - uint64_t fpstore1 = ppc_state.fpr[reg_d].int64_r & 0xFFFFFFFF00000000; - uint64_t fpstore2 = ppc_state.fpscr & 0x00000000FFFFFFFF; + if (ppc_state.spr[SPR::PVR] == PPC_VER::MPC601) { + fpstore1 = ppc_state.fpr[reg_d].int64_r & ((uint64_t)0xFFF80000 << 32); + } + else { + fpstore1 = ppc_state.fpr[reg_d].int64_r & ((uint64_t)0xFFFFFFFF << 32); + } + + uint64_t fpstore2 = ppc_state.fpscr & (uint64_t)0xFFFFFFFF; fpstore1 |= fpstore2; fp_save_uint64(fpstore1); - ppc_fp_changecrf1(); + + if (rc_flag) + ppc_fp_changecrf1(); } void dppc_interpreter::ppc_mtfsf() { @@ -904,22 +917,9 @@ void dppc_interpreter::ppc_mtfsf() { crm += (((fm_mask >> 7) & 1) == 1) ? 0x0000000F : 0x00000000; uint32_t quickfprval = (uint32_t)ppc_state.fpr[reg_b].int64_r; ppc_state.fpscr = (quickfprval & crm) | (quickfprval & ~(crm)); -} -void dppc_interpreter::ppc_mtfsfdot() { - reg_b = (ppc_cur_instruction >> 11) & 31; - uint32_t fm_mask = (ppc_cur_instruction >> 17) & 255; - crm += ((fm_mask & 1) == 1) ? 0xF0000000 : 0x00000000; - crm += (((fm_mask >> 1) & 1) == 1) ? 0x0F000000 : 0x00000000; - crm += (((fm_mask >> 2) & 1) == 1) ? 0x00F00000 : 0x00000000; - crm += (((fm_mask >> 3) & 1) == 1) ? 0x000F0000 : 0x00000000; - crm += (((fm_mask >> 4) & 1) == 1) ? 0x0000F000 : 0x00000000; - crm += (((fm_mask >> 5) & 1) == 1) ? 0x00000F00 : 0x00000000; - crm += (((fm_mask >> 6) & 1) == 1) ? 0x000000F0 : 0x00000000; - crm += (((fm_mask >> 7) & 1) == 1) ? 0x0000000F : 0x00000000; - uint32_t quickfprval = (uint32_t)ppc_state.fpr[reg_b].int64_r; - ppc_state.fpscr = (quickfprval & crm) | (quickfprval & ~(crm)); - ppc_fp_changecrf1(); + if (rc_flag) + ppc_fp_changecrf1(); } void dppc_interpreter::ppc_mtfsfi() { @@ -928,15 +928,9 @@ void dppc_interpreter::ppc_mtfsfi() { crf_d = crf_d << 2; ppc_state.fpscr = (ppc_state.cr & ~(0xF0000000UL >> crf_d)) | ((ppc_state.spr[SPR::XER] & 0xF0000000UL) >> crf_d); -} -void dppc_interpreter::ppc_mtfsfidot() { - ppc_result_b = (ppc_cur_instruction >> 11) & 15; - crf_d = (ppc_cur_instruction >> 23) & 7; - crf_d = crf_d << 2; - ppc_state.fpscr = (ppc_state.cr & ~(0xF0000000UL >> crf_d)) | - ((ppc_state.spr[SPR::XER] & 0xF0000000UL) >> crf_d); - ppc_fp_changecrf1(); + if (rc_flag) + ppc_fp_changecrf1(); } void dppc_interpreter::ppc_mtfsb0() { @@ -944,14 +938,9 @@ void dppc_interpreter::ppc_mtfsb0() { if ((crf_d == 0) || (crf_d > 2)) { ppc_state.fpscr &= ~(0x80000000UL >> crf_d); } -} -void dppc_interpreter::ppc_mtfsb0dot() { - crf_d = (ppc_cur_instruction >> 21) & 0x1F; - if ((crf_d == 0) || (crf_d > 2)) { - ppc_state.fpscr &= ~(0x80000000UL >> crf_d); - } - ppc_fp_changecrf1(); + if (rc_flag) + ppc_fp_changecrf1(); } void dppc_interpreter::ppc_mtfsb1() { @@ -959,14 +948,9 @@ void dppc_interpreter::ppc_mtfsb1() { if ((crf_d == 0) || (crf_d > 2)) { ppc_state.fpscr |= (0x80000000UL >> crf_d); } -} -void dppc_interpreter::ppc_mtfsb1dot() { - crf_d = (ppc_cur_instruction >> 21) & 0x1F; - if ((crf_d == 0) || (crf_d > 2)) { - ppc_state.fpscr |= (0x80000000UL >> crf_d); - } - ppc_fp_changecrf1(); + if (rc_flag) + ppc_fp_changecrf1(); } void dppc_interpreter::ppc_mcrfs() { From 5672a154cb7d85c53dc66a9bea016646852dec6d Mon Sep 17 00:00:00 2001 From: dingusdev Date: Sun, 10 Oct 2021 07:48:49 -0700 Subject: [PATCH 03/11] Floating-point refactor, part 3 Condensed code to shorten enum names and remove casting. Condensed mffs and partially fixed NAN checks for FADD(S). --- cpu/ppc/ppcemu.h | 70 +++++++++++++++---------------- cpu/ppc/ppcfpopcodes.cpp | 91 ++++++++++++++++++---------------------- 2 files changed, 75 insertions(+), 86 deletions(-) diff --git a/cpu/ppc/ppcemu.h b/cpu/ppc/ppcemu.h index a4bacb2..b965b02 100644 --- a/cpu/ppc/ppcemu.h +++ b/cpu/ppc/ppcemu.h @@ -200,57 +200,57 @@ enum class BB_end_kind { BB_RFI /* the rfi instruction is encountered */ }; -enum class CR_select { +enum CR_select : int32_t { CR0_field = (0xF << 28), CR1_field = (0xF << 24), }; -enum class CRx_bit { +enum CRx_bit : uint32_t { CR_SO = 0, CR_EQ, CR_GT, CR_LT }; -enum class CR1_bit { +enum CR1_bit : uint32_t { CR1_OX = 24, CR1_VX, CR1_FEX, CR1_FX, }; -enum class FPSCR_bit { - FPSCR_RN = 0x3, - FPSCR_NI = 0x4, - FPSCR_XE = 0x8, - FPSCR_ZE = 0x10, - FPSCR_UE = 0x20, - FPSCR_OE = 0x40, - FPSCR_VE = 0x80, - FPSCR_VXCVI = 0x100, - FPSCR_VXSQRT = 0x200, - FPSCR_VXSOFT = 0x400, - FPSCR_FPRF = 0x1F000, - FPSCR_FPCC_FUNAN = 0x10000, - FPSCR_FPCC_ZERO = 0x8000, - FPSCR_FPCC_POS = 0x4000, - FPSCR_FPCC_NEG = 0x2000, - FPSCR_FPCC_FPRCD = 0x1000, - FPSCR_FI = (1 << 17), - FPSCR_FR = (1 << 18), - FPSCR_VXVC = (1 << 19), - FPSCR_VXIMZ = (1 << 20), - FPSCR_VXZDZ = (1 << 21), - FPSCR_VXIDI = (1 << 22), - FPSCR_VXISI = (1 << 23), - FPSCR_VXSNAN = (1 << 24), - FPSCR_XX = (1 << 25), - FPSCR_ZX = (1 << 26), - FPSCR_UX = (1 << 27), - FPSCR_OX = (1 << 28), - FPSCR_VX = (1 << 29), - FPSCR_FEX = (1 << 30), - FPSCR_FX = (1 << 31) +enum FPSCR : uint32_t { + RN = 0x3, + NI = 0x4, + XE = 0x8, + ZE = 0x10, + UE = 0x20, + OE = 0x40, + VE = 0x80, + VXCVI = 0x100, + VXSQRT = 0x200, + VXSOFT = 0x400, + FPRF = 0x1F000, + FPCC_FUNAN = 0x10000, + FPCC_ZERO = 0x8000, + FPCC_POS = 0x4000, + FPCC_NEG = 0x2000, + FPCC_FPRCD = 0x1000, + FI = 0x20000, + FR = 0x40000, + VXVC = 0x80000, + VXIMZ = 0x100000, + VXZDZ = 0x200000, + VXIDI = 0x400000, + VXISI = 0x800000, + VXSNAN = 0x1000000, + XX = 0x2000000, + ZX = 0x4000000, + UX = 0x8000000, + OX = 0x10000000, + VX = 0x20000000, + FEX = 0x40000000, + FX = 0x80000000 }; //for inf and nan checks diff --git a/cpu/ppc/ppcfpopcodes.cpp b/cpu/ppc/ppcfpopcodes.cpp index 9bfd5ee..6a3681b 100644 --- a/cpu/ppc/ppcfpopcodes.cpp +++ b/cpu/ppc/ppcfpopcodes.cpp @@ -180,7 +180,7 @@ int64_t round_to_neg_inf(double f) { return static_cast(floor(f)); } -void update_fpscr_fex() { +void update_fex() { int fex_result = !!((ppc_state.fpscr & (ppc_state.fpscr << 22)) & 0x3E000000); ppc_state.fpscr = (ppc_state.fpscr & ~0x40000000) | (fex_result << 30); } @@ -198,64 +198,64 @@ constexpr auto ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chose switch (op) { case FPOP::DIV: if (isnan(input_a) && isnan(input_b)) { - ppc_state.fpscr |= ((uint32_t)FPSCR_bit::FPSCR_FX | (uint32_t)FPSCR_bit::FPSCR_VXIDI); + ppc_state.fpscr |= (FPSCR::FX | FPSCR::VXIDI); inf_or_nan = true; } else if ((input_a == FP_ZERO) && (input_b == FP_ZERO)) { - ppc_state.fpscr |= ((uint32_t)FPSCR_bit::FPSCR_FX | (uint32_t)FPSCR_bit::FPSCR_VXZDZ); + ppc_state.fpscr |= (FPSCR::FX | FPSCR::VXZDZ); inf_or_nan = true; } - update_fpscr_fex(); + update_fex(); return inf_or_nan; break; case FPOP::SUB: if (isnan(input_a) && isnan(input_b)) { - ppc_state.fpscr |= ((uint32_t)FPSCR_bit::FPSCR_FX | (uint32_t)FPSCR_bit::FPSCR_VXISI); + ppc_state.fpscr |= (FPSCR::FX | FPSCR::VXISI); inf_or_nan = true; } - update_fpscr_fex(); + update_fex(); return inf_or_nan; break; case FPOP::ADD: - if ((isnan(input_a) & (input_b == FP_ZERO)) | (isnan(input_b) & (input_a == FP_ZERO))) { - ppc_state.fpscr |= 0x80100000; + if (isnan(input_a) && isnan(input_b)) { + ppc_state.fpscr |= (FPSCR::FX | FPSCR::VXISI); inf_or_nan = true; } - update_fpscr_fex(); + update_fex(); return inf_or_nan; break; case FPOP::MUL: if (((input_a == FP_ZERO) && (input_c == FP_INFINITE)) || ((input_c == FP_ZERO) && (input_a == FP_INFINITE))) { ppc_state.fpscr |= - ((uint32_t)FPSCR_bit::FPSCR_FX | (uint32_t)FPSCR_bit::FPSCR_VXSNAN | - (uint32_t)FPSCR_bit::FPSCR_VXIMZ); + (FPSCR::FX | FPSCR::VXSNAN | + FPSCR::VXIMZ); inf_or_nan = true; } - update_fpscr_fex(); + update_fex(); return inf_or_nan; break; case FPOP::FMSUB: case FPOP::FNMSUB: if (isnan(input_a) || isnan(input_b) || isnan(input_c)) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; + ppc_state.fpscr |= FPSCR::VXSNAN; inf_or_nan = true; if (((input_a == FP_ZERO) && (input_c == FP_INFINITE)) || ((input_c == FP_ZERO) && (input_a == FP_INFINITE))) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXIMZ; + ppc_state.fpscr |= FPSCR::VXIMZ; } } - update_fpscr_fex(); + update_fex(); return inf_or_nan; break; case FPOP::FMADD: case FPOP::FNMADD: if (isnan(input_a) || isnan(input_b) || isnan(input_c)) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; + ppc_state.fpscr |= FPSCR::VXSNAN; inf_or_nan = true; } - update_fpscr_fex(); + update_fex(); return inf_or_nan; break; default: @@ -267,23 +267,23 @@ void fpresult_update(double set_result, bool confirm_arc) { bool confirm_ov = (bool)std::fetestexcept(FE_OVERFLOW); if (confirm_ov) { - ppc_state.fpscr |= ((uint32_t)FPSCR_bit::FPSCR_FX | ((uint32_t)FPSCR_bit::FPSCR_FPRF & (uint32_t)FPSCR_bit::FPSCR_FPCC_FUNAN)); + ppc_state.fpscr |= (FPSCR::FX | (FPSCR::FPRF & FPSCR::FPCC_FUNAN)); } if (confirm_arc) { - ppc_state.fpscr |= ((uint32_t)FPSCR_bit::FPSCR_FX | ((uint32_t)FPSCR_bit::FPSCR_FPRF & (uint32_t)FPSCR_bit::FPSCR_FPCC_FUNAN)); + ppc_state.fpscr |= (FPSCR::FX | (FPSCR::FPRF & FPSCR::FPCC_FUNAN)); ppc_state.fpscr &= 0xFFFF0FFF; if (set_result == 0.0) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_FPCC_NEG; + ppc_state.fpscr |= FPSCR::FPCC_NEG; } else { if (set_result < 0.0) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_FPCC_ZERO; + ppc_state.fpscr |= FPSCR::FPCC_ZERO; } else if (set_result > 0.0) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_FPCC_POS; + ppc_state.fpscr |= FPSCR::FPCC_POS; } else { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_FPCC_FPRCD; + ppc_state.fpscr |= FPSCR::FPCC_FPRCD; } } } @@ -453,8 +453,6 @@ void dppc_interpreter::ppc_fdivs() { void dppc_interpreter::ppc_fmadds() { ppc_grab_regsfpdabc(); - float intermediate; - if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FMADD)) { ppc_dblresult64_d = static_cast(std::fma( (float)val_reg_a, (float)val_reg_c, (float)val_reg_b)); @@ -620,13 +618,13 @@ void dppc_interpreter::ppc_fres() { ppc_store_dfpresult_flt(reg_d); if (start_num == 0.0) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_ZX; + ppc_state.fpscr |= FPSCR::ZX; } else if (std::isnan(start_num)) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; + ppc_state.fpscr |= FPSCR::VXSNAN; } else if (std::isinf(start_num)){ - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; + ppc_state.fpscr |= FPSCR::VXSNAN; ppc_state.fpscr &= 0xFFF9FFFF; } @@ -640,15 +638,15 @@ void dppc_interpreter::ppc_fctiw() { if (std::isnan(val_reg_b)) { ppc_state.fpr[reg_d].int64_r = 0x80000000; - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN | (uint32_t)FPSCR_bit::FPSCR_VXCVI; + ppc_state.fpscr |= FPSCR::VXSNAN | FPSCR::VXCVI; } else if (val_reg_b > static_cast(0x7fffffff)) { ppc_state.fpr[reg_d].int64_r = 0x7fffffff; - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXCVI; + ppc_state.fpscr |= FPSCR::VXCVI; } else if (val_reg_b < -static_cast(0x80000000)) { ppc_state.fpr[reg_d].int64_r = 0x80000000; - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXCVI; + ppc_state.fpscr |= FPSCR::VXCVI; } else { switch (ppc_state.fpscr & 0x3) { @@ -680,15 +678,15 @@ void dppc_interpreter::ppc_fctiwz() { if (std::isnan(val_reg_b)) { ppc_state.fpr[reg_d].int64_r = 0x80000000; - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN | (uint32_t)FPSCR_bit::FPSCR_VXCVI; + ppc_state.fpscr |= FPSCR::VXSNAN | FPSCR::VXCVI; } else if (val_reg_b > static_cast(0x7fffffff)) { ppc_state.fpr[reg_d].int64_r = 0x7fffffff; - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXCVI; + ppc_state.fpscr |= FPSCR::VXCVI; } else if (val_reg_b < -static_cast(0x80000000)) { ppc_state.fpr[reg_d].int64_r = 0x80000000; - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXCVI; + ppc_state.fpscr |= FPSCR::VXCVI; } else { ppc_result64_d = round_to_zero(val_reg_b); @@ -887,17 +885,8 @@ void dppc_interpreter::ppc_fmr() { void dppc_interpreter::ppc_mffs() { ppc_grab_regsda(); - uint64_t fpstore1 = 0; - - if (ppc_state.spr[SPR::PVR] == PPC_VER::MPC601) { - fpstore1 = ppc_state.fpr[reg_d].int64_r & ((uint64_t)0xFFF80000 << 32); - } - else { - fpstore1 = ppc_state.fpr[reg_d].int64_r & ((uint64_t)0xFFFFFFFF << 32); - } - - uint64_t fpstore2 = ppc_state.fpscr & (uint64_t)0xFFFFFFFF; - fpstore1 |= fpstore2; + uint64_t fpstore1 = ppc_state.fpr[reg_d].int64_r & ((uint64_t)0xFFF80000 << 32); + fpstore1 |= (uint64_t)ppc_state.fpscr; fp_save_uint64(fpstore1); if (rc_flag) @@ -981,17 +970,17 @@ void dppc_interpreter::ppc_fcmpo() { fpresult_update(db_test_a, true); - ppc_state.fpscr = (ppc_state.fpscr & ~((uint32_t)FPSCR_bit::FPSCR_FPRF)) | (cmp_c << 12); + ppc_state.fpscr = (ppc_state.fpscr & ~(FPSCR::FPRF)) | (cmp_c << 12); ppc_state.cr = ((ppc_state.cr & ~((uint32_t)CR_select::CR0_field >> crf_d)) | ((cmp_c + xercon) >> crf_d)); if (std::isnan(db_test_a) || std::isnan(db_test_b)) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; + ppc_state.fpscr |= FPSCR::VXSNAN; if (ppc_state.fpscr & 0x80) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXVC; + ppc_state.fpscr |= FPSCR::VXVC; } } else if ((db_test_a == qnan) || (db_test_b == qnan)) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXVC; + ppc_state.fpscr |= FPSCR::VXVC; } } @@ -1012,11 +1001,11 @@ void dppc_interpreter::ppc_fcmpu() { fpresult_update(db_test_a, true); - ppc_state.fpscr = (ppc_state.fpscr & ~((uint32_t)FPSCR_bit::FPSCR_FPRF)) | (cmp_c << 12); + ppc_state.fpscr = (ppc_state.fpscr & ~(FPSCR::FPRF)) | (cmp_c << 12); ppc_state.cr = ((ppc_state.cr & ~((uint32_t)CR_select::CR0_field >> crf_d)) | ((cmp_c + xercon) >> crf_d)); if (std::isnan(db_test_a) || std::isnan(db_test_b)) { - ppc_state.fpscr |= (uint32_t)FPSCR_bit::FPSCR_VXSNAN; + ppc_state.fpscr |= FPSCR::VXSNAN; } } From 9251745d6fb683878667b0eb220e3712a3dd9bbd Mon Sep 17 00:00:00 2001 From: dingusdev Date: Thu, 14 Oct 2021 07:19:04 -0700 Subject: [PATCH 04/11] Fixed floating-point test generation --- cpu/ppc/test/genppctests.py | 216 ++++++--- cpu/ppc/test/ppcfloattest.txt | 770 ++++++++++++++++++++++++++++++++ cpu/ppc/test/ppcfloattests.csv | 775 ++++++++++++++++++++++++++++++++- cpu/ppc/test/ppctests.cpp | 11 +- 4 files changed, 1716 insertions(+), 56 deletions(-) diff --git a/cpu/ppc/test/genppctests.py b/cpu/ppc/test/genppctests.py index 502697d..4fa4d13 100644 --- a/cpu/ppc/test/genppctests.py +++ b/cpu/ppc/test/genppctests.py @@ -127,14 +127,18 @@ def gen_ppc_opcode(opc_str, imm): return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x12 << 1) elif opc_str == "FDIV.": return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x12 << 1) + 1 + elif opc_str == "FDIVS": + return (0x3B << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x12 << 1) + elif opc_str == "FDIVS.": + return (0x3B << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x12 << 1) + 1 elif opc_str == "FMADD": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1D << 1) + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1D << 1) elif opc_str == "FMADD.": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1D << 1) + 1 + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1D << 1) + 1 elif opc_str == "FMADDS": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1D << 1) + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1D << 1) elif opc_str == "FMADDS.": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1D << 1) + 1 + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1D << 1) + 1 elif opc_str == "FMUL": return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 6) + (0x19 << 1) elif opc_str == "FMUL.": @@ -152,29 +156,29 @@ def gen_ppc_opcode(opc_str, imm): elif opc_str == "FMULS.": return (0x3B << 26) + (3 << 21) + (3 << 16) + (4 << 6) + (0x28 << 1) + 1 elif opc_str == "FMSUB": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1C << 1) + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1C << 1) elif opc_str == "FMSUB.": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1C << 1) + 1 + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1C << 1) + 1 elif opc_str == "FMSUBS": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1C << 1) + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1C << 1) elif opc_str == "FMSUBS.": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1C << 1) + 1 + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1C << 1) + 1 elif opc_str == "FNMADD": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1F << 1) + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1F << 1) elif opc_str == "FNMADD.": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1F << 1) + 1 + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1F << 1) + 1 elif opc_str == "FNMADDS": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1F << 1) + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1F << 1) elif opc_str == "FNMADDS.": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1F << 1) + 1 + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1F << 1) + 1 elif opc_str == "FNMSUB": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1C << 1) + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1C << 1) elif opc_str == "FNMSUB.": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1C << 1) + 1 + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1C << 1) + 1 elif opc_str == "FNMSUBS": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1C << 1) + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1C << 1) elif opc_str == "FNMSUBS.": - return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (4 << 6) + (0x1C << 1) + 1 + return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (5 << 6) + (0x1C << 1) + 1 elif opc_str == "FSUB": return (0x3F << 26) + (3 << 21) + (3 << 16) + (4 << 11) + (0x15 << 1) elif opc_str == "FSUB.": @@ -346,7 +350,6 @@ def extract_rot_params(line): pos += 16 return (sh, mb, me) - if __name__ == "__main__": with open("ppcinttest.txt", "r") as in_file: with open("ppcinttests.csv", "w") as out_file: @@ -404,41 +407,152 @@ if __name__ == "__main__": line = line.strip() opcode = (line[0:8]).rstrip().upper() - out_file.write(opcode + ",") + out_file.write(opcode+ ",") + out_file.write("0x{:X}".format(gen_ppc_opcode(opcode, 0))) - if opcode.startswith("RLWI"): - sh, mb, me = extract_rot_params(line) - out_file.write("0x{:X}".format(gen_rot_opcode(opcode, sh, mb, me))) - else: - imm = extract_imm(line) - out_file.write("0x{:X}".format(gen_ppc_opcode(opcode, imm))) - - pos = 12 + pos = 10 + checkstring = '' while pos < len(line): - reg_id = line[pos:pos+4] - if reg_id.startswith("frD"): - out_file.write(",frD=" + line[pos+4:pos+14]) - pos += 16 - elif reg_id.startswith("frA"): - out_file.write(",frA=" + line[pos+4:pos+14]) - pos += 16 - elif reg_id.startswith("frB"): - out_file.write(",frB=" + line[pos+4:pos+14]) - pos += 16 - elif reg_id.startswith("frC"): - out_file.write(",frC=" + line[pos+4:pos+14]) - pos += 16 - elif reg_id.startswith("FPSCR:"): - out_file.write(",FPSCR=" + line[pos+7:pos+17]) - pos += 19 - elif reg_id.startswith("CR:"): - out_file.write(",CR=" + line[pos+4:pos+14]) - pos += 17 - elif reg_id.startswith("imm"): - pos += 17 # ignore immediate operands - else: - out_file.write("Unknown reg ID" + reg_id) - break + if (line[pos].isalnum()): + checkstring += line[pos] - out_file.write("\n") \ No newline at end of file + if ("RTN" in checkstring): + out_file.write(",round=RTN") + checkstring = '' + pos += 1 + if ("RTZ" in checkstring): + out_file.write(",round=RTZ") + checkstring = '' + pos += 1 + if ("RTPI" in checkstring): + out_file.write(",round=RPI") + checkstring = '' + pos += 1 + if ("RTNI" in checkstring): + out_file.write(",round=RNI") + checkstring = '' + pos += 1 + if ("VE" in checkstring): + out_file.write(",round=VEN") + checkstring = '' + pos += 1 + if ("frD" in checkstring): + out_file.write(",frD=" + line[pos+4:pos+20]) + checkstring = '' + if ("frA" in checkstring): #sloppy temp code + check2 = line[pos+1:pos+10] + if ("-inf" in check2): + out_file.write(",frA=-inf") + elif ("inf" in check2): + out_file.write(",frA=inf") + pos += 1 + elif ("nan" in check2): + out_file.write(",frA=nan") + pos += 1 + elif ("-0." or "-2." or "-4." or \ + "-6." or "-8." or "-7." or\ + "-5." or "-3." or "-1." or \ + "-9." in check2): + get_pos = line[pos+2:pos+16].strip("|") + out_file.write(",frA=" + get_pos.strip()) + elif ("0." or "2." or "4." or \ + "6." or "8." or "7." or\ + "5." or "3." or "1." or \ + "9." in check2): + get_pos = line[pos+2:pos+15] + out_file.write(",frA=" + get_pos.strip()) + checkstring = '' + if ("frB" in checkstring): #sloppy temp code + check2 = line[pos+1:pos+10] + if ("-inf" in check2): + out_file.write(",frB=-inf") + elif ("inf" in check2): + out_file.write(",frB=inf") + pos += 1 + elif ("nan" in check2): + out_file.write(",frB=nan") + pos += 1 + elif ("-0." or "-2." or "-4." or \ + "-6." or "-8." or "-7." or\ + "-5." or "-3." or "-1." or \ + "-9." in check2): + get_pos = line[pos+2:pos+16].strip("|") + out_file.write(",frB=" + get_pos.strip()) + elif ("0." or "2." or "4." or \ + "6." or "8." or "7." or\ + "5." or "3." or "1." or \ + "9." in check2): + get_pos = line[pos+2:pos+15] + out_file.write(",frB=" + get_pos.strip()) + checkstring = '' + if ("frC" in checkstring): #sloppy temp code + check2 = line[pos+1:pos+10] + if ("-inf" in check2): + out_file.write(",frC=-inf") + elif ("inf" in check2): + out_file.write(",frC=inf") + pos += 1 + elif ("nan" in check2): + out_file.write(",frC=nan") + pos += 1 + elif ("-0." or "-2." or "-4." or \ + "-6." or "-8." or "-7." or\ + "-5." or "-3." or "-1." or \ + "-9." in check2): + get_pos = line[pos+2:pos+16].strip("|") + out_file.write(",frC=" + get_pos.strip()) + elif ("0." or "2." or "4." or \ + "6." or "8." or "7." or\ + "5." or "3." or "1." or \ + "9." in check2): + get_pos = line[pos+2:pos+15] + out_file.write(",frC=" + get_pos.strip()) + checkstring = '' + if ("FPSCR" in checkstring): + out_file.write(",FPSCR=" + line[pos+3:pos+13]) + checkstring = '' + if ("CR" in checkstring): + out_file.write(",CR=" + line[pos+3:pos+14]) + checkstring = '' + pos += 1 + + # reg_id = line[pos:pos+4] + # if reg_id.startswith("frD"): + # out_file.write(",frD=" + line[pos+4:pos+22]) + # pos += 24 + # elif reg_id.startswith("frA"): + # out_file.write(",frA=" + line[pos+4:pos+14]) + # pos += 16 + # elif reg_id.startswith("frB"): + # out_file.write(",frB=" + line[pos+4:pos+14]) + # pos += 16 + # elif reg_id.startswith("frC"): + # out_file.write(",frC=" + line[pos+4:pos+14]) + # pos += 16 + # elif reg_id.startswith("FPSCR:"): + # out_file.write(",FPSCR=" + line[pos+7:pos+17]) + # pos += 19 + # elif reg_id.startswith("CR:"): + # out_file.write(",CR=" + line[pos+4:pos+14]) + # pos += 17 + # elif reg_id.startswith("VE)"): + # out_file.write("round=VEN" + line[pos+4:pos+20]) + # pos += 17 + # elif reg_id.startswith("TN)"): + # out_file.write("round=RTN" + line[pos+4:pos+20]) + # pos += 17 + # elif reg_id.startswith("TZ)"): + # out_file.write("round=RTZ" + line[pos+4:pos+20]) + # pos += 17 + # elif reg_id.startswith("NI)"): + # out_file.write("round=RNI" + line[pos+4:pos+20]) + # pos += 17 + # elif reg_id.startswith("PI)"): + # out_file.write("round=RPI" + line[pos+4:pos+20]) + # pos += 17 + # else: + # out_file.write("Unknown reg ID" + reg_id) + # break + + out_file.write("\n") diff --git a/cpu/ppc/test/ppcfloattest.txt b/cpu/ppc/test/ppcfloattest.txt index 05fad1b..3efecca 100644 --- a/cpu/ppc/test/ppcfloattest.txt +++ b/cpu/ppc/test/ppcfloattest.txt @@ -2,3 +2,773 @@ FADD (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 FADD (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 FADD (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 FADD (RTNI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FADD (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FADD (RTN) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004003 | CR: 0x40000002 +FADD (VE) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004080 | CR: 0x00000000 +FADD (RTN) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FADD (VE) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FADD (RTN) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FADD (VE) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FADD (RTN) :: frD 0x36FC000202CF42BF | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00004000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x36FC000202CF42BF | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00004001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x36FC000202CF42BF | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00004002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x36FC000202CF42BF | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00004003 | CR: 0x40000002 +FADD (VE) :: frD 0x36FC000202CF42BF | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00004080 | CR: 0x00000000 +FADD (RTN) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x92025000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x7FEFFFFFFFFFFFFF | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x92024001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x92025002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x7FEFFFFFFFFFFFFF | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x92024003 | CR: 0x40000002 +FADD (VE) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x92025080 | CR: 0x00000000 +FADD (RTN) :: frD 0xFFF0000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92029000 | CR: 0x20000000 +FADD (RTZ) :: frD 0xFFEFFFFFFFFFFFFF | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92028001 | CR: 0x40000002 +FADD (RTPI) :: frD 0xFFEFFFFFFFFFFFFF | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92028002 | CR: 0x40000002 +FADD (RTNI) :: frD 0xFFF0000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92029003 | CR: 0x40000002 +FADD (VE) :: frD 0xFFF0000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92029080 | CR: 0x00000000 +FADD (RTN) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x8000000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00012003 | CR: 0x40000002 +FADD (VE) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002080 | CR: 0x00000000 +FADD (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x40000002 +FADD (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x00000000 +FADD (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FADD (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FADD (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FADD (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FADD (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FADD (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FADD (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FADD (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FADD (RTN) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FADD (VE) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FADD (RTN) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811003 | CR: 0x40000002 +FADD (VE) :: frD 0x0000000000000000 | frA inf | frB -inf | FPSCR: 0xE0800080 | CR: 0x00000000 +FADD (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811000 | CR: 0x20000000 +FADD (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811001 | CR: 0x40000002 +FADD (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811002 | CR: 0x40000002 +FADD (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811003 | CR: 0x40000002 +FADD (VE) :: frD 0x0000000000000000 | frA -inf | frB inf | FPSCR: 0xE0800080 | CR: 0x00000000 +FADD (RTN) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FADD (RTZ) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FADD (RTPI) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FADD (RTNI) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FADD (VE) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FADD. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004003 | CR: 0x40000002 +FADD. (VE) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FADD. (VE) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FADD. (VE) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x36FC000202CF42BF | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00004000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x36FC000202CF42BF | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00004001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x36FC000202CF42BF | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00004002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x36FC000202CF42BF | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00004003 | CR: 0x40000002 +FADD. (VE) :: frD 0x36FC000202CF42BF | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00004080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x92025000 | CR: 0x29000000 +FADD. (RTZ) :: frD 0x7FEFFFFFFFFFFFFF | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x92024001 | CR: 0x49000002 +FADD. (RTPI) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x92025002 | CR: 0x49000002 +FADD. (RTNI) :: frD 0x7FEFFFFFFFFFFFFF | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x92024003 | CR: 0x49000002 +FADD. (VE) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x92025080 | CR: 0x09000000 +FADD. (RTN) :: frD 0xFFF0000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92029000 | CR: 0x29000000 +FADD. (RTZ) :: frD 0xFFEFFFFFFFFFFFFF | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92028001 | CR: 0x49000002 +FADD. (RTPI) :: frD 0xFFEFFFFFFFFFFFFF | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92028002 | CR: 0x49000002 +FADD. (RTNI) :: frD 0xFFF0000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92029003 | CR: 0x49000002 +FADD. (VE) :: frD 0xFFF0000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92029080 | CR: 0x09000000 +FADD. (RTN) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x8000000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00012003 | CR: 0x40000002 +FADD. (VE) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x2A000000 +FADD. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x4A000002 +FADD. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x4A000002 +FADD. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x4A000002 +FADD. (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x0E000000 +FADD. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FADD. (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FADD. (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FADD. (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FADD. (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FADD. (VE) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FADD. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811000 | CR: 0x2A000000 +FADD. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811001 | CR: 0x4A000002 +FADD. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811002 | CR: 0x4A000002 +FADD. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811003 | CR: 0x4A000002 +FADD. (VE) :: frD 0x0000000000000000 | frA inf | frB -inf | FPSCR: 0xE0800080 | CR: 0x0E000000 +FADD. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811000 | CR: 0x2A000000 +FADD. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811001 | CR: 0x4A000002 +FADD. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811002 | CR: 0x4A000002 +FADD. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811003 | CR: 0x4A000002 +FADD. (VE) :: frD 0x0000000000000000 | frA -inf | frB inf | FPSCR: 0xE0800080 | CR: 0x0E000000 +FADD. (RTN) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FADD. (RTZ) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FADD. (RTPI) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FADD. (RTNI) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FADD. (VE) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FADDS (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004003 | CR: 0x40000002 +FADDS (VE) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FADDS (VE) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FADDS (VE) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x36FC000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x8A034000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x36FC000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x8A034001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x36FC800000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x8A074002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x36FC000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x8A034003 | CR: 0x40000002 +FADDS (VE) :: frD 0x36FC000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x8A034080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x7FF0000000000000 | frA 3.402823e+38 | frB 3.402823e+38 | FPSCR: 0x92025000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x47EFFFFFE0000000 | frA 3.402823e+38 | frB 3.402823e+38 | FPSCR: 0x92024001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x7FF0000000000000 | frA 3.402823e+38 | frB 3.402823e+38 | FPSCR: 0x92025002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x47EFFFFFE0000000 | frA 3.402823e+38 | frB 3.402823e+38 | FPSCR: 0x92024003 | CR: 0x40000002 +FADDS (VE) :: frD 0x7FF0000000000000 | frA 3.402823e+38 | frB 3.402823e+38 | FPSCR: 0x92025080 | CR: 0x00000000 +FADDS (RTN) :: frD 0xFFF0000000000000 | frA -3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x92029000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0xC7EFFFFFE0000000 | frA -3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x92028001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0xC7EFFFFFE0000000 | frA -3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x92028002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0xFFF0000000000000 | frA -3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x92029003 | CR: 0x40000002 +FADDS (VE) :: frD 0xFFF0000000000000 | frA -3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x92029080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x0000000000000000 | frA 3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x00002000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x0000000000000000 | frA 3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x00002001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x0000000000000000 | frA 3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x00002002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x8000000000000000 | frA 3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x00012003 | CR: 0x40000002 +FADDS (VE) :: frD 0x0000000000000000 | frA 3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x00002080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x7FF0000000000000 | frA 0.000000e+00 | frB 1.797693e+308 | FPSCR: 0x92065000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x47EFFFFFE0000000 | frA 0.000000e+00 | frB 1.797693e+308 | FPSCR: 0x92024001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x7FF0000000000000 | frA 0.000000e+00 | frB 1.797693e+308 | FPSCR: 0x92065002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x47EFFFFFE0000000 | frA 0.000000e+00 | frB 1.797693e+308 | FPSCR: 0x92024003 | CR: 0x40000002 +FADDS (VE) :: frD 0x7FF0000000000000 | frA 0.000000e+00 | frB 1.797693e+308 | FPSCR: 0x92065080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x40000002 +FADDS (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FADDS (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FADDS (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FADDS (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FADDS (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FADDS (VE) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811003 | CR: 0x40000002 +FADDS (VE) :: frD 0x0000000000000000 | frA inf | frB -inf | FPSCR: 0xE0800080 | CR: 0x00000000 +FADDS (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811003 | CR: 0x40000002 +FADDS (VE) :: frD 0x0000000000000000 | frA -inf | frB inf | FPSCR: 0xE0800080 | CR: 0x00000000 +FADDS (RTN) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FADDS (RTZ) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FADDS (RTPI) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FADDS (RTNI) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FADDS (VE) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FADDS. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004003 | CR: 0x40000002 +FADDS. (VE) :: frD 0x3FF0000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00004080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FADDS. (VE) :: frD 0x4000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FADDS. (VE) :: frD 0x401C000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x36FC000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x8A034000 | CR: 0x28000000 +FADDS. (RTZ) :: frD 0x36FC000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x8A034001 | CR: 0x48000002 +FADDS. (RTPI) :: frD 0x36FC800000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x8A074002 | CR: 0x48000002 +FADDS. (RTNI) :: frD 0x36FC000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x8A034003 | CR: 0x48000002 +FADDS. (VE) :: frD 0x36FC000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x8A034080 | CR: 0x08000000 +FADDS. (RTN) :: frD 0x7FF0000000000000 | frA 3.402823e+38 | frB 3.402823e+38 | FPSCR: 0x92025000 | CR: 0x29000000 +FADDS. (RTZ) :: frD 0x47EFFFFFE0000000 | frA 3.402823e+38 | frB 3.402823e+38 | FPSCR: 0x92024001 | CR: 0x49000002 +FADDS. (RTPI) :: frD 0x7FF0000000000000 | frA 3.402823e+38 | frB 3.402823e+38 | FPSCR: 0x92025002 | CR: 0x49000002 +FADDS. (RTNI) :: frD 0x47EFFFFFE0000000 | frA 3.402823e+38 | frB 3.402823e+38 | FPSCR: 0x92024003 | CR: 0x49000002 +FADDS. (VE) :: frD 0x7FF0000000000000 | frA 3.402823e+38 | frB 3.402823e+38 | FPSCR: 0x92025080 | CR: 0x09000000 +FADDS. (RTN) :: frD 0xFFF0000000000000 | frA -3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x92029000 | CR: 0x29000000 +FADDS. (RTZ) :: frD 0xC7EFFFFFE0000000 | frA -3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x92028001 | CR: 0x49000002 +FADDS. (RTPI) :: frD 0xC7EFFFFFE0000000 | frA -3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x92028002 | CR: 0x49000002 +FADDS. (RTNI) :: frD 0xFFF0000000000000 | frA -3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x92029003 | CR: 0x49000002 +FADDS. (VE) :: frD 0xFFF0000000000000 | frA -3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x92029080 | CR: 0x09000000 +FADDS. (RTN) :: frD 0x0000000000000000 | frA 3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x00002000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0x0000000000000000 | frA 3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x00002001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0x0000000000000000 | frA 3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x00002002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0x8000000000000000 | frA 3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x00012003 | CR: 0x40000002 +FADDS. (VE) :: frD 0x0000000000000000 | frA 3.402823e+38 | frB -3.402823e+38 | FPSCR: 0x00002080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x7FF0000000000000 | frA 0.000000e+00 | frB 1.797693e+308 | FPSCR: 0x92065000 | CR: 0x29000000 +FADDS. (RTZ) :: frD 0x47EFFFFFE0000000 | frA 0.000000e+00 | frB 1.797693e+308 | FPSCR: 0x92024001 | CR: 0x49000002 +FADDS. (RTPI) :: frD 0x7FF0000000000000 | frA 0.000000e+00 | frB 1.797693e+308 | FPSCR: 0x92065002 | CR: 0x49000002 +FADDS. (RTNI) :: frD 0x47EFFFFFE0000000 | frA 0.000000e+00 | frB 1.797693e+308 | FPSCR: 0x92024003 | CR: 0x49000002 +FADDS. (VE) :: frD 0x7FF0000000000000 | frA 0.000000e+00 | frB 1.797693e+308 | FPSCR: 0x92065080 | CR: 0x09000000 +FADDS. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x2A000000 +FADDS. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x4A000002 +FADDS. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x4A000002 +FADDS. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x4A000002 +FADDS. (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x0E000000 +FADDS. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FADDS. (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FADDS. (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FADDS. (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FADDS. (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FADDS. (VE) :: frD 0x7FF0000000000000 | frA inf | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FADDS. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811000 | CR: 0x2A000000 +FADDS. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811001 | CR: 0x4A000002 +FADDS. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811002 | CR: 0x4A000002 +FADDS. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB -inf | FPSCR: 0xA0811003 | CR: 0x4A000002 +FADDS. (VE) :: frD 0x0000000000000000 | frA inf | frB -inf | FPSCR: 0xE0800080 | CR: 0x0E000000 +FADDS. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811000 | CR: 0x2A000000 +FADDS. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811001 | CR: 0x4A000002 +FADDS. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811002 | CR: 0x4A000002 +FADDS. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB inf | FPSCR: 0xA0811003 | CR: 0x4A000002 +FADDS. (VE) :: frD 0x0000000000000000 | frA -inf | frB inf | FPSCR: 0xE0800080 | CR: 0x0E000000 +FADDS. (RTN) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FADDS. (RTZ) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FADDS. (RTPI) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FADDS. (RTNI) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FADDS. (VE) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FCMPO :: frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x02000000 +FCMPO :: frA 0.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008000 | CR: 0x08000000 +FCMPO :: frA 1.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00004000 | CR: 0x04000000 +FCMPO :: frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002000 | CR: 0x02000000 +FCMPO :: frA 0.000000e+00 | frB 5.000000e-01 | FPSCR: 0x00008000 | CR: 0x08000000 +FCMPO :: frA 5.000000e-01 | frB 0.000000e+00 | FPSCR: 0x00004000 | CR: 0x04000000 +FCMPO :: frA nan | frB nan | FPSCR: 0xA0081000 | CR: 0x01000000 +FCMPO :: frA nan | frB nan | FPSCR: 0xA1081000 | CR: 0x01000000 +FCMPO :: frA inf | frB inf | FPSCR: 0x00002000 | CR: 0x02000000 +FCMPO :: frA inf | frB -inf | FPSCR: 0x00004000 | CR: 0x04000000 +FCMPO :: frA -inf | frB inf | FPSCR: 0x00008000 | CR: 0x08000000 +FCMPO :: frA -inf | frB -inf | FPSCR: 0x00002000 | CR: 0x02000000 +FCMPU :: frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x02000000 +FCMPU :: frA 0.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008000 | CR: 0x08000000 +FCMPU :: frA 1.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00004000 | CR: 0x04000000 +FCMPU :: frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002000 | CR: 0x02000000 +FCMPU :: frA 0.000000e+00 | frB 5.000000e-01 | FPSCR: 0x00008000 | CR: 0x08000000 +FCMPU :: frA 5.000000e-01 | frB 0.000000e+00 | FPSCR: 0x00004000 | CR: 0x04000000 +FCMPU :: frA nan | frB nan | FPSCR: 0x00001000 | CR: 0x01000000 +FCMPU :: frA nan | frB nan | FPSCR: 0xA1001000 | CR: 0x01000000 +FCMPU :: frA inf | frB inf | FPSCR: 0x00002000 | CR: 0x02000000 +FCMPU :: frA inf | frB -inf | FPSCR: 0x00004000 | CR: 0x04000000 +FCMPU :: frA -inf | frB inf | FPSCR: 0x00008000 | CR: 0x08000000 +FCMPU :: frA -inf | frB -inf | FPSCR: 0x00002000 | CR: 0x02000000 +FDIV (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x40000002 +FDIV (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x40000002 +FDIV (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x40000002 +FDIV (VE) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIV (VE) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIV (VE) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIV (VE) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIV (VE) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x3CCEE2604BFAFE52 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x3CCEE2604BFAFE52 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x3CCEE2604BFAFE53 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82064002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x3CCEE2604BFAFE52 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024003 | CR: 0x40000002 +FDIV (VE) :: frD 0x3CCEE2604BFAFE52 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x0000000000000000 | frA inf | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x0000000000000000 | frA nan | frB -inf | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIV (RTN) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIV (RTZ) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIV (RTPI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIV (RTNI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIV (VE) :: frD 0x0000000000000000 | frA -inf | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIV. (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x2A000000 +FDIV. (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x4A000002 +FDIV. (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x4A000002 +FDIV. (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x4A000002 +FDIV. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x0E000000 +FDIV. (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x2A000000 +FDIV. (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x4A000002 +FDIV. (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x4A000002 +FDIV. (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x4A000002 +FDIV. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x0E000000 +FDIV. (RTN) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x2A000000 +FDIV. (RTZ) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x4A000002 +FDIV. (RTPI) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x4A000002 +FDIV. (RTNI) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x4A000002 +FDIV. (VE) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x0E000000 +FDIV. (RTN) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIV. (RTZ) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIV. (RTPI) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIV. (RTNI) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIV. (VE) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIV. (RTN) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIV. (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIV. (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIV. (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIV. (VE) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIV. (RTN) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIV. (RTZ) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIV. (RTPI) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIV. (RTNI) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIV. (VE) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIV. (RTN) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIV. (RTZ) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIV. (RTPI) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIV. (RTNI) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIV. (VE) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIV. (RTN) :: frD 0x3CCEE2604BFAFE52 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024000 | CR: 0x28000000 +FDIV. (RTZ) :: frD 0x3CCEE2604BFAFE52 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024001 | CR: 0x48000002 +FDIV. (RTPI) :: frD 0x3CCEE2604BFAFE53 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82064002 | CR: 0x48000002 +FDIV. (RTNI) :: frD 0x3CCEE2604BFAFE52 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024003 | CR: 0x48000002 +FDIV. (VE) :: frD 0x3CCEE2604BFAFE52 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024080 | CR: 0x08000000 +FDIV. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIV. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIV. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIV. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIV. (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIV. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIV. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIV. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIV. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIV. (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIV. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIV. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIV. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIV. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIV. (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIV. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIV. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIV. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIV. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIV. (VE) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIV. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIV. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIV. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIV. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIV. (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIV. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FDIV. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FDIV. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FDIV. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FDIV. (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FDIV. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIV. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIV. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIV. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIV. (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIV. (RTN) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIV. (RTZ) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIV. (RTPI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIV. (RTNI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIV. (VE) :: frD 0x0000000000000000 | frA inf | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIV. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIV. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIV. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIV. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIV. (VE) :: frD 0x0000000000000000 | frA nan | frB -inf | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIV. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FDIV. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FDIV. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FDIV. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FDIV. (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FDIV. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIV. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIV. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIV. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIV. (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIV. (RTN) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIV. (RTZ) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIV. (RTPI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIV. (RTNI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIV. (VE) :: frD 0x0000000000000000 | frA -inf | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIVS (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x3CCEE26040000000 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x3CCEE26040000000 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x3CCEE26060000000 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82064002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x3CCEE26040000000 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x3CCEE26040000000 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x0000000000000000 | frA inf | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x0000000000000000 | frA nan | frB -inf | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIVS (RTN) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FDIVS (RTZ) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FDIVS (RTPI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FDIVS (RTNI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FDIVS (VE) :: frD 0x0000000000000000 | frA -inf | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FDIVS. (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x2A000000 +FDIVS. (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x4A000002 +FDIVS. (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x4A000002 +FDIVS. (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x4A000002 +FDIVS. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x0E000000 +FDIVS. (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x2A000000 +FDIVS. (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x4A000002 +FDIVS. (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x4A000002 +FDIVS. (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x4A000002 +FDIVS. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x0E000000 +FDIVS. (RTN) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x2A000000 +FDIVS. (RTZ) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x4A000002 +FDIVS. (RTPI) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x4A000002 +FDIVS. (RTNI) :: frD 0x7FF8000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xA0211003 | CR: 0x4A000002 +FDIVS. (VE) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0xE0200080 | CR: 0x0E000000 +FDIVS. (RTN) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIVS. (RTZ) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIVS. (RTPI) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIVS. (RTNI) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIVS. (VE) :: frD 0x3FF0000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIVS. (RTN) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIVS. (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIVS. (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIVS. (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIVS. (VE) :: frD 0x4000000000000000 | frA 1.000000e+01 | frB 5.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIVS. (RTN) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIVS. (RTZ) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIVS. (RTPI) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIVS. (RTNI) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIVS. (VE) :: frD 0x4000000000000000 | frA 4.936000e+00 | frB 2.468000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIVS. (RTN) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FDIVS. (RTZ) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FDIVS. (RTPI) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FDIVS. (RTNI) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FDIVS. (VE) :: frD 0x3FE0000000000000 | frA 2.468000e+00 | frB 4.936000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FDIVS. (RTN) :: frD 0x3CCEE26040000000 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024000 | CR: 0x28000000 +FDIVS. (RTZ) :: frD 0x3CCEE26040000000 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024001 | CR: 0x48000002 +FDIVS. (RTPI) :: frD 0x3CCEE26060000000 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82064002 | CR: 0x48000002 +FDIVS. (RTNI) :: frD 0x3CCEE26040000000 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024003 | CR: 0x48000002 +FDIVS. (VE) :: frD 0x3CCEE26040000000 | frA 2.101950e-44 | frB 2.452080e-29 | FPSCR: 0x82024080 | CR: 0x08000000 +FDIVS. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIVS. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIVS. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIVS. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIVS. (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIVS. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIVS. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIVS. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIVS. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIVS. (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIVS. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIVS. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIVS. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIVS. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIVS. (VE) :: frD 0x0000000000000000 | frA nan | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIVS. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIVS. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIVS. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIVS. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIVS. (VE) :: frD 0x7FF8000000000000 | frA nan | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIVS. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIVS. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIVS. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIVS. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIVS. (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIVS. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FDIVS. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FDIVS. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FDIVS. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FDIVS. (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FDIVS. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIVS. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIVS. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIVS. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIVS. (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIVS. (RTN) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIVS. (RTZ) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIVS. (RTPI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIVS. (RTNI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIVS. (VE) :: frD 0x0000000000000000 | frA inf | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIVS. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIVS. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIVS. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIVS. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB -inf | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIVS. (VE) :: frD 0x0000000000000000 | frA nan | frB -inf | FPSCR: 0xE1000080 | CR: 0x0E000000 +FDIVS. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FDIVS. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FDIVS. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FDIVS. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FDIVS. (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FDIVS. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FDIVS. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FDIVS. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FDIVS. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FDIVS. (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FDIVS. (RTN) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FDIVS. (RTZ) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FDIVS. (RTPI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FDIVS. (RTNI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FDIVS. (VE) :: frD 0x0000000000000000 | frA -inf | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 \ No newline at end of file diff --git a/cpu/ppc/test/ppcfloattests.csv b/cpu/ppc/test/ppcfloattests.csv index 09a3aba..253225e 100644 --- a/cpu/ppc/test/ppcfloattests.csv +++ b/cpu/ppc/test/ppcfloattests.csv @@ -1 +1,774 @@ -FADD,0xFC64282A,round=RTN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002000,CR=0x20000000 \ No newline at end of file +FADD,0xFC63202A,round=RTN,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002000,CR=0x20000000 +FADD,0xFC63202A,round=RTZ,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002001,CR=0x40000002 +FADD,0xFC63202A,round=RPI,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002002,CR=0x40000002 +FADD,0xFC63202A,round=RTN,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002003,CR=0x40000002 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+FDIVS.,0xEC632025,round=VEN,frD=0000000000000000,frA=nan,frB=inf,FPSCR=0xE1000080,CR=0x0E000000 +FDIVS.,0xEC632025,round=RTN,frD=7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011000,CR=0x20000000 +FDIVS.,0xEC632025,round=RTZ,frD=7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011001,CR=0x40000002 +FDIVS.,0xEC632025,round=RPI,frD=7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011002,CR=0x40000002 +FDIVS.,0xEC632025,round=RTN,frD=7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011003,CR=0x40000002 +FDIVS.,0xEC632025,round=VEN,frD=7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011080,CR=0x00000000 +FDIVS.,0xEC632025,round=RTN,frD=7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011000,CR=0x20000000 +FDIVS.,0xEC632025,round=RTZ,frD=7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011001,CR=0x40000002 +FDIVS.,0xEC632025,round=RPI,frD=7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011002,CR=0x40000002 +FDIVS.,0xEC632025,round=RTN,frD=7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011003,CR=0x40000002 +FDIVS.,0xEC632025,round=VEN,frD=7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011080,CR=0x00000000 +FDIVS.,0xEC632025,round=RTN,frD=7FFC000000000000,frA=inf,frB=nan,FPSCR=0xA1011000,CR=0x2A000000 +FDIVS.,0xEC632025,round=RTZ,frD=7FFC000000000000,frA=inf,frB=nan,FPSCR=0xA1011001,CR=0x4A000002 +FDIVS.,0xEC632025,round=RPI,frD=7FFC000000000000,frA=inf,frB=nan,FPSCR=0xA1011002,CR=0x4A000002 +FDIVS.,0xEC632025,round=RTN,frD=7FFC000000000000,frA=inf,frB=nan,FPSCR=0xA1011003,CR=0x4A000002 +FDIVS.,0xEC632025,round=VEN,frD=0000000000000000,frA=inf,frB=nan,FPSCR=0xE1000080,CR=0x0E000000 +FDIVS.,0xEC632025,round=RTN,frD=7FFC000000000000,frA=nan,frB=-inf,FPSCR=0xA1011000,CR=0x2A000000 +FDIVS.,0xEC632025,round=RTZ,frD=7FFC000000000000,frA=nan,frB=-inf,FPSCR=0xA1011001,CR=0x4A000002 +FDIVS.,0xEC632025,round=RPI,frD=7FFC000000000000,frA=nan,frB=-inf,FPSCR=0xA1011002,CR=0x4A000002 +FDIVS.,0xEC632025,round=RTN,frD=7FFC000000000000,frA=nan,frB=-inf,FPSCR=0xA1011003,CR=0x4A000002 +FDIVS.,0xEC632025,round=VEN,frD=0000000000000000,frA=nan,frB=-inf,FPSCR=0xE1000080,CR=0x0E000000 +FDIVS.,0xEC632025,round=RTN,frD=7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011000,CR=0x20000000 +FDIVS.,0xEC632025,round=RTZ,frD=7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011001,CR=0x40000002 +FDIVS.,0xEC632025,round=RPI,frD=7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011002,CR=0x40000002 +FDIVS.,0xEC632025,round=RTN,frD=7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011003,CR=0x40000002 +FDIVS.,0xEC632025,round=VEN,frD=7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011080,CR=0x00000000 +FDIVS.,0xEC632025,round=RTN,frD=7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011000,CR=0x20000000 +FDIVS.,0xEC632025,round=RTZ,frD=7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011001,CR=0x40000002 +FDIVS.,0xEC632025,round=RPI,frD=7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011002,CR=0x40000002 +FDIVS.,0xEC632025,round=RTN,frD=7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011003,CR=0x40000002 +FDIVS.,0xEC632025,round=VEN,frD=7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011080,CR=0x00000000 +FDIVS.,0xEC632025,round=RTN,frD=7FFC000000000000,frA=-inf,frB=nan,FPSCR=0xA1011000,CR=0x2A000000 +FDIVS.,0xEC632025,round=RTZ,frD=7FFC000000000000,frA=-inf,frB=nan,FPSCR=0xA1011001,CR=0x4A000002 +FDIVS.,0xEC632025,round=RPI,frD=7FFC000000000000,frA=-inf,frB=nan,FPSCR=0xA1011002,CR=0x4A000002 +FDIVS.,0xEC632025,round=RTN,frD=7FFC000000000000,frA=-inf,frB=nan,FPSCR=0xA1011003,CR=0x4A000002 +FDIVS.,0xEC632025,round=VEN,frD=0000000000000000,frA=-inf,frB=nan,FPSCR=0xE1000080,CR=0x0E000000 diff --git a/cpu/ppc/test/ppctests.cpp b/cpu/ppc/test/ppctests.cpp index 2e4eda3..90790d3 100644 --- a/cpu/ppc/test/ppctests.cpp +++ b/cpu/ppc/test/ppctests.cpp @@ -181,7 +181,6 @@ static void read_test_float_data() { opcode = stoul(tokens[1], NULL, 16); - dest = 0; src1 = 0; src2 = 0; check_xer = 0; @@ -207,7 +206,7 @@ static void read_test_float_data() { dfp_src3 = stoul(tokens[i].substr(4), NULL, 16); } else if (tokens[i].rfind("round=", 0) == 0) { rounding_mode = tokens[i].substr(6, 3); - ppc_state.fpscr &= 0xFFFFFFFC; + ppc_state.fpscr &= 0xFFFFFF7C; if (rounding_mode.compare("RTN") == 0) { ppc_state.fpscr |= 0x0; } else if (rounding_mode.compare("RTZ") == 0) { @@ -216,6 +215,8 @@ static void read_test_float_data() { ppc_state.fpscr |= 0x2; } else if (rounding_mode.compare("RNI") == 0) { ppc_state.fpscr |= 0x3; + } else if (rounding_mode.compare("VEN") == 0) { + ppc_state.fpscr |= FPSCR::VE; } else { cout << "ILLEGAL ROUNDING METHOD: " << tokens[i] << " in line " << lineno << ". Exiting..." << endl; @@ -248,11 +249,13 @@ static void read_test_float_data() { ntested++; - if ((tokens[0].rfind("FCMP") && (ppc_state.gpr[3] != dest)) || (ppc_state.fpscr != check_fpscr) || + if ((tokens[0].rfind("FCMP") && (ppc_state.gpr[3] != dfp_dest)) || + (ppc_state.fpscr != check_fpscr) || (ppc_state.cr != check_cr)) { cout << "Mismatch: instr=" << tokens[0] << ", src1=0x" << hex << src1 << ", src2=0x" << hex << src2 << endl; - cout << "expected: dest=0x" << hex << dest << ", FPSCR=0x" << hex << check_xer << ", CR=0x" + cout << "expected: dest=0x" << hex << dfp_dest << ", FPSCR=0x" << hex << check_xer + << ", CR=0x" << hex << check_cr << endl; cout << "got: dest=0x" << hex << ppc_state.gpr[3] << ", FPSCR=0x" << hex << ppc_state.fpscr << ", CR=0x" << hex << ppc_state.cr << endl; From 061b061813421b00c1ba222750d76cefd37d4553 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Thu, 14 Oct 2021 20:31:10 -0700 Subject: [PATCH 05/11] Floating point overhaul, part 4 Reworked the INF/NAN checks again - This time, only checking them when the result is calculated --- cpu/ppc/ppcfpopcodes.cpp | 207 +++++++++++++++++++++------------------ 1 file changed, 112 insertions(+), 95 deletions(-) diff --git a/cpu/ppc/ppcfpopcodes.cpp b/cpu/ppc/ppcfpopcodes.cpp index 6a3681b..ea77bb8 100644 --- a/cpu/ppc/ppcfpopcodes.cpp +++ b/cpu/ppc/ppcfpopcodes.cpp @@ -185,43 +185,34 @@ void update_fex() { ppc_state.fpscr = (ppc_state.fpscr & ~0x40000000) | (fex_result << 30); } -template -constexpr auto ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chosen_reg_3, uint32_t op) { +template +constexpr auto ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chosen_reg_3) { T input_a = T(ppc_state.fpr[chosen_reg_1].int64_r); T input_b = T(ppc_state.fpr[chosen_reg_2].int64_r); T input_c = T(ppc_state.fpr[chosen_reg_3].int64_r); ppc_state.fpscr &= 0x7fbfffff; - bool inf_or_nan = false; - - switch (op) { + switch (fpop) { case FPOP::DIV: if (isnan(input_a) && isnan(input_b)) { ppc_state.fpscr |= (FPSCR::FX | FPSCR::VXIDI); - inf_or_nan = true; } else if ((input_a == FP_ZERO) && (input_b == FP_ZERO)) { ppc_state.fpscr |= (FPSCR::FX | FPSCR::VXZDZ); - inf_or_nan = true; } update_fex(); - return inf_or_nan; break; case FPOP::SUB: if (isnan(input_a) && isnan(input_b)) { ppc_state.fpscr |= (FPSCR::FX | FPSCR::VXISI); - inf_or_nan = true; } update_fex(); - return inf_or_nan; break; case FPOP::ADD: if (isnan(input_a) && isnan(input_b)) { ppc_state.fpscr |= (FPSCR::FX | FPSCR::VXISI); - inf_or_nan = true; } update_fex(); - return inf_or_nan; break; case FPOP::MUL: if (((input_a == FP_ZERO) && (input_c == FP_INFINITE)) || @@ -229,16 +220,13 @@ constexpr auto ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chose ppc_state.fpscr |= (FPSCR::FX | FPSCR::VXSNAN | FPSCR::VXIMZ); - inf_or_nan = true; } update_fex(); - return inf_or_nan; break; case FPOP::FMSUB: case FPOP::FNMSUB: if (isnan(input_a) || isnan(input_b) || isnan(input_c)) { ppc_state.fpscr |= FPSCR::VXSNAN; - inf_or_nan = true; if (((input_a == FP_ZERO) && (input_c == FP_INFINITE)) || ((input_c == FP_ZERO) && (input_a == FP_INFINITE))) { ppc_state.fpscr |= FPSCR::VXIMZ; @@ -246,20 +234,14 @@ constexpr auto ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chose } update_fex(); - return inf_or_nan; break; case FPOP::FMADD: case FPOP::FNMADD: if (isnan(input_a) || isnan(input_b) || isnan(input_c)) { ppc_state.fpscr |= FPSCR::VXSNAN; - inf_or_nan = true; } - update_fex(); - return inf_or_nan; break; - default: - return false; } } @@ -297,10 +279,13 @@ void ppc_changecrf1() { // Floating Point Arithmetic void dppc_interpreter::ppc_fadd() { ppc_grab_regsfpdab(); - - if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::ADD)) { - ppc_dblresult64_d = val_reg_a + val_reg_b; + + ppc_dblresult64_d = val_reg_a + val_reg_b; + + if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, 0); } if (rc_flag) @@ -310,9 +295,12 @@ void dppc_interpreter::ppc_fadd() { void dppc_interpreter::ppc_fsub() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::SUB)) { - ppc_dblresult64_d = val_reg_a - val_reg_b; + ppc_dblresult64_d = val_reg_a - val_reg_b; + + if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, 0); } if (rc_flag) @@ -322,9 +310,12 @@ void dppc_interpreter::ppc_fsub() { void dppc_interpreter::ppc_fdiv() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::DIV)) { - ppc_dblresult64_d = val_reg_a / val_reg_b; + ppc_dblresult64_d = val_reg_a / val_reg_b; + + if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, 0); } if (rc_flag) @@ -334,9 +325,12 @@ void dppc_interpreter::ppc_fdiv() { void dppc_interpreter::ppc_fmul() { ppc_grab_regsfpdac(); - if (!ppc_confirm_inf_nan(reg_a, reg_c, 0, FPOP::MUL)) { - ppc_dblresult64_d = val_reg_a * val_reg_c; + ppc_dblresult64_d = val_reg_a * val_reg_c; + + if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, 0); } if (rc_flag) @@ -346,11 +340,13 @@ void dppc_interpreter::ppc_fmul() { void dppc_interpreter::ppc_fmadd() { ppc_grab_regsfpdabc(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FMADD)) { - ppc_dblresult64_d = std::fma(val_reg_a, val_reg_c, val_reg_b); - ppc_store_dfpresult_flt(reg_d); - } + ppc_dblresult64_d = std::fma(val_reg_a, val_reg_c, val_reg_b); + if (!isnan(ppc_dblresult64_d)) { + ppc_store_dfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, reg_c); + } if (rc_flag) ppc_changecrf1(); @@ -359,12 +355,14 @@ void dppc_interpreter::ppc_fmadd() { void dppc_interpreter::ppc_fmsub() { ppc_grab_regsfpdabc(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FMSUB)) { - ppc_dblresult64_d = (val_reg_a * val_reg_c); - ppc_dblresult64_d -= val_reg_b; - ppc_store_dfpresult_flt(reg_d); - } + ppc_dblresult64_d = (val_reg_a * val_reg_c); + ppc_dblresult64_d -= val_reg_b; + if (!isnan(ppc_dblresult64_d)) { + ppc_store_dfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, reg_c); + } if (rc_flag) ppc_changecrf1(); @@ -373,11 +371,15 @@ void dppc_interpreter::ppc_fmsub() { void dppc_interpreter::ppc_fnmadd() { ppc_grab_regsfpdabc(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FNMADD)) { - ppc_dblresult64_d = (val_reg_a * val_reg_c); - ppc_dblresult64_d += val_reg_b; - ppc_dblresult64_d = -ppc_dblresult64_d; + ppc_dblresult64_d = (val_reg_a * val_reg_c); + ppc_dblresult64_d += val_reg_b; + ppc_dblresult64_d = -ppc_dblresult64_d; + + if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + } + else { + ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } if (rc_flag) @@ -387,12 +389,14 @@ void dppc_interpreter::ppc_fnmadd() { void dppc_interpreter::ppc_fnmsub() { ppc_grab_regsfpdabc(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FNMSUB)) { - ppc_dblresult64_d = (val_reg_a * val_reg_c); - ppc_dblresult64_d -= val_reg_b; - ppc_store_dfpresult_flt(reg_d); - } + ppc_dblresult64_d = (val_reg_a * val_reg_c); + ppc_dblresult64_d -= val_reg_b; + if (!isnan(ppc_dblresult64_d)) { + ppc_store_dfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, reg_c); + } if (rc_flag) ppc_changecrf1(); @@ -401,10 +405,13 @@ void dppc_interpreter::ppc_fnmsub() { void dppc_interpreter::ppc_fadds() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::ADD)) { - float intermediate = (float)val_reg_a + (float)val_reg_b; - ppc_dblresult64_d = static_cast(intermediate); + float intermediate = (float)val_reg_a + (float)val_reg_b; + ppc_dblresult64_d = static_cast(intermediate); + + if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, 0); } if (rc_flag) @@ -414,23 +421,13 @@ void dppc_interpreter::ppc_fadds() { void dppc_interpreter::ppc_fsubs() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::SUB)) { - float intermediate = (float)val_reg_a - (float)val_reg_b; - ppc_dblresult64_d = static_cast(intermediate); - ppc_store_sfpresult_flt(reg_d); - } - - if (rc_flag) - ppc_changecrf1(); -} - -void dppc_interpreter::ppc_fmuls() { - ppc_grab_regsfpdac(); - - if (!ppc_confirm_inf_nan(reg_a, 0, reg_c, FPOP::MUL)) { - float intermediate = (float)val_reg_a * (float)val_reg_c; - ppc_dblresult64_d = static_cast(intermediate); + float intermediate = (float)val_reg_a - (float)val_reg_b; + ppc_dblresult64_d = static_cast(intermediate); + + if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, 0); } if (rc_flag) @@ -440,10 +437,29 @@ void dppc_interpreter::ppc_fmuls() { void dppc_interpreter::ppc_fdivs() { ppc_grab_regsfpdab(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, 0, FPOP::DIV)) { - float intermediate = (float)val_reg_a / (float)val_reg_b; - ppc_dblresult64_d = static_cast(intermediate); + float intermediate = (float)val_reg_a / (float)val_reg_b; + ppc_dblresult64_d = static_cast(intermediate); + + if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, 0); + } + + if (rc_flag) + ppc_changecrf1(); +} + +void dppc_interpreter::ppc_fmuls() { + ppc_grab_regsfpdac(); + + float intermediate = (float)val_reg_a * (float)val_reg_c; + ppc_dblresult64_d = static_cast(intermediate); + + if (!isnan(ppc_dblresult64_d)) { + ppc_store_sfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, 0, reg_c); } if (rc_flag) @@ -453,11 +469,13 @@ void dppc_interpreter::ppc_fdivs() { void dppc_interpreter::ppc_fmadds() { ppc_grab_regsfpdabc(); - if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FMADD)) { - ppc_dblresult64_d = static_cast(std::fma( - (float)val_reg_a, (float)val_reg_c, (float)val_reg_b)); + ppc_dblresult64_d = static_cast( + std::fma((float)val_reg_a, (float)val_reg_c, (float)val_reg_b)); + if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } if (rc_flag) @@ -467,14 +485,14 @@ void dppc_interpreter::ppc_fmadds() { void dppc_interpreter::ppc_fmsubs() { ppc_grab_regsfpdabc(); - float intermediate; - - if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FMSUB)) { - intermediate = (float)val_reg_a * (float)val_reg_c; - intermediate -= (float)val_reg_b; - ppc_dblresult64_d = static_cast(intermediate); + float intermediate = (float)val_reg_a * (float)val_reg_c; + intermediate -= (float)val_reg_b; + ppc_dblresult64_d = static_cast(intermediate); + if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } if (rc_flag) @@ -484,16 +502,15 @@ void dppc_interpreter::ppc_fmsubs() { void dppc_interpreter::ppc_fnmadds() { ppc_grab_regsfpdabc(); - float intermediate; - - if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FNMADD)) { - intermediate = (float)val_reg_a * (float)val_reg_c; - intermediate += (float)val_reg_b; - intermediate = -intermediate; - - ppc_dblresult64_d = static_cast(intermediate); + float intermediate = (float)val_reg_a * (float)val_reg_c; + intermediate += (float)val_reg_b; + intermediate = -intermediate; + ppc_dblresult64_d = static_cast(intermediate); + if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } if (rc_flag) @@ -503,16 +520,16 @@ void dppc_interpreter::ppc_fnmadds() { void dppc_interpreter::ppc_fnmsubs() { ppc_grab_regsfpdabc(); - float intermediate; - - if (!ppc_confirm_inf_nan(reg_a, reg_b, reg_c, FPOP::FNMSUB)) { - intermediate = (float)val_reg_a * (float)val_reg_c; - intermediate -= (float)val_reg_b; - intermediate = -intermediate; - - ppc_dblresult64_d = static_cast(intermediate); + float intermediate = (float)val_reg_a * (float)val_reg_c; + intermediate -= (float)val_reg_b; + intermediate = -intermediate; + ppc_dblresult64_d = static_cast(intermediate); + + if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + } else { + ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } if (rc_flag) From 7ce94a6ab59c53d784966ef7a4f459c52583c171 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Thu, 14 Oct 2021 21:05:58 -0700 Subject: [PATCH 06/11] Further fixing the test code --- cpu/ppc/test/ppcfloattest.txt | 1282 +++++++++++++++++++++++++++++++- cpu/ppc/test/ppcfloattests.csv | 1280 +++++++++++++++++++++++++++++++ cpu/ppc/test/ppctests.cpp | 28 +- 3 files changed, 2575 insertions(+), 15 deletions(-) diff --git a/cpu/ppc/test/ppcfloattest.txt b/cpu/ppc/test/ppcfloattest.txt index 3efecca..11fd314 100644 --- a/cpu/ppc/test/ppcfloattest.txt +++ b/cpu/ppc/test/ppcfloattest.txt @@ -771,4 +771,1284 @@ FDIVS. (RTN) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA10110 FDIVS. (RTZ) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 FDIVS. (RTPI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 FDIVS. (RTNI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 -FDIVS. (VE) :: frD 0x0000000000000000 | frA -inf | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 \ No newline at end of file +FDIVS. (VE) :: frD 0x0000000000000000 | frA -inf | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FMADD (RTN) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMADD (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMADD (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMADD (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMADD (VE) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMADD (RTN) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMADD (RTZ) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMADD (RTPI) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMADD (RTNI) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMADD (VE) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMADD (RTN) :: frD 0x404F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064000 | CR: 0x20000000 +FMADD (RTZ) :: frD 0x404F0B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024001 | CR: 0x40000002 +FMADD (RTPI) :: frD 0x404F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064002 | CR: 0x40000002 +FMADD (RTNI) :: frD 0x404F0B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024003 | CR: 0x40000002 +FMADD (VE) :: frD 0x404F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064080 | CR: 0x00000000 +FMADD (RTN) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024000 | CR: 0x20000000 +FMADD (RTZ) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024001 | CR: 0x40000002 +FMADD (RTPI) :: frD 0x36D60001947E46BB | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82064002 | CR: 0x40000002 +FMADD (RTNI) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024003 | CR: 0x40000002 +FMADD (VE) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024080 | CR: 0x00000000 +FMADD (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMADD (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMADD (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMADD (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMADD (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMADD (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FMADD (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FMADD (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FMADD (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FMADD (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FMADD (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMADD (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMADD (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMADD (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMADD (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMADD (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMADD (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMADD (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMADD (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMADD (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMADD. (RTN) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMADD. (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMADD. (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMADD. (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMADD. (VE) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMADD. (RTN) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMADD. (RTZ) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMADD. (RTPI) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMADD. (RTNI) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMADD. (VE) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMADD. (RTN) :: frD 0x404F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064000 | CR: 0x28000000 +FMADD. (RTZ) :: frD 0x404F0B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024001 | CR: 0x48000002 +FMADD. (RTPI) :: frD 0x404F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064002 | CR: 0x48000002 +FMADD. (RTNI) :: frD 0x404F0B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024003 | CR: 0x48000002 +FMADD. (VE) :: frD 0x404F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064080 | CR: 0x08000000 +FMADD. (RTN) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024000 | CR: 0x28000000 +FMADD. (RTZ) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024001 | CR: 0x48000002 +FMADD. (RTPI) :: frD 0x36D60001947E46BB | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82064002 | CR: 0x48000002 +FMADD. (RTNI) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024003 | CR: 0x48000002 +FMADD. (VE) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024080 | CR: 0x08000000 +FMADD. (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMADD. (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMADD. (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMADD. (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMADD. (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMADD. (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FMADD. (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FMADD. (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FMADD. (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FMADD. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FMADD. (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMADD. (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMADD. (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMADD. (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMADD. (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMADD. (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMADD. (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMADD. (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMADD. (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMADD. (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMADDS (RTN) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMADDS (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMADDS (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMADDS (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMADDS (VE) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMADDS (RTN) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMADDS (RTZ) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMADDS (RTPI) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMADDS (RTNI) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMADDS (VE) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMADDS (RTN) :: frD 0x404F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024000 | CR: 0x20000000 +FMADDS (RTZ) :: frD 0x404F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024001 | CR: 0x40000002 +FMADDS (RTPI) :: frD 0x404F0B1820000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064002 | CR: 0x40000002 +FMADDS (RTNI) :: frD 0x404F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024003 | CR: 0x40000002 +FMADDS (VE) :: frD 0x404F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024080 | CR: 0x00000000 +FMADDS (RTN) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034000 | CR: 0x20000000 +FMADDS (RTZ) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034001 | CR: 0x40000002 +FMADDS (RTPI) :: frD 0x36D8000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A074002 | CR: 0x40000002 +FMADDS (RTNI) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034003 | CR: 0x40000002 +FMADDS (VE) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034080 | CR: 0x00000000 +FMADDS (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMADDS (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMADDS (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMADDS (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMADDS (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMADDS (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FMADDS (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FMADDS (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FMADDS (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FMADDS (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FMADDS (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMADDS (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMADDS (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMADDS (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMADDS (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMADDS (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMADDS (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMADDS (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMADDS (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMADDS (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMADDS. (RTN) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMADDS. (RTZ) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMADDS. (RTPI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMADDS. (RTNI) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMADDS. (VE) :: frD 0x4000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMADDS. (RTN) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMADDS. (RTZ) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMADDS. (RTPI) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMADDS. (RTNI) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMADDS. (VE) :: frD 0x4041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMADDS. (RTN) :: frD 0x404F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024000 | CR: 0x28000000 +FMADDS. (RTZ) :: frD 0x404F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024001 | CR: 0x48000002 +FMADDS. (RTPI) :: frD 0x404F0B1820000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064002 | CR: 0x48000002 +FMADDS. (RTNI) :: frD 0x404F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024003 | CR: 0x48000002 +FMADDS. (VE) :: frD 0x404F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024080 | CR: 0x08000000 +FMADDS. (RTN) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034000 | CR: 0x28000000 +FMADDS. (RTZ) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034001 | CR: 0x48000002 +FMADDS. (RTPI) :: frD 0x36D8000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A074002 | CR: 0x48000002 +FMADDS. (RTNI) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034003 | CR: 0x48000002 +FMADDS. (VE) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034080 | CR: 0x08000000 +FMADDS. (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMADDS. (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMADDS. (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMADDS. (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMADDS. (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMADDS. (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FMADDS. (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FMADDS. (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FMADDS. (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FMADDS. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FMADDS. (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMADDS. (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMADDS. (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMADDS. (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMADDS. (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMADDS. (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMADDS. (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMADDS. (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMADDS. (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMADDS. (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMSUB (RTN) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMSUB (RTZ) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMSUB (RTPI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMSUB (RTNI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FMSUB (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMSUB (RTN) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMSUB (RTZ) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMSUB (RTPI) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMSUB (RTNI) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMSUB (VE) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMSUB (RTN) :: frD 0x404B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064000 | CR: 0x20000000 +FMSUB (RTZ) :: frD 0x404B8B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024001 | CR: 0x40000002 +FMSUB (RTPI) :: frD 0x404B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064002 | CR: 0x40000002 +FMSUB (RTNI) :: frD 0x404B8B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024003 | CR: 0x40000002 +FMSUB (VE) :: frD 0x404B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064080 | CR: 0x00000000 +FMSUB (RTN) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82068000 | CR: 0x20000000 +FMSUB (RTZ) :: frD 0xB6D60001947E46B9 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028001 | CR: 0x40000002 +FMSUB (RTPI) :: frD 0xB6D60001947E46B9 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028002 | CR: 0x40000002 +FMSUB (RTNI) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82068003 | CR: 0x40000002 +FMSUB (VE) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82068080 | CR: 0x00000000 +FMSUB (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMSUB (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMSUB (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMSUB (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMSUB (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMSUB (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FMSUB (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FMSUB (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FMSUB (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FMSUB (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FMSUB (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMSUB (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMSUB (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMSUB (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMSUB (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMSUB (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMSUB (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMSUB (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMSUB (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMSUB (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMSUB. (RTN) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMSUB. (RTZ) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMSUB. (RTPI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMSUB. (RTNI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FMSUB. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMSUB. (RTN) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMSUB. (RTZ) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMSUB. (RTPI) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMSUB. (RTNI) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMSUB. (VE) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMSUB. (RTN) :: frD 0x404B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064000 | CR: 0x28000000 +FMSUB. (RTZ) :: frD 0x404B8B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024001 | CR: 0x48000002 +FMSUB. (RTPI) :: frD 0x404B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064002 | CR: 0x48000002 +FMSUB. (RTNI) :: frD 0x404B8B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024003 | CR: 0x48000002 +FMSUB. (VE) :: frD 0x404B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064080 | CR: 0x08000000 +FMSUB. (RTN) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82068000 | CR: 0x28000000 +FMSUB. (RTZ) :: frD 0xB6D60001947E46B9 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028001 | CR: 0x48000002 +FMSUB. (RTPI) :: frD 0xB6D60001947E46B9 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028002 | CR: 0x48000002 +FMSUB. (RTNI) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82068003 | CR: 0x48000002 +FMSUB. (VE) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82068080 | CR: 0x08000000 +FMSUB. (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMSUB. (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMSUB. (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMSUB. (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMSUB. (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMSUB. (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FMSUB. (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FMSUB. (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FMSUB. (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FMSUB. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FMSUB. (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMSUB. (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMSUB. (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMSUB. (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMSUB. (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMSUB. (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMSUB. (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMSUB. (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMSUB. (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMSUB. (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMSUBS (RTN) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMSUBS (RTZ) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMSUBS (RTPI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMSUBS (RTNI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FMSUBS (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMSUBS (RTN) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMSUBS (RTZ) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMSUBS (RTPI) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMSUBS (RTNI) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMSUBS (VE) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMSUBS (RTN) :: frD 0x404B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024000 | CR: 0x20000000 +FMSUBS (RTZ) :: frD 0x404B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024001 | CR: 0x40000002 +FMSUBS (RTPI) :: frD 0x404B8B1820000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064002 | CR: 0x40000002 +FMSUBS (RTNI) :: frD 0x404B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024003 | CR: 0x40000002 +FMSUBS (VE) :: frD 0x404B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024080 | CR: 0x00000000 +FMSUBS (RTN) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038000 | CR: 0x20000000 +FMSUBS (RTZ) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038001 | CR: 0x40000002 +FMSUBS (RTPI) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038002 | CR: 0x40000002 +FMSUBS (RTNI) :: frD 0xB6D8000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A078003 | CR: 0x40000002 +FMSUBS (VE) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038080 | CR: 0x00000000 +FMSUBS (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMSUBS (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMSUBS (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMSUBS (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMSUBS (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMSUBS (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FMSUBS (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FMSUBS (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FMSUBS (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FMSUBS (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FMSUBS (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMSUBS (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMSUBS (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMSUBS (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMSUBS (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMSUBS (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMSUBS (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMSUBS (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMSUBS (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMSUBS (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMSUBS. (RTN) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMSUBS. (RTZ) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMSUBS. (RTPI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMSUBS. (RTNI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FMSUBS. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMSUBS. (RTN) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMSUBS. (RTZ) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMSUBS. (RTPI) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMSUBS. (RTNI) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMSUBS. (VE) :: frD 0x4038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMSUBS. (RTN) :: frD 0x404B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024000 | CR: 0x28000000 +FMSUBS. (RTZ) :: frD 0x404B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024001 | CR: 0x48000002 +FMSUBS. (RTPI) :: frD 0x404B8B1820000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82064002 | CR: 0x48000002 +FMSUBS. (RTNI) :: frD 0x404B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024003 | CR: 0x48000002 +FMSUBS. (VE) :: frD 0x404B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82024080 | CR: 0x08000000 +FMSUBS. (RTN) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038000 | CR: 0x28000000 +FMSUBS. (RTZ) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038001 | CR: 0x48000002 +FMSUBS. (RTPI) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038002 | CR: 0x48000002 +FMSUBS. (RTNI) :: frD 0xB6D8000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A078003 | CR: 0x48000002 +FMSUBS. (VE) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038080 | CR: 0x08000000 +FMSUBS. (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMSUBS. (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMSUBS. (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMSUBS. (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMSUBS. (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMSUBS. (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FMSUBS. (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FMSUBS. (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FMSUBS. (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FMSUBS. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FMSUBS. (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMSUBS. (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMSUBS. (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMSUBS. (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMSUBS. (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMSUBS. (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMSUBS. (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMSUBS. (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMSUBS. (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMSUBS. (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FMUL (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FMUL (VE) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111003 | CR: 0x40000002 +FMUL (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xE0100080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111003 | CR: 0x40000002 +FMUL (VE) :: frD 0x0000000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xE0100080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMUL (VE) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x3FB6666666666666 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x3FB6666666666666 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x3FB6666666666666 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x3FB6666666666666 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004003 | CR: 0x40000002 +FMUL (VE) :: frD 0x3FB6666666666666 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x4034AA2AED7B0B1F | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x4034AA2AED7B0B1F | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x4034AA2AED7B0B20 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82064002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x4034AA2AED7B0B1F | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024003 | CR: 0x40000002 +FMUL (VE) :: frD 0x4034AA2AED7B0B1F | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMUL (VE) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FMUL (VE) :: frD 0x0000000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMUL (VE) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMUL (RTN) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMUL (VE) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMUL (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FMUL (VE) :: frD 0x0000000000000000 | frA inf | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMUL (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMUL (RTN) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FMUL (RTZ) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FMUL (RTPI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FMUL (RTNI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FMUL (VE) :: frD 0x0000000000000000 | frA -inf | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FMUL. (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMUL. (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMUL. (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMUL. (RTNI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FMUL. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMUL. (RTN) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMUL. (RTZ) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMUL. (RTPI) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMUL. (RTNI) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FMUL. (VE) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMUL. (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111000 | CR: 0x2A000000 +FMUL. (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111001 | CR: 0x4A000002 +FMUL. (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111002 | CR: 0x4A000002 +FMUL. (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111003 | CR: 0x4A000002 +FMUL. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xE0100080 | CR: 0x0E000000 +FMUL. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111000 | CR: 0x2A000000 +FMUL. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111001 | CR: 0x4A000002 +FMUL. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111002 | CR: 0x4A000002 +FMUL. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111003 | CR: 0x4A000002 +FMUL. (VE) :: frD 0x0000000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xE0100080 | CR: 0x0E000000 +FMUL. (RTN) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMUL. (RTZ) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMUL. (RTPI) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMUL. (RTNI) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMUL. (VE) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMUL. (RTN) :: frD 0x3FB6666666666666 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004000 | CR: 0x20000000 +FMUL. (RTZ) :: frD 0x3FB6666666666666 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004001 | CR: 0x40000002 +FMUL. (RTPI) :: frD 0x3FB6666666666666 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004002 | CR: 0x40000002 +FMUL. (RTNI) :: frD 0x3FB6666666666666 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004003 | CR: 0x40000002 +FMUL. (VE) :: frD 0x3FB6666666666666 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004080 | CR: 0x00000000 +FMUL. (RTN) :: frD 0x4034AA2AED7B0B1F | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024000 | CR: 0x28000000 +FMUL. (RTZ) :: frD 0x4034AA2AED7B0B1F | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024001 | CR: 0x48000002 +FMUL. (RTPI) :: frD 0x4034AA2AED7B0B20 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82064002 | CR: 0x48000002 +FMUL. (RTNI) :: frD 0x4034AA2AED7B0B1F | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024003 | CR: 0x48000002 +FMUL. (VE) :: frD 0x4034AA2AED7B0B1F | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024080 | CR: 0x08000000 +FMUL. (RTN) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMUL. (RTZ) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMUL. (RTPI) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMUL. (RTNI) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMUL. (VE) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMUL. (RTN) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FMUL. (RTZ) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FMUL. (RTPI) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FMUL. (RTNI) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FMUL. (VE) :: frD 0x0000000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FMUL. (RTN) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMUL. (RTZ) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMUL. (RTPI) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMUL. (RTNI) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMUL. (VE) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMUL. (RTN) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMUL. (RTZ) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMUL. (RTPI) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMUL. (RTNI) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMUL. (VE) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMUL. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMUL. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMUL. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMUL. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMUL. (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMUL. (RTN) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FMUL. (RTZ) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FMUL. (RTPI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FMUL. (RTNI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FMUL. (VE) :: frD 0x0000000000000000 | frA inf | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FMUL. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMUL. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMUL. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMUL. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMUL. (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMUL. (RTN) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FMUL. (RTZ) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FMUL. (RTPI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FMUL. (RTNI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FMUL. (VE) :: frD 0x0000000000000000 | frA -inf | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FMULS (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FMULS (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FMULS (VE) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111003 | CR: 0x40000002 +FMULS (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xE0100080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111003 | CR: 0x40000002 +FMULS (VE) :: frD 0x0000000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xE0100080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMULS (VE) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x3FB6666660000000 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x3FB6666660000000 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x3FB6666660000000 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x3FB6666660000000 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004003 | CR: 0x40000002 +FMULS (VE) :: frD 0x3FB6666660000000 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x4034AA2AE0000000 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x4034AA2AE0000000 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x4034AA2B00000000 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82064002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x4034AA2AE0000000 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024003 | CR: 0x40000002 +FMULS (VE) :: frD 0x4034AA2AE0000000 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMULS (VE) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FMULS (VE) :: frD 0x0000000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMULS (VE) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMULS (RTN) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMULS (VE) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMULS (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FMULS (VE) :: frD 0x0000000000000000 | frA inf | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMULS (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMULS (RTN) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FMULS (RTZ) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FMULS (RTPI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FMULS (RTNI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FMULS (VE) :: frD 0x0000000000000000 | frA -inf | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FMULS. (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMULS. (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMULS. (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMULS. (RTNI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FMULS. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMULS. (RTN) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FMULS. (RTZ) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FMULS. (RTPI) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FMULS. (RTNI) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FMULS. (VE) :: frD 0x0000000000000000 | frA -0.000000e+00 | frB -0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FMULS. (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111000 | CR: 0x2A000000 +FMULS. (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111001 | CR: 0x4A000002 +FMULS. (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111002 | CR: 0x4A000002 +FMULS. (RTNI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xA0111003 | CR: 0x4A000002 +FMULS. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB inf | FPSCR: 0xE0100080 | CR: 0x0E000000 +FMULS. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111000 | CR: 0x2A000000 +FMULS. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111001 | CR: 0x4A000002 +FMULS. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111002 | CR: 0x4A000002 +FMULS. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xA0111003 | CR: 0x4A000002 +FMULS. (VE) :: frD 0x0000000000000000 | frA inf | frB 0.000000e+00 | FPSCR: 0xE0100080 | CR: 0x0E000000 +FMULS. (RTN) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004000 | CR: 0x20000000 +FMULS. (RTZ) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004001 | CR: 0x40000002 +FMULS. (RTPI) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004002 | CR: 0x40000002 +FMULS. (RTNI) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004003 | CR: 0x40000002 +FMULS. (VE) :: frD 0x4039000000000000 | frA 5.000000e+00 | frB 5.000000e+00 | FPSCR: 0x00004080 | CR: 0x00000000 +FMULS. (RTN) :: frD 0x3FB6666660000000 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004000 | CR: 0x20000000 +FMULS. (RTZ) :: frD 0x3FB6666660000000 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004001 | CR: 0x40000002 +FMULS. (RTPI) :: frD 0x3FB6666660000000 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004002 | CR: 0x40000002 +FMULS. (RTNI) :: frD 0x3FB6666660000000 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004003 | CR: 0x40000002 +FMULS. (VE) :: frD 0x3FB6666660000000 | frA 2.500000e-01 | frB 3.500000e-01 | FPSCR: 0x00004080 | CR: 0x00000000 +FMULS. (RTN) :: frD 0x4034AA2AE0000000 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024000 | CR: 0x28000000 +FMULS. (RTZ) :: frD 0x4034AA2AE0000000 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024001 | CR: 0x48000002 +FMULS. (RTPI) :: frD 0x4034AA2B00000000 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82064002 | CR: 0x48000002 +FMULS. (RTNI) :: frD 0x4034AA2AE0000000 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024003 | CR: 0x48000002 +FMULS. (VE) :: frD 0x4034AA2AE0000000 | frA 3.000000e+00 | frB 6.888239e+00 | FPSCR: 0x82024080 | CR: 0x08000000 +FMULS. (RTN) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMULS. (RTZ) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMULS. (RTPI) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMULS. (RTNI) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMULS. (VE) :: frD 0x7FF8000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMULS. (RTN) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FMULS. (RTZ) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FMULS. (RTPI) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FMULS. (RTNI) :: frD 0x7FFC000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FMULS. (VE) :: frD 0x0000000000000000 | frA 5.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FMULS. (RTN) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FMULS. (RTZ) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FMULS. (RTPI) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FMULS. (RTNI) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FMULS. (VE) :: frD 0x7FF0000000000000 | frA 5.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FMULS. (RTN) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FMULS. (RTZ) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FMULS. (RTPI) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FMULS. (RTNI) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FMULS. (VE) :: frD 0xFFF0000000000000 | frA 5.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FMULS. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMULS. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMULS. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMULS. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMULS. (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMULS. (RTN) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FMULS. (RTZ) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FMULS. (RTPI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FMULS. (RTNI) :: frD 0x7FFC000000000000 | frA inf | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FMULS. (VE) :: frD 0x0000000000000000 | frA inf | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FMULS. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FMULS. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FMULS. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FMULS. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FMULS. (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FMULS. (RTN) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FMULS. (RTZ) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FMULS. (RTPI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FMULS. (RTNI) :: frD 0x7FFC000000000000 | frA -inf | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FMULS. (VE) :: frD 0x0000000000000000 | frA -inf | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FNMADD (RTN) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMADD (RTZ) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMADD (RTPI) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMADD (RTNI) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMADD (VE) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMADD (RTN) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMADD (RTZ) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMADD (RTPI) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMADD (RTNI) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMADD (VE) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMADD (RTN) :: frD 0xC04F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068000 | CR: 0x20000000 +FNMADD (RTZ) :: frD 0xC04F0B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028001 | CR: 0x40000002 +FNMADD (RTPI) :: frD 0xC04F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068002 | CR: 0x40000002 +FNMADD (RTNI) :: frD 0xC04F0B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028003 | CR: 0x40000002 +FNMADD (VE) :: frD 0xC04F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068080 | CR: 0x00000000 +FNMADD (RTN) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028000 | CR: 0x20000000 +FNMADD (RTZ) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028001 | CR: 0x40000002 +FNMADD (RTPI) :: frD 0xB6D60001947E46BB | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82068002 | CR: 0x40000002 +FNMADD (RTNI) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028003 | CR: 0x40000002 +FNMADD (VE) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028080 | CR: 0x00000000 +FNMADD (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FNMADD (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FNMADD (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FNMADD (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FNMADD (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FNMADD (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FNMADD (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FNMADD (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FNMADD (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FNMADD (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FNMADD (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FNMADD (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FNMADD (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FNMADD (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FNMADD (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FNMADD (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FNMADD (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FNMADD (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FNMADD (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FNMADD (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FNMADD. (RTN) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMADD. (RTZ) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMADD. (RTPI) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMADD. (RTNI) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMADD. (VE) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMADD. (RTN) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMADD. (RTZ) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMADD. (RTPI) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMADD. (RTNI) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMADD. (VE) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMADD. (RTN) :: frD 0xC04F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068000 | CR: 0x28000000 +FNMADD. (RTZ) :: frD 0xC04F0B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028001 | CR: 0x48000002 +FNMADD. (RTPI) :: frD 0xC04F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068002 | CR: 0x48000002 +FNMADD. (RTNI) :: frD 0xC04F0B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028003 | CR: 0x48000002 +FNMADD. (VE) :: frD 0xC04F0B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068080 | CR: 0x08000000 +FNMADD. (RTN) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028000 | CR: 0x28000000 +FNMADD. (RTZ) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028001 | CR: 0x48000002 +FNMADD. (RTPI) :: frD 0xB6D60001947E46BB | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82068002 | CR: 0x48000002 +FNMADD. (RTNI) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028003 | CR: 0x48000002 +FNMADD. (VE) :: frD 0xB6D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82028080 | CR: 0x08000000 +FNMADD. (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FNMADD. (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FNMADD. (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FNMADD. (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FNMADD. (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FNMADD. (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FNMADD. (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FNMADD. (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FNMADD. (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FNMADD. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FNMADD. (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FNMADD. (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FNMADD. (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FNMADD. (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FNMADD. (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FNMADD. (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FNMADD. (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FNMADD. (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FNMADD. (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FNMADD. (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FNMADDS (RTN) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMADDS (RTZ) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMADDS (RTPI) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMADDS (RTNI) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMADDS (VE) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMADDS (RTN) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMADDS (RTZ) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMADDS (RTPI) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMADDS (RTNI) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMADDS (VE) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMADDS (RTN) :: frD 0xC04F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028000 | CR: 0x20000000 +FNMADDS (RTZ) :: frD 0xC04F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028001 | CR: 0x40000002 +FNMADDS (RTPI) :: frD 0xC04F0B1820000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068002 | CR: 0x40000002 +FNMADDS (RTNI) :: frD 0xC04F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028003 | CR: 0x40000002 +FNMADDS (VE) :: frD 0xC04F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028080 | CR: 0x00000000 +FNMADDS (RTN) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038000 | CR: 0x20000000 +FNMADDS (RTZ) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038001 | CR: 0x40000002 +FNMADDS (RTPI) :: frD 0xB6D8000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A078002 | CR: 0x40000002 +FNMADDS (RTNI) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038003 | CR: 0x40000002 +FNMADDS (VE) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038080 | CR: 0x00000000 +FNMADDS (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FNMADDS (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FNMADDS (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FNMADDS (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FNMADDS (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FNMADDS (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FNMADDS (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FNMADDS (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FNMADDS (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FNMADDS (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FNMADDS (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FNMADDS (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FNMADDS (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FNMADDS (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FNMADDS (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FNMADDS (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FNMADDS (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FNMADDS (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FNMADDS (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FNMADDS (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FNMADDS. (RTN) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMADDS. (RTZ) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMADDS. (RTPI) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMADDS. (RTNI) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMADDS. (VE) :: frD 0xC000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMADDS. (RTN) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMADDS. (RTZ) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMADDS. (RTPI) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMADDS. (RTNI) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMADDS. (VE) :: frD 0xC041E00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMADDS. (RTN) :: frD 0xC04F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028000 | CR: 0x28000000 +FNMADDS. (RTZ) :: frD 0xC04F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028001 | CR: 0x48000002 +FNMADDS. (RTPI) :: frD 0xC04F0B1820000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068002 | CR: 0x48000002 +FNMADDS. (RTNI) :: frD 0xC04F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028003 | CR: 0x48000002 +FNMADDS. (VE) :: frD 0xC04F0B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028080 | CR: 0x08000000 +FNMADDS. (RTN) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038000 | CR: 0x28000000 +FNMADDS. (RTZ) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038001 | CR: 0x48000002 +FNMADDS. (RTPI) :: frD 0xB6D8000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A078002 | CR: 0x48000002 +FNMADDS. (RTNI) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038003 | CR: 0x48000002 +FNMADDS. (VE) :: frD 0xB6D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A038080 | CR: 0x08000000 +FNMADDS. (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FNMADDS. (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FNMADDS. (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FNMADDS. (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FNMADDS. (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FNMADDS. (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FNMADDS. (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FNMADDS. (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FNMADDS. (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FNMADDS. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FNMADDS. (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FNMADDS. (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FNMADDS. (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FNMADDS. (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FNMADDS. (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FNMADDS. (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FNMADDS. (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FNMADDS. (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FNMADDS. (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FNMADDS. (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FNMSUB (RTN) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012000 | CR: 0x20000000 +FNMSUB (RTZ) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012001 | CR: 0x40000002 +FNMSUB (RTPI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012002 | CR: 0x40000002 +FNMSUB (RTNI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FNMSUB (VE) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012080 | CR: 0x00000000 +FNMSUB (RTN) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMSUB (RTZ) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMSUB (RTPI) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMSUB (RTNI) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMSUB (VE) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMSUB (RTN) :: frD 0xC04B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068000 | CR: 0x20000000 +FNMSUB (RTZ) :: frD 0xC04B8B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028001 | CR: 0x40000002 +FNMSUB (RTPI) :: frD 0xC04B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068002 | CR: 0x40000002 +FNMSUB (RTNI) :: frD 0xC04B8B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028003 | CR: 0x40000002 +FNMSUB (VE) :: frD 0xC04B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068080 | CR: 0x00000000 +FNMSUB (RTN) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82064000 | CR: 0x20000000 +FNMSUB (RTZ) :: frD 0x36D60001947E46B9 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024001 | CR: 0x40000002 +FNMSUB (RTPI) :: frD 0x36D60001947E46B9 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024002 | CR: 0x40000002 +FNMSUB (RTNI) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82064003 | CR: 0x40000002 +FNMSUB (VE) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82064080 | CR: 0x00000000 +FNMSUB (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FNMSUB (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FNMSUB (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FNMSUB (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FNMSUB (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FNMSUB (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FNMSUB (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FNMSUB (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FNMSUB (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FNMSUB (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FNMSUB (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FNMSUB (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FNMSUB (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FNMSUB (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FNMSUB (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FNMSUB (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FNMSUB (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FNMSUB (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FNMSUB (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FNMSUB (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FNMSUB. (RTN) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012000 | CR: 0x20000000 +FNMSUB. (RTZ) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012001 | CR: 0x40000002 +FNMSUB. (RTPI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012002 | CR: 0x40000002 +FNMSUB. (RTNI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FNMSUB. (VE) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012080 | CR: 0x00000000 +FNMSUB. (RTN) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMSUB. (RTZ) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMSUB. (RTPI) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMSUB. (RTNI) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMSUB. (VE) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMSUB. (RTN) :: frD 0xC04B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068000 | CR: 0x28000000 +FNMSUB. (RTZ) :: frD 0xC04B8B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028001 | CR: 0x48000002 +FNMSUB. (RTPI) :: frD 0xC04B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068002 | CR: 0x48000002 +FNMSUB. (RTNI) :: frD 0xC04B8B1807E88E7B | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028003 | CR: 0x48000002 +FNMSUB. (VE) :: frD 0xC04B8B1807E88E7C | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068080 | CR: 0x08000000 +FNMSUB. (RTN) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82064000 | CR: 0x28000000 +FNMSUB. (RTZ) :: frD 0x36D60001947E46B9 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024001 | CR: 0x48000002 +FNMSUB. (RTPI) :: frD 0x36D60001947E46B9 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82024002 | CR: 0x48000002 +FNMSUB. (RTNI) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82064003 | CR: 0x48000002 +FNMSUB. (VE) :: frD 0x36D60001947E46BA | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x82064080 | CR: 0x08000000 +FNMSUB. (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FNMSUB. (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FNMSUB. (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FNMSUB. (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FNMSUB. (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FNMSUB. (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FNMSUB. (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FNMSUB. (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FNMSUB. (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FNMSUB. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FNMSUB. (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FNMSUB. (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FNMSUB. (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FNMSUB. (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FNMSUB. (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FNMSUB. (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FNMSUB. (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FNMSUB. (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FNMSUB. (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FNMSUB. (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FNMSUBS (RTN) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012000 | CR: 0x20000000 +FNMSUBS (RTZ) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012001 | CR: 0x40000002 +FNMSUBS (RTPI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012002 | CR: 0x40000002 +FNMSUBS (RTNI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FNMSUBS (VE) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012080 | CR: 0x00000000 +FNMSUBS (RTN) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMSUBS (RTZ) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMSUBS (RTPI) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMSUBS (RTNI) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMSUBS (VE) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMSUBS (RTN) :: frD 0xC04B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028000 | CR: 0x20000000 +FNMSUBS (RTZ) :: frD 0xC04B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028001 | CR: 0x40000002 +FNMSUBS (RTPI) :: frD 0xC04B8B1820000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068002 | CR: 0x40000002 +FNMSUBS (RTNI) :: frD 0xC04B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028003 | CR: 0x40000002 +FNMSUBS (VE) :: frD 0xC04B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028080 | CR: 0x00000000 +FNMSUBS (RTN) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034000 | CR: 0x20000000 +FNMSUBS (RTZ) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034001 | CR: 0x40000002 +FNMSUBS (RTPI) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034002 | CR: 0x40000002 +FNMSUBS (RTNI) :: frD 0x36D8000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A074003 | CR: 0x40000002 +FNMSUBS (VE) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034080 | CR: 0x00000000 +FNMSUBS (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FNMSUBS (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FNMSUBS (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FNMSUBS (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FNMSUBS (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FNMSUBS (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x20000000 +FNMSUBS (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x40000002 +FNMSUBS (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x40000002 +FNMSUBS (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x40000002 +FNMSUBS (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x00000000 +FNMSUBS (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FNMSUBS (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FNMSUBS (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FNMSUBS (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FNMSUBS (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FNMSUBS (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FNMSUBS (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FNMSUBS (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FNMSUBS (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FNMSUBS (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FNMSUBS. (RTN) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012000 | CR: 0x20000000 +FNMSUBS. (RTZ) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012001 | CR: 0x40000002 +FNMSUBS. (RTPI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012002 | CR: 0x40000002 +FNMSUBS. (RTNI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002003 | CR: 0x40000002 +FNMSUBS. (VE) :: frD 0x8000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012080 | CR: 0x00000000 +FNMSUBS. (RTN) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008000 | CR: 0x20000000 +FNMSUBS. (RTZ) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008001 | CR: 0x40000002 +FNMSUBS. (RTPI) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008002 | CR: 0x40000002 +FNMSUBS. (RTNI) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008003 | CR: 0x40000002 +FNMSUBS. (VE) :: frD 0xC038C00000000000 | frA 5.500000e+00 | frC 5.500000e+00 | frB 5.500000e+00 | FPSCR: 0x00008080 | CR: 0x00000000 +FNMSUBS. (RTN) :: frD 0xC04B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028000 | CR: 0x28000000 +FNMSUBS. (RTZ) :: frD 0xC04B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028001 | CR: 0x48000002 +FNMSUBS. (RTPI) :: frD 0xC04B8B1820000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82068002 | CR: 0x48000002 +FNMSUBS. (RTNI) :: frD 0xC04B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028003 | CR: 0x48000002 +FNMSUBS. (VE) :: frD 0xC04B8B1800000000 | frA 7.323334e+00 | frC 8.000000e+00 | frB 3.500000e+00 | FPSCR: 0x82028080 | CR: 0x08000000 +FNMSUBS. (RTN) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034000 | CR: 0x28000000 +FNMSUBS. (RTZ) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034001 | CR: 0x48000002 +FNMSUBS. (RTPI) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034002 | CR: 0x48000002 +FNMSUBS. (RTNI) :: frD 0x36D8000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A074003 | CR: 0x48000002 +FNMSUBS. (VE) :: frD 0x36D6000000000000 | frA 6.305840e-44 | frC 3.082860e-44 | frB 1.541430e-44 | FPSCR: 0x8A034080 | CR: 0x08000000 +FNMSUBS. (RTN) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FNMSUBS. (RTZ) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FNMSUBS. (RTPI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FNMSUBS. (RTNI) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FNMSUBS. (VE) :: frD 0x7FF8000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FNMSUBS. (RTN) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011000 | CR: 0x2A000000 +FNMSUBS. (RTZ) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011001 | CR: 0x4A000002 +FNMSUBS. (RTPI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011002 | CR: 0x4A000002 +FNMSUBS. (RTNI) :: frD 0x7FFC000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xA1011003 | CR: 0x4A000002 +FNMSUBS. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB nan | FPSCR: 0xE1000080 | CR: 0x0E000000 +FNMSUBS. (RTN) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005000 | CR: 0x20000000 +FNMSUBS. (RTZ) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005001 | CR: 0x40000002 +FNMSUBS. (RTPI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005002 | CR: 0x40000002 +FNMSUBS. (RTNI) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005003 | CR: 0x40000002 +FNMSUBS. (VE) :: frD 0x7FF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB inf | FPSCR: 0x00005080 | CR: 0x00000000 +FNMSUBS. (RTN) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009000 | CR: 0x20000000 +FNMSUBS. (RTZ) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009001 | CR: 0x40000002 +FNMSUBS. (RTPI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 +FNMSUBS. (RTNI) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 +FNMSUBS. (VE) :: frD 0xFFF0000000000000 | frA 1.000000e+00 | frC 1.000000e+00 | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x8000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x8000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB (VE) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x8000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB (VE) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x8000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB (VE) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x8000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB (VE) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x8000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB (VE) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92025000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x7FEFFFFFFFFFFFFF | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92024001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92025002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x7FEFFFFFFFFFFFFF | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92024003 | CR: 0x40000002 +FSUB (VE) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92025080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x40000002 +FSUB (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FSUB (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FSUB (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FSUB (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FSUB (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811003 | CR: 0x40000002 +FSUB (VE) :: frD 0x0000000000000000 | frA inf | frB inf | FPSCR: 0xE0800080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FSUB (VE) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FSUB (RTN) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FSUB (VE) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FSUB (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811000 | CR: 0x20000000 +FSUB (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811001 | CR: 0x40000002 +FSUB (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811002 | CR: 0x40000002 +FSUB (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811003 | CR: 0x40000002 +FSUB (VE) :: frD 0x0000000000000000 | frA -inf | frB -inf | FPSCR: 0xE0800080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x8000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x8000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x8000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x8000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x8000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x8000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92025000 | CR: 0x29000000 +FSUB. (RTZ) :: frD 0x7FEFFFFFFFFFFFFF | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92024001 | CR: 0x49000002 +FSUB. (RTPI) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92025002 | CR: 0x49000002 +FSUB. (RTNI) :: frD 0x7FEFFFFFFFFFFFFF | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92024003 | CR: 0x49000002 +FSUB. (VE) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92025080 | CR: 0x09000000 +FSUB. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x2A000000 +FSUB. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x4A000002 +FSUB. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x4A000002 +FSUB. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x4A000002 +FSUB. (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x0E000000 +FSUB. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811000 | CR: 0x2A000000 +FSUB. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811001 | CR: 0x4A000002 +FSUB. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811002 | CR: 0x4A000002 +FSUB. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811003 | CR: 0x4A000002 +FSUB. (VE) :: frD 0x0000000000000000 | frA inf | frB inf | FPSCR: 0xE0800080 | CR: 0x0E000000 +FSUB. (RTN) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FSUB. (VE) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FSUB. (RTZ) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FSUB. (RTPI) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FSUB. (RTNI) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FSUB. (VE) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FSUB. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811000 | CR: 0x2A000000 +FSUB. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811001 | CR: 0x4A000002 +FSUB. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811002 | CR: 0x4A000002 +FSUB. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811003 | CR: 0x4A000002 +FSUB. (VE) :: frD 0x0000000000000000 | frA -inf | frB -inf | FPSCR: 0xE0800080 | CR: 0x0E000000 +FSUBS (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x8000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x8000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x8000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x8000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x8000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x8000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92065000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x47EFFFFFE0000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92024001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92065002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x47EFFFFFE0000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92024003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92065080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x0000000000000000 | frA inf | frB inf | FPSCR: 0xE0800080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FSUBS (VE) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FSUBS (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811000 | CR: 0x20000000 +FSUBS (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811001 | CR: 0x40000002 +FSUBS (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811002 | CR: 0x40000002 +FSUBS (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811003 | CR: 0x40000002 +FSUBS (VE) :: frD 0x0000000000000000 | frA -inf | frB -inf | FPSCR: 0xE0800080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x8000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x0000000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x8000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x0000000000000000 | frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x8000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x0000000000000000 | frA 1.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x8000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x0000000000000000 | frA 3.500000e+00 | frB 3.500000e+00 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x8000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x0000000000000000 | frA 3.923640e-44 | frB 3.923640e-44 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x8000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x0000000000000000 | frA 1.797693e+308 | frB 1.797693e+308 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x8000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00012003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x0000000000000000 | frA -1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x00002080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92065000 | CR: 0x29000000 +FSUBS. (RTZ) :: frD 0x47EFFFFFE0000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92024001 | CR: 0x49000002 +FSUBS. (RTPI) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92065002 | CR: 0x49000002 +FSUBS. (RTNI) :: frD 0x47EFFFFFE0000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92024003 | CR: 0x49000002 +FSUBS. (VE) :: frD 0x7FF0000000000000 | frA 1.797693e+308 | frB -1.797693e+308 | FPSCR: 0x92065080 | CR: 0x09000000 +FSUBS. (RTN) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011000 | CR: 0x2A000000 +FSUBS. (RTZ) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011001 | CR: 0x4A000002 +FSUBS. (RTPI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011002 | CR: 0x4A000002 +FSUBS. (RTNI) :: frD 0x7FFC000000000000 | frA nan | frB inf | FPSCR: 0xA1011003 | CR: 0x4A000002 +FSUBS. (VE) :: frD 0x0000000000000000 | frA nan | frB inf | FPSCR: 0xE1000080 | CR: 0x0E000000 +FSUBS. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x7FF8000000000000 | frA nan | frB inf | FPSCR: 0x00011080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x7FF8000000000000 | frA nan | frB -inf | FPSCR: 0x00011080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x7FF8000000000000 | frA inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x7FF8000000000000 | frA -inf | frB nan | FPSCR: 0x00011080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811000 | CR: 0x2A000000 +FSUBS. (RTZ) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811001 | CR: 0x4A000002 +FSUBS. (RTPI) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811002 | CR: 0x4A000002 +FSUBS. (RTNI) :: frD 0x7FF8000000000000 | frA inf | frB inf | FPSCR: 0xA0811003 | CR: 0x4A000002 +FSUBS. (VE) :: frD 0x0000000000000000 | frA inf | frB inf | FPSCR: 0xE0800080 | CR: 0x0E000000 +FSUBS. (RTN) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0x7FF0000000000000 | frA inf | frB -inf | FPSCR: 0x00005080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009000 | CR: 0x20000000 +FSUBS. (RTZ) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009001 | CR: 0x40000002 +FSUBS. (RTPI) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009002 | CR: 0x40000002 +FSUBS. (RTNI) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009003 | CR: 0x40000002 +FSUBS. (VE) :: frD 0xFFF0000000000000 | frA -inf | frB inf | FPSCR: 0x00009080 | CR: 0x00000000 +FSUBS. (RTN) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811000 | CR: 0x2A000000 +FSUBS. (RTZ) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811001 | CR: 0x4A000002 +FSUBS. (RTPI) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811002 | CR: 0x4A000002 +FSUBS. (RTNI) :: frD 0x7FF8000000000000 | frA -inf | frB -inf | FPSCR: 0xA0811003 | CR: 0x4A000002 +FSUBS. (VE) :: frD 0x0000000000000000 | frA -inf | frB -inf | FPSCR: 0xE0800080 | CR: 0x0E000000 \ No newline at end of file diff --git a/cpu/ppc/test/ppcfloattests.csv b/cpu/ppc/test/ppcfloattests.csv index 253225e..3d397a2 100644 --- a/cpu/ppc/test/ppcfloattests.csv +++ b/cpu/ppc/test/ppcfloattests.csv @@ -772,3 +772,1283 @@ FDIVS.,0xEC632025,round=RTZ,frD=7FFC000000000000,frA=-inf,frB=nan,FPSCR=0xA10110 FDIVS.,0xEC632025,round=RPI,frD=7FFC000000000000,frA=-inf,frB=nan,FPSCR=0xA1011002,CR=0x4A000002 FDIVS.,0xEC632025,round=RTN,frD=7FFC000000000000,frA=-inf,frB=nan,FPSCR=0xA1011003,CR=0x4A000002 FDIVS.,0xEC632025,round=VEN,frD=0000000000000000,frA=-inf,frB=nan,FPSCR=0xE1000080,CR=0x0E000000 +FMADD,0xFC63217A,round=RTN,frD=4000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004000,CR=0x20000000 +FMADD,0xFC63217A,round=RTZ,frD=4000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004001,CR=0x40000002 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dest_64, src1_64, src2_64; + //float sfp_dest, sfp_src1, sfp_src2, sfp_src3; double dfp_dest, dfp_src1, dfp_src2, dfp_src3; string rounding_mode; @@ -186,10 +187,10 @@ static void read_test_float_data() { check_xer = 0; check_cr = 0; check_fpscr = 0; - sfp_dest = 0.0; - sfp_src1 = 0.0; - sfp_src2 = 0.0; - sfp_src3 = 0.0; + //sfp_dest = 0.0; + //sfp_src1 = 0.0; + //sfp_src2 = 0.0; + //sfp_src3 = 0.0; dfp_dest = 0.0; dfp_src1 = 0.0; dfp_src2 = 0.0; @@ -199,14 +200,14 @@ static void read_test_float_data() { if (tokens[i].rfind("frD=", 0) == 0) { dfp_dest = stoul(tokens[i].substr(4), NULL, 16); } else if (tokens[i].rfind("frA=", 0) == 0) { - dfp_src1 = stoul(tokens[i].substr(4), NULL, 16); + dfp_src1 = stod(tokens[i].substr(4), NULL); } else if (tokens[i].rfind("frB=", 0) == 0) { - dfp_src2 = stoul(tokens[i].substr(4), NULL, 16); + dfp_src2 = stod(tokens[i].substr(4), NULL); } else if (tokens[i].rfind("frC=", 0) == 0) { - dfp_src3 = stoul(tokens[i].substr(4), NULL, 16); + dfp_src3 = stod(tokens[i].substr(4), NULL); } else if (tokens[i].rfind("round=", 0) == 0) { rounding_mode = tokens[i].substr(6, 3); - ppc_state.fpscr &= 0xFFFFFF7C; + ppc_state.fpscr &= 0xFFFFFFFC; if (rounding_mode.compare("RTN") == 0) { ppc_state.fpscr |= 0x0; } else if (rounding_mode.compare("RTZ") == 0) { @@ -249,15 +250,14 @@ static void read_test_float_data() { ntested++; - if ((tokens[0].rfind("FCMP") && (ppc_state.gpr[3] != dfp_dest)) || + if ((tokens[0].rfind("FCMP") && (ppc_state.fpr[3].dbl64_r != dfp_dest)) || (ppc_state.fpscr != check_fpscr) || (ppc_state.cr != check_cr)) { - cout << "Mismatch: instr=" << tokens[0] << ", src1=0x" << hex << src1 << ", src2=0x" << hex - << src2 << endl; + cout << "Mismatch: instr=" << tokens[0] << ", src1=0x" << scientific << dfp_src1 << ", src2=0x" << scientific << dfp_src2 << ", src3=0x" << scientific << dfp_src3 << endl; cout << "expected: dest=0x" << hex << dfp_dest << ", FPSCR=0x" << hex << check_xer << ", CR=0x" << hex << check_cr << endl; - cout << "got: dest=0x" << hex << ppc_state.gpr[3] << ", FPSCR=0x" << hex + cout << "got: dest=0x" << hex << ppc_state.fpr[3].dbl64_r << ", FPSCR=0x" << hex << ppc_state.fpscr << ", CR=0x" << hex << ppc_state.cr << endl; cout << "Test file line #: " << dec << lineno << endl << endl; From 7d7a4b453f840bb9232a510e180263fe503b5e74 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Fri, 15 Oct 2021 06:28:11 -0700 Subject: [PATCH 07/11] Partial test file reading fix --- cpu/ppc/test/genppctests.py | 2 +- cpu/ppc/test/ppcfloattests.csv | 4060 ++++++++++++++++---------------- cpu/ppc/test/ppctests.cpp | 2 +- 3 files changed, 2032 insertions(+), 2032 deletions(-) diff --git a/cpu/ppc/test/genppctests.py b/cpu/ppc/test/genppctests.py index 4fa4d13..8448cde 100644 --- a/cpu/ppc/test/genppctests.py +++ b/cpu/ppc/test/genppctests.py @@ -438,7 +438,7 @@ if __name__ == "__main__": checkstring = '' pos += 1 if ("frD" in checkstring): - out_file.write(",frD=" + line[pos+4:pos+20]) + out_file.write(",frD=0x" + line[pos+4:pos+20]) checkstring = '' if ("frA" in checkstring): #sloppy temp code check2 = line[pos+1:pos+10] diff --git a/cpu/ppc/test/ppcfloattests.csv b/cpu/ppc/test/ppcfloattests.csv index 3d397a2..868d674 100644 --- a/cpu/ppc/test/ppcfloattests.csv +++ b/cpu/ppc/test/ppcfloattests.csv @@ -1,353 +1,353 @@ -FADD,0xFC63202A,round=RTN,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002000,CR=0x20000000 -FADD,0xFC63202A,round=RTZ,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002001,CR=0x40000002 -FADD,0xFC63202A,round=RPI,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002002,CR=0x40000002 -FADD,0xFC63202A,round=RTN,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002003,CR=0x40000002 -FADD,0xFC63202A,round=VEN,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002080,CR=0x00000000 -FADD,0xFC63202A,round=RTN,frD=3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004000,CR=0x20000000 -FADD,0xFC63202A,round=RTZ,frD=3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004001,CR=0x40000002 -FADD,0xFC63202A,round=RPI,frD=3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004002,CR=0x40000002 -FADD,0xFC63202A,round=RTN,frD=3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004003,CR=0x40000002 -FADD,0xFC63202A,round=VEN,frD=3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004080,CR=0x00000000 -FADD,0xFC63202A,round=RTN,frD=4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004000,CR=0x20000000 -FADD,0xFC63202A,round=RTZ,frD=4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004001,CR=0x40000002 -FADD,0xFC63202A,round=RPI,frD=4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004002,CR=0x40000002 -FADD,0xFC63202A,round=RTN,frD=4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004003,CR=0x40000002 -FADD,0xFC63202A,round=VEN,frD=4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004080,CR=0x00000000 -FADD,0xFC63202A,round=RTN,frD=401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004000,CR=0x20000000 -FADD,0xFC63202A,round=RTZ,frD=401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004001,CR=0x40000002 -FADD,0xFC63202A,round=RPI,frD=401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004002,CR=0x40000002 -FADD,0xFC63202A,round=RTN,frD=401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004003,CR=0x40000002 -FADD,0xFC63202A,round=VEN,frD=401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004080,CR=0x00000000 -FADD,0xFC63202A,round=RTN,frD=36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004000,CR=0x20000000 -FADD,0xFC63202A,round=RTZ,frD=36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004001,CR=0x40000002 -FADD,0xFC63202A,round=RPI,frD=36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004002,CR=0x40000002 -FADD,0xFC63202A,round=RTN,frD=36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004003,CR=0x40000002 -FADD,0xFC63202A,round=VEN,frD=36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004080,CR=0x00000000 -FADD,0xFC63202A,round=RTN,frD=7FF0000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92025000,CR=0x20000000 -FADD,0xFC63202A,round=RTZ,frD=7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92024001,CR=0x40000002 -FADD,0xFC63202A,round=RPI,frD=7FF0000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92025002,CR=0x40000002 -FADD,0xFC63202A,round=RTN,frD=7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92024003,CR=0x40000002 -FADD,0xFC63202A,round=VEN,frD=7FF0000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92025080,CR=0x00000000 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-FADD.,0xFC63202B,round=RPI,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002002,CR=0x40000002 -FADD.,0xFC63202B,round=RTN,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002003,CR=0x40000002 -FADD.,0xFC63202B,round=VEN,frD=0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002080,CR=0x00000000 -FADD.,0xFC63202B,round=RTN,frD=3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004000,CR=0x20000000 -FADD.,0xFC63202B,round=RTZ,frD=3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004001,CR=0x40000002 -FADD.,0xFC63202B,round=RPI,frD=3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004002,CR=0x40000002 -FADD.,0xFC63202B,round=RTN,frD=3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004003,CR=0x40000002 -FADD.,0xFC63202B,round=VEN,frD=3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004080,CR=0x00000000 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+FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011000,CR=0x20000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011001,CR=0x40000002 +FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011002,CR=0x40000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011003,CR=0x40000002 +FSUBS.,0xEC63202B,round=VEN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011080,CR=0x00000000 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011000,CR=0x20000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011001,CR=0x40000002 +FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011002,CR=0x40000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011003,CR=0x40000002 +FSUBS.,0xEC63202B,round=VEN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011080,CR=0x00000000 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011000,CR=0x20000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011001,CR=0x40000002 +FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011002,CR=0x40000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011003,CR=0x40000002 +FSUBS.,0xEC63202B,round=VEN,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011080,CR=0x00000000 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011000,CR=0x20000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011001,CR=0x40000002 +FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011002,CR=0x40000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011003,CR=0x40000002 +FSUBS.,0xEC63202B,round=VEN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011080,CR=0x00000000 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811000,CR=0x2A000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811001,CR=0x4A000002 +FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811002,CR=0x4A000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811003,CR=0x4A000002 +FSUBS.,0xEC63202B,round=VEN,frD=0x0000000000000000,frA=inf,frB=inf,FPSCR=0xE0800080,CR=0x0E000000 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005000,CR=0x20000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005001,CR=0x40000002 +FSUBS.,0xEC63202B,round=RPI,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005002,CR=0x40000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005003,CR=0x40000002 +FSUBS.,0xEC63202B,round=VEN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005080,CR=0x00000000 +FSUBS.,0xEC63202B,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009000,CR=0x20000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009001,CR=0x40000002 +FSUBS.,0xEC63202B,round=RPI,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009002,CR=0x40000002 +FSUBS.,0xEC63202B,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009003,CR=0x40000002 +FSUBS.,0xEC63202B,round=VEN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009080,CR=0x00000000 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811000,CR=0x2A000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811001,CR=0x4A000002 +FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811002,CR=0x4A000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811003,CR=0x4A000002 +FSUBS.,0xEC63202B,round=VEN,frD=0x0000000000000000,frA=-inf,frB=-inf,FPSCR=0xE0800080,CR=0x0E000000 diff --git a/cpu/ppc/test/ppctests.cpp b/cpu/ppc/test/ppctests.cpp index 1df6a61..a768a8d 100644 --- a/cpu/ppc/test/ppctests.cpp +++ b/cpu/ppc/test/ppctests.cpp @@ -198,7 +198,7 @@ static void read_test_float_data() { for (i = 2; i < tokens.size(); i++) { if (tokens[i].rfind("frD=", 0) == 0) { - dfp_dest = stoul(tokens[i].substr(4), NULL, 16); + dfp_dest = stoull(tokens[i].substr(4), NULL, 16); } else if (tokens[i].rfind("frA=", 0) == 0) { dfp_src1 = stod(tokens[i].substr(4), NULL); } else if (tokens[i].rfind("frB=", 0) == 0) { From 00dd99d851d7705ceda080f594f5b039b8a60b80 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Fri, 15 Oct 2021 20:02:00 -0700 Subject: [PATCH 08/11] Temporarily removing comparisons These seem to cause the test program to crash. Will reinstate once the cause of the crash is resolved. --- cpu/ppc/test/ppcfloattest.txt | 24 ------------------------ cpu/ppc/test/ppcfloattests.csv | 24 ------------------------ 2 files changed, 48 deletions(-) diff --git a/cpu/ppc/test/ppcfloattest.txt b/cpu/ppc/test/ppcfloattest.txt index 11fd314..b36f13d 100644 --- a/cpu/ppc/test/ppcfloattest.txt +++ b/cpu/ppc/test/ppcfloattest.txt @@ -348,30 +348,6 @@ FADDS. (RTZ) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009 FADDS. (RTPI) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009002 | CR: 0x40000002 FADDS. (RTNI) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009003 | CR: 0x40000002 FADDS. (VE) :: frD 0xFFF0000000000000 | frA -inf | frB -inf | FPSCR: 0x00009080 | CR: 0x00000000 -FCMPO :: frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x02000000 -FCMPO :: frA 0.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008000 | CR: 0x08000000 -FCMPO :: frA 1.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00004000 | CR: 0x04000000 -FCMPO :: frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002000 | CR: 0x02000000 -FCMPO :: frA 0.000000e+00 | frB 5.000000e-01 | FPSCR: 0x00008000 | CR: 0x08000000 -FCMPO :: frA 5.000000e-01 | frB 0.000000e+00 | FPSCR: 0x00004000 | CR: 0x04000000 -FCMPO :: frA nan | frB nan | FPSCR: 0xA0081000 | CR: 0x01000000 -FCMPO :: frA nan | frB nan | FPSCR: 0xA1081000 | CR: 0x01000000 -FCMPO :: frA inf | frB inf | FPSCR: 0x00002000 | CR: 0x02000000 -FCMPO :: frA inf | frB -inf | FPSCR: 0x00004000 | CR: 0x04000000 -FCMPO :: frA -inf | frB inf | FPSCR: 0x00008000 | CR: 0x08000000 -FCMPO :: frA -inf | frB -inf | FPSCR: 0x00002000 | CR: 0x02000000 -FCMPU :: frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00002000 | CR: 0x02000000 -FCMPU :: frA 0.000000e+00 | frB 1.000000e+00 | FPSCR: 0x00008000 | CR: 0x08000000 -FCMPU :: frA 1.000000e+00 | frB 0.000000e+00 | FPSCR: 0x00004000 | CR: 0x04000000 -FCMPU :: frA 5.000000e-01 | frB 5.000000e-01 | FPSCR: 0x00002000 | CR: 0x02000000 -FCMPU :: frA 0.000000e+00 | frB 5.000000e-01 | FPSCR: 0x00008000 | CR: 0x08000000 -FCMPU :: frA 5.000000e-01 | frB 0.000000e+00 | FPSCR: 0x00004000 | CR: 0x04000000 -FCMPU :: frA nan | frB nan | FPSCR: 0x00001000 | CR: 0x01000000 -FCMPU :: frA nan | frB nan | FPSCR: 0xA1001000 | CR: 0x01000000 -FCMPU :: frA inf | frB inf | FPSCR: 0x00002000 | CR: 0x02000000 -FCMPU :: frA inf | frB -inf | FPSCR: 0x00004000 | CR: 0x04000000 -FCMPU :: frA -inf | frB inf | FPSCR: 0x00008000 | CR: 0x08000000 -FCMPU :: frA -inf | frB -inf | FPSCR: 0x00002000 | CR: 0x02000000 FDIV (RTN) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211000 | CR: 0x20000000 FDIV (RTZ) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211001 | CR: 0x40000002 FDIV (RTPI) :: frD 0x7FF8000000000000 | frA 0.000000e+00 | frB 0.000000e+00 | FPSCR: 0xA0211002 | CR: 0x40000002 diff --git a/cpu/ppc/test/ppcfloattests.csv b/cpu/ppc/test/ppcfloattests.csv index 868d674..45f9276 100644 --- a/cpu/ppc/test/ppcfloattests.csv +++ b/cpu/ppc/test/ppcfloattests.csv @@ -348,30 +348,6 @@ FADDS.,0xEC63202B,round=RTZ,frD=0xFFF0000000000000,frA=-inf,frB=-inf,FPSCR=0x000 FADDS.,0xEC63202B,round=RPI,frD=0xFFF0000000000000,frA=-inf,frB=-inf,FPSCR=0x00009002,CR=0x40000002 FADDS.,0xEC63202B,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=-inf,FPSCR=0x00009003,CR=0x40000002 FADDS.,0xEC63202B,round=VEN,frD=0xFFF0000000000000,frA=-inf,frB=-inf,FPSCR=0x00009080,CR=0x00000000 -FCMPO,0xEC032040,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002000,CR=0x02000000 -FCMPO,0xEC032040,frA=0.000000e+00,frB=1.000000e+00,FPSCR=0x00008000,CR=0x08000000 -FCMPO,0xEC032040,frA=1.000000e+00,frB=0.000000e+00,FPSCR=0x00004000,CR=0x04000000 -FCMPO,0xEC032040,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00002000,CR=0x02000000 -FCMPO,0xEC032040,frA=0.000000e+00,frB=5.000000e-01,FPSCR=0x00008000,CR=0x08000000 -FCMPO,0xEC032040,frA=5.000000e-01,frB=0.000000e+00,FPSCR=0x00004000,CR=0x04000000 -FCMPO,0xEC032040,frA=nan,frB=nan,FPSCR=0xA0081000,CR=0x01000000 -FCMPO,0xEC032040,frA=nan,frB=nan,FPSCR=0xA1081000,CR=0x01000000 -FCMPO,0xEC032040,frA=inf,frB=inf,FPSCR=0x00002000,CR=0x02000000 -FCMPO,0xEC032040,frA=inf,frB=-inf,FPSCR=0x00004000,CR=0x04000000 -FCMPO,0xEC032040,frA=-inf,frB=inf,FPSCR=0x00008000,CR=0x08000000 -FCMPO,0xEC032040,frA=-inf,frB=-inf,FPSCR=0x00002000,CR=0x02000000 -FCMPU,0xEC032000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002000,CR=0x02000000 -FCMPU,0xEC032000,frA=0.000000e+00,frB=1.000000e+00,FPSCR=0x00008000,CR=0x08000000 -FCMPU,0xEC032000,frA=1.000000e+00,frB=0.000000e+00,FPSCR=0x00004000,CR=0x04000000 -FCMPU,0xEC032000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00002000,CR=0x02000000 -FCMPU,0xEC032000,frA=0.000000e+00,frB=5.000000e-01,FPSCR=0x00008000,CR=0x08000000 -FCMPU,0xEC032000,frA=5.000000e-01,frB=0.000000e+00,FPSCR=0x00004000,CR=0x04000000 -FCMPU,0xEC032000,frA=nan,frB=nan,FPSCR=0x00001000,CR=0x01000000 -FCMPU,0xEC032000,frA=nan,frB=nan,FPSCR=0xA1001000,CR=0x01000000 -FCMPU,0xEC032000,frA=inf,frB=inf,FPSCR=0x00002000,CR=0x02000000 -FCMPU,0xEC032000,frA=inf,frB=-inf,FPSCR=0x00004000,CR=0x04000000 -FCMPU,0xEC032000,frA=-inf,frB=inf,FPSCR=0x00008000,CR=0x08000000 -FCMPU,0xEC032000,frA=-inf,frB=-inf,FPSCR=0x00002000,CR=0x02000000 FDIV,0xFC632024,round=RTN,frD=0x7FF8000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0xA0211000,CR=0x20000000 FDIV,0xFC632024,round=RTZ,frD=0x7FF8000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0xA0211001,CR=0x40000002 FDIV,0xFC632024,round=RPI,frD=0x7FF8000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0xA0211002,CR=0x40000002 From 3c7fc58ac0c89b898025d32b9bfdde90348ed383 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Sat, 16 Oct 2021 22:33:56 -0700 Subject: [PATCH 09/11] Small test case fixes for floating points --- cpu/ppc/test/genppctests.py | 2 +- cpu/ppc/test/ppcfloattests.csv | 3248 ++++++++++++++++---------------- cpu/ppc/test/ppctests.cpp | 7 +- 3 files changed, 1628 insertions(+), 1629 deletions(-) diff --git a/cpu/ppc/test/genppctests.py b/cpu/ppc/test/genppctests.py index 8448cde..e1e0076 100644 --- a/cpu/ppc/test/genppctests.py +++ b/cpu/ppc/test/genppctests.py @@ -513,7 +513,7 @@ if __name__ == "__main__": out_file.write(",FPSCR=" + line[pos+3:pos+13]) checkstring = '' if ("CR" in checkstring): - out_file.write(",CR=" + line[pos+3:pos+14]) + out_file.write(",CR=0x0" + line[pos+6:pos+14]) checkstring = '' pos += 1 diff --git a/cpu/ppc/test/ppcfloattests.csv b/cpu/ppc/test/ppcfloattests.csv index 45f9276..ecb8596 100644 --- a/cpu/ppc/test/ppcfloattests.csv +++ b/cpu/ppc/test/ppcfloattests.csv @@ -1,2030 +1,2030 @@ -FADD,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002000,CR=0x20000000 -FADD,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002001,CR=0x40000002 -FADD,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002002,CR=0x40000002 -FADD,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002003,CR=0x40000002 +FADD,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002000,CR=0x00000000 +FADD,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002001,CR=0x00000002 +FADD,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002002,CR=0x00000002 +FADD,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002003,CR=0x00000002 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FNMSUB,0xFC632178,round=VEN,frD=0xC04B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068080,CR=0x00000000 -FNMSUB,0xFC632178,round=RTN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064000,CR=0x20000000 -FNMSUB,0xFC632178,round=RTZ,frD=0x36D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82024001,CR=0x40000002 -FNMSUB,0xFC632178,round=RPI,frD=0x36D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82024002,CR=0x40000002 -FNMSUB,0xFC632178,round=RTN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064003,CR=0x40000002 +FNMSUB,0xFC632178,round=RTN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064000,CR=0x00000000 +FNMSUB,0xFC632178,round=RTZ,frD=0x36D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82024001,CR=0x00000002 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-FNMSUB,0xFC632178,round=RTZ,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009001,CR=0x40000002 -FNMSUB,0xFC632178,round=RPI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009002,CR=0x40000002 -FNMSUB,0xFC632178,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009003,CR=0x40000002 +FNMSUB,0xFC632178,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009000,CR=0x00000000 +FNMSUB,0xFC632178,round=RTZ,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009001,CR=0x00000002 +FNMSUB,0xFC632178,round=RPI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009002,CR=0x00000002 +FNMSUB,0xFC632178,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009003,CR=0x00000002 FNMSUB,0xFC632178,round=VEN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009080,CR=0x00000000 -FNMSUB.,0xFC632179,round=RTN,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012000,CR=0x20000000 -FNMSUB.,0xFC632179,round=RTZ,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012001,CR=0x40000002 -FNMSUB.,0xFC632179,round=RPI,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012002,CR=0x40000002 -FNMSUB.,0xFC632179,round=RTN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002003,CR=0x40000002 +FNMSUB.,0xFC632179,round=RTN,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012000,CR=0x00000000 +FNMSUB.,0xFC632179,round=RTZ,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012001,CR=0x00000002 +FNMSUB.,0xFC632179,round=RPI,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012002,CR=0x00000002 +FNMSUB.,0xFC632179,round=RTN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002003,CR=0x00000002 FNMSUB.,0xFC632179,round=VEN,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012080,CR=0x00000000 -FNMSUB.,0xFC632179,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008000,CR=0x20000000 -FNMSUB.,0xFC632179,round=RTZ,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008001,CR=0x40000002 -FNMSUB.,0xFC632179,round=RPI,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008002,CR=0x40000002 -FNMSUB.,0xFC632179,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008003,CR=0x40000002 +FNMSUB.,0xFC632179,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008000,CR=0x00000000 +FNMSUB.,0xFC632179,round=RTZ,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008001,CR=0x00000002 +FNMSUB.,0xFC632179,round=RPI,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008002,CR=0x00000002 +FNMSUB.,0xFC632179,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008003,CR=0x00000002 FNMSUB.,0xFC632179,round=VEN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008080,CR=0x00000000 -FNMSUB.,0xFC632179,round=RTN,frD=0xC04B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068000,CR=0x28000000 -FNMSUB.,0xFC632179,round=RTZ,frD=0xC04B8B1807E88E7B,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028001,CR=0x48000002 -FNMSUB.,0xFC632179,round=RPI,frD=0xC04B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068002,CR=0x48000002 -FNMSUB.,0xFC632179,round=RTN,frD=0xC04B8B1807E88E7B,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028003,CR=0x48000002 +FNMSUB.,0xFC632179,round=RTN,frD=0xC04B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068000,CR=0x08000000 +FNMSUB.,0xFC632179,round=RTZ,frD=0xC04B8B1807E88E7B,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028001,CR=0x08000002 +FNMSUB.,0xFC632179,round=RPI,frD=0xC04B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068002,CR=0x08000002 +FNMSUB.,0xFC632179,round=RTN,frD=0xC04B8B1807E88E7B,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028003,CR=0x08000002 FNMSUB.,0xFC632179,round=VEN,frD=0xC04B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068080,CR=0x08000000 -FNMSUB.,0xFC632179,round=RTN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064000,CR=0x28000000 -FNMSUB.,0xFC632179,round=RTZ,frD=0x36D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82024001,CR=0x48000002 -FNMSUB.,0xFC632179,round=RPI,frD=0x36D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82024002,CR=0x48000002 -FNMSUB.,0xFC632179,round=RTN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064003,CR=0x48000002 +FNMSUB.,0xFC632179,round=RTN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064000,CR=0x08000000 +FNMSUB.,0xFC632179,round=RTZ,frD=0x36D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82024001,CR=0x08000002 +FNMSUB.,0xFC632179,round=RPI,frD=0x36D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82024002,CR=0x08000002 +FNMSUB.,0xFC632179,round=RTN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064003,CR=0x08000002 FNMSUB.,0xFC632179,round=VEN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064080,CR=0x08000000 -FNMSUB.,0xFC632179,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011000,CR=0x20000000 -FNMSUB.,0xFC632179,round=RTZ,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011001,CR=0x40000002 -FNMSUB.,0xFC632179,round=RPI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011002,CR=0x40000002 -FNMSUB.,0xFC632179,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x40000002 +FNMSUB.,0xFC632179,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011000,CR=0x00000000 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-FNMSUB.,0xFC632179,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x4A000002 +FNMSUB.,0xFC632179,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011000,CR=0x0A000000 +FNMSUB.,0xFC632179,round=RTZ,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011001,CR=0x0A000002 +FNMSUB.,0xFC632179,round=RPI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011002,CR=0x0A000002 +FNMSUB.,0xFC632179,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x0A000002 FNMSUB.,0xFC632179,round=VEN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xE1000080,CR=0x0E000000 -FNMSUB.,0xFC632179,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005000,CR=0x20000000 -FNMSUB.,0xFC632179,round=RTZ,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005001,CR=0x40000002 -FNMSUB.,0xFC632179,round=RPI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005002,CR=0x40000002 -FNMSUB.,0xFC632179,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005003,CR=0x40000002 +FNMSUB.,0xFC632179,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005000,CR=0x00000000 +FNMSUB.,0xFC632179,round=RTZ,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005001,CR=0x00000002 +FNMSUB.,0xFC632179,round=RPI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005002,CR=0x00000002 +FNMSUB.,0xFC632179,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005003,CR=0x00000002 FNMSUB.,0xFC632179,round=VEN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005080,CR=0x00000000 -FNMSUB.,0xFC632179,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009000,CR=0x20000000 -FNMSUB.,0xFC632179,round=RTZ,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009001,CR=0x40000002 -FNMSUB.,0xFC632179,round=RPI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009002,CR=0x40000002 -FNMSUB.,0xFC632179,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009003,CR=0x40000002 +FNMSUB.,0xFC632179,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009000,CR=0x00000000 +FNMSUB.,0xFC632179,round=RTZ,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009001,CR=0x00000002 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-FNMSUBS,0xFC632178,round=RPI,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008002,CR=0x40000002 -FNMSUBS,0xFC632178,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008003,CR=0x40000002 +FNMSUBS,0xFC632178,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008000,CR=0x00000000 +FNMSUBS,0xFC632178,round=RTZ,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008001,CR=0x00000002 +FNMSUBS,0xFC632178,round=RPI,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008002,CR=0x00000002 +FNMSUBS,0xFC632178,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008003,CR=0x00000002 FNMSUBS,0xFC632178,round=VEN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008080,CR=0x00000000 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-FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011000,CR=0x20000000 -FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011001,CR=0x40000002 -FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011002,CR=0x40000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011003,CR=0x40000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011000,CR=0x00000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011001,CR=0x00000002 +FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011002,CR=0x00000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011003,CR=0x00000002 FSUBS.,0xEC63202B,round=VEN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011080,CR=0x00000000 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811000,CR=0x2A000000 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-FSUBS.,0xEC63202B,round=RPI,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005002,CR=0x40000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005003,CR=0x40000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005000,CR=0x00000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005001,CR=0x00000002 +FSUBS.,0xEC63202B,round=RPI,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005002,CR=0x00000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005003,CR=0x00000002 FSUBS.,0xEC63202B,round=VEN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005080,CR=0x00000000 -FSUBS.,0xEC63202B,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009000,CR=0x20000000 -FSUBS.,0xEC63202B,round=RTZ,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009001,CR=0x40000002 -FSUBS.,0xEC63202B,round=RPI,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009002,CR=0x40000002 -FSUBS.,0xEC63202B,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009003,CR=0x40000002 +FSUBS.,0xEC63202B,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009000,CR=0x00000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009001,CR=0x00000002 +FSUBS.,0xEC63202B,round=RPI,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009002,CR=0x00000002 +FSUBS.,0xEC63202B,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009003,CR=0x00000002 FSUBS.,0xEC63202B,round=VEN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009080,CR=0x00000000 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811000,CR=0x2A000000 -FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811001,CR=0x4A000002 -FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811002,CR=0x4A000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811003,CR=0x4A000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811000,CR=0x0A000000 +FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811001,CR=0x0A000002 +FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811002,CR=0x0A000002 +FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811003,CR=0x0A000002 FSUBS.,0xEC63202B,round=VEN,frD=0x0000000000000000,frA=-inf,frB=-inf,FPSCR=0xE0800080,CR=0x0E000000 diff --git a/cpu/ppc/test/ppctests.cpp b/cpu/ppc/test/ppctests.cpp index a768a8d..8f99562 100644 --- a/cpu/ppc/test/ppctests.cpp +++ b/cpu/ppc/test/ppctests.cpp @@ -224,7 +224,7 @@ static void read_test_float_data() { exit(0); } } else if (tokens[i].rfind("FPSCR=", 0) == 0) { - check_cr = stoul(tokens[i].substr(6), NULL, 16); + check_fpscr = stoul(tokens[i].substr(6), NULL, 16); } else if (tokens[i].rfind("CR=", 0) == 0) { check_cr = stoul(tokens[i].substr(3), NULL, 16); } else { @@ -241,7 +241,6 @@ static void read_test_float_data() { ppc_state.fpr[4].dbl64_r = dfp_src2; ppc_state.fpr[5].dbl64_r = dfp_src3; - ppc_state.spr[SPR::XER] = 0; ppc_state.cr = 0; ppc_cur_instruction = opcode; @@ -253,8 +252,8 @@ static void read_test_float_data() { if ((tokens[0].rfind("FCMP") && (ppc_state.fpr[3].dbl64_r != dfp_dest)) || (ppc_state.fpscr != check_fpscr) || (ppc_state.cr != check_cr)) { - cout << "Mismatch: instr=" << tokens[0] << ", src1=0x" << scientific << dfp_src1 << ", src2=0x" << scientific << dfp_src2 << ", src3=0x" << scientific << dfp_src3 << endl; - cout << "expected: dest=0x" << hex << dfp_dest << ", FPSCR=0x" << hex << check_xer + cout << "Mismatch: instr=" << tokens[0] << ", src1=" << scientific << dfp_src1 << ", src2=" << scientific << dfp_src2 << ", src3=" << scientific << dfp_src3 << endl; + cout << "expected: dest=0x" << hex << dfp_dest << ", FPSCR=0x" << hex << check_fpscr << ", CR=0x" << hex << check_cr << endl; cout << "got: dest=0x" << hex << ppc_state.fpr[3].dbl64_r << ", FPSCR=0x" << hex From 331b93d4d64a42c4b820522a573ced7a69d66cf5 Mon Sep 17 00:00:00 2001 From: Maxim Poliakovski Date: Sun, 17 Oct 2021 23:41:53 +0200 Subject: [PATCH 10/11] Fix compilation with Clang 11. --- CMakeLists.txt | 1 + cpu/ppc/ppcfpopcodes.cpp | 14 +++++++------- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index bee6e1f..6845c6a 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -169,6 +169,7 @@ if (DPPC_BUILD_PPC_TESTS) TARGET testppc POST_BUILD COMMAND ${CMAKE_COMMAND} -E copy "${PROJECT_SOURCE_DIR}/cpu/ppc/test/ppcinttests.csv" + "${PROJECT_SOURCE_DIR}/cpu/ppc/test/ppcfloattests.csv" "${PROJECT_SOURCE_DIR}/cpu/ppc/test/ppcdisasmtest.csv" $) endif() diff --git a/cpu/ppc/ppcfpopcodes.cpp b/cpu/ppc/ppcfpopcodes.cpp index ea77bb8..d113982 100644 --- a/cpu/ppc/ppcfpopcodes.cpp +++ b/cpu/ppc/ppcfpopcodes.cpp @@ -186,7 +186,7 @@ void update_fex() { } template -constexpr auto ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chosen_reg_3) { +void ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chosen_reg_3) { T input_a = T(ppc_state.fpr[chosen_reg_1].int64_r); T input_b = T(ppc_state.fpr[chosen_reg_2].int64_r); T input_c = T(ppc_state.fpr[chosen_reg_3].int64_r); @@ -243,7 +243,7 @@ constexpr auto ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chose update_fex(); break; } -} +} void fpresult_update(double set_result, bool confirm_arc) { bool confirm_ov = (bool)std::fetestexcept(FE_OVERFLOW); @@ -279,9 +279,9 @@ void ppc_changecrf1() { // Floating Point Arithmetic void dppc_interpreter::ppc_fadd() { ppc_grab_regsfpdab(); - + ppc_dblresult64_d = val_reg_a + val_reg_b; - + if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); } else { @@ -377,7 +377,7 @@ void dppc_interpreter::ppc_fnmadd() { if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); - } + } else { ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } @@ -525,7 +525,7 @@ void dppc_interpreter::ppc_fnmsubs() { intermediate = -intermediate; ppc_dblresult64_d = static_cast(intermediate); - + if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); } else { @@ -639,7 +639,7 @@ void dppc_interpreter::ppc_fres() { } else if (std::isnan(start_num)) { ppc_state.fpscr |= FPSCR::VXSNAN; - } + } else if (std::isinf(start_num)){ ppc_state.fpscr |= FPSCR::VXSNAN; ppc_state.fpscr &= 0xFFF9FFFF; From fb277945c2f276a3b8c52c8be6af723fc230c690 Mon Sep 17 00:00:00 2001 From: dingusdev Date: Tue, 19 Oct 2021 07:16:15 -0700 Subject: [PATCH 11/11] Floating point test fixes --- cpu/ppc/ppcemu.h | 8 +- cpu/ppc/ppcfpopcodes.cpp | 67 +-- cpu/ppc/test/genppctests.py | 32 +- cpu/ppc/test/ppcfloattests.csv | 812 ++++++++++++++++----------------- cpu/ppc/test/ppctests.cpp | 21 +- 5 files changed, 474 insertions(+), 466 deletions(-) diff --git a/cpu/ppc/ppcemu.h b/cpu/ppc/ppcemu.h index b965b02..8bc4746 100644 --- a/cpu/ppc/ppcemu.h +++ b/cpu/ppc/ppcemu.h @@ -231,10 +231,10 @@ enum FPSCR : uint32_t { VXSQRT = 0x200, VXSOFT = 0x400, FPRF = 0x1F000, - FPCC_FUNAN = 0x10000, - FPCC_ZERO = 0x8000, - FPCC_POS = 0x4000, - FPCC_NEG = 0x2000, + FPCC_FUNAN = 0x10000, + FPCC_NEG = 0x8000, + FPCC_POS = 0x4000, + FPCC_ZERO = 0x2000, FPCC_FPRCD = 0x1000, FI = 0x20000, FR = 0x40000, diff --git a/cpu/ppc/ppcfpopcodes.cpp b/cpu/ppc/ppcfpopcodes.cpp index d113982..01e51e1 100644 --- a/cpu/ppc/ppcfpopcodes.cpp +++ b/cpu/ppc/ppcfpopcodes.cpp @@ -151,15 +151,6 @@ void ppc_fp_changecrf1() { ppc_state.fpscr |= 0xf0000000; } -void ppc_divbyzero(uint64_t input_a, uint64_t input_b, bool is_single) { - if (input_b == 0) { - ppc_state.fpscr |= 0x84000000; - if (input_a == 0) { - ppc_state.fpscr |= 0x200000; - } - } -} - int64_t round_to_nearest(double f) { if (f >= 0.0) { return static_cast(static_cast (ceil(f))); @@ -186,7 +177,7 @@ void update_fex() { } template -void ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chosen_reg_3) { +void ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chosen_reg_3, bool rc_flag = false) { T input_a = T(ppc_state.fpr[chosen_reg_1].int64_r); T input_b = T(ppc_state.fpr[chosen_reg_2].int64_r); T input_c = T(ppc_state.fpr[chosen_reg_3].int64_r); @@ -238,7 +229,7 @@ void ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chosen_reg_3) { case FPOP::FMADD: case FPOP::FNMADD: if (isnan(input_a) || isnan(input_b) || isnan(input_c)) { - ppc_state.fpscr |= FPSCR::VXSNAN; + ppc_state.fpscr |= (FPSCR::VXSNAN | FPSCR::FPCC_FUNAN); } update_fex(); break; @@ -248,26 +239,26 @@ void ppc_confirm_inf_nan(int chosen_reg_1, int chosen_reg_2, int chosen_reg_3) { void fpresult_update(double set_result, bool confirm_arc) { bool confirm_ov = (bool)std::fetestexcept(FE_OVERFLOW); + if (ppc_state.fpscr & 0x3) + ppc_state.cr |= 0x2; + + if (set_result > 0.0) { + ppc_state.fpscr |= FPSCR::FPCC_POS; + } else if (set_result < 0.0) { + ppc_state.fpscr |= FPSCR::FPCC_NEG; + } else if (set_result == 0.0) { + ppc_state.fpscr |= FPSCR::FPCC_ZERO; + } else { + ppc_state.fpscr |= FPSCR::FPCC_FPRCD; + } + if (confirm_ov) { ppc_state.fpscr |= (FPSCR::FX | (FPSCR::FPRF & FPSCR::FPCC_FUNAN)); } if (confirm_arc) { ppc_state.fpscr |= (FPSCR::FX | (FPSCR::FPRF & FPSCR::FPCC_FUNAN)); - ppc_state.fpscr &= 0xFFFF0FFF; - - - if (set_result == 0.0) { - ppc_state.fpscr |= FPSCR::FPCC_NEG; - } else { - if (set_result < 0.0) { - ppc_state.fpscr |= FPSCR::FPCC_ZERO; - } else if (set_result > 0.0) { - ppc_state.fpscr |= FPSCR::FPCC_POS; - } else { - ppc_state.fpscr |= FPSCR::FPCC_FPRCD; - } - } + //ppc_state.fpscr &= 0xFFFF0FFF; } } @@ -284,8 +275,9 @@ void dppc_interpreter::ppc_fadd() { if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { - ppc_confirm_inf_nan(reg_a, reg_b, 0); + ppc_confirm_inf_nan(reg_a, reg_b, 0, rc_flag); } if (rc_flag) @@ -299,8 +291,9 @@ void dppc_interpreter::ppc_fsub() { if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { - ppc_confirm_inf_nan(reg_a, reg_b, 0); + ppc_confirm_inf_nan(reg_a, reg_b, 0, rc_flag); } if (rc_flag) @@ -314,8 +307,9 @@ void dppc_interpreter::ppc_fdiv() { if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { - ppc_confirm_inf_nan(reg_a, reg_b, 0); + ppc_confirm_inf_nan(reg_a, reg_b, 0, rc_flag); } if (rc_flag) @@ -329,8 +323,9 @@ void dppc_interpreter::ppc_fmul() { if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { - ppc_confirm_inf_nan(reg_a, reg_b, 0); + ppc_confirm_inf_nan(reg_a, reg_b, 0, rc_flag); } if (rc_flag) @@ -344,6 +339,7 @@ void dppc_interpreter::ppc_fmadd() { if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } @@ -360,6 +356,7 @@ void dppc_interpreter::ppc_fmsub() { if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } @@ -373,10 +370,10 @@ void dppc_interpreter::ppc_fnmadd() { ppc_dblresult64_d = (val_reg_a * val_reg_c); ppc_dblresult64_d += val_reg_b; - ppc_dblresult64_d = -ppc_dblresult64_d; if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, reg_c); @@ -391,9 +388,11 @@ void dppc_interpreter::ppc_fnmsub() { ppc_dblresult64_d = (val_reg_a * val_reg_c); ppc_dblresult64_d -= val_reg_b; + ppc_dblresult64_d = -ppc_dblresult64_d; if (!isnan(ppc_dblresult64_d)) { ppc_store_dfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } @@ -410,6 +409,7 @@ void dppc_interpreter::ppc_fadds() { if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, 0); } @@ -426,6 +426,7 @@ void dppc_interpreter::ppc_fsubs() { if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, 0); } @@ -442,6 +443,7 @@ void dppc_interpreter::ppc_fdivs() { if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, 0); } @@ -458,6 +460,7 @@ void dppc_interpreter::ppc_fmuls() { if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, 0, reg_c); } @@ -474,6 +477,7 @@ void dppc_interpreter::ppc_fmadds() { if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } @@ -491,6 +495,7 @@ void dppc_interpreter::ppc_fmsubs() { if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } @@ -509,6 +514,7 @@ void dppc_interpreter::ppc_fnmadds() { if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } @@ -528,6 +534,7 @@ void dppc_interpreter::ppc_fnmsubs() { if (!isnan(ppc_dblresult64_d)) { ppc_store_sfpresult_flt(reg_d); + fpresult_update(ppc_dblresult64_d, rc_flag); } else { ppc_confirm_inf_nan(reg_a, reg_b, reg_c); } diff --git a/cpu/ppc/test/genppctests.py b/cpu/ppc/test/genppctests.py index e1e0076..112fed1 100644 --- a/cpu/ppc/test/genppctests.py +++ b/cpu/ppc/test/genppctests.py @@ -416,31 +416,31 @@ if __name__ == "__main__": while pos < len(line): if (line[pos].isalnum()): checkstring += line[pos] - + if ("RTN" in checkstring): - out_file.write(",round=RTN") - checkstring = '' + if (line[pos+1:pos+2] == "I"): + out_file.write(",round=RNI") + checkstring = '' + else: + out_file.write(",round=RTN") + checkstring = '' pos += 1 - if ("RTZ" in checkstring): + elif ("RTZ" in checkstring): out_file.write(",round=RTZ") checkstring = '' pos += 1 - if ("RTPI" in checkstring): + elif ("RTPI" in checkstring): out_file.write(",round=RPI") checkstring = '' pos += 1 - if ("RTNI" in checkstring): - out_file.write(",round=RNI") - checkstring = '' - pos += 1 - if ("VE" in checkstring): + elif ("VE" in checkstring): out_file.write(",round=VEN") checkstring = '' pos += 1 - if ("frD" in checkstring): + elif ("frD" in checkstring): out_file.write(",frD=0x" + line[pos+4:pos+20]) checkstring = '' - if ("frA" in checkstring): #sloppy temp code + elif ("frA" in checkstring): #sloppy temp code check2 = line[pos+1:pos+10] if ("-inf" in check2): out_file.write(",frA=-inf") @@ -463,7 +463,7 @@ if __name__ == "__main__": get_pos = line[pos+2:pos+15] out_file.write(",frA=" + get_pos.strip()) checkstring = '' - if ("frB" in checkstring): #sloppy temp code + elif ("frB" in checkstring): #sloppy temp code check2 = line[pos+1:pos+10] if ("-inf" in check2): out_file.write(",frB=-inf") @@ -486,7 +486,7 @@ if __name__ == "__main__": get_pos = line[pos+2:pos+15] out_file.write(",frB=" + get_pos.strip()) checkstring = '' - if ("frC" in checkstring): #sloppy temp code + elif ("frC" in checkstring): #sloppy temp code check2 = line[pos+1:pos+10] if ("-inf" in check2): out_file.write(",frC=-inf") @@ -509,10 +509,10 @@ if __name__ == "__main__": get_pos = line[pos+2:pos+15] out_file.write(",frC=" + get_pos.strip()) checkstring = '' - if ("FPSCR" in checkstring): + elif ("FPSCR" in checkstring): out_file.write(",FPSCR=" + line[pos+3:pos+13]) checkstring = '' - if ("CR" in checkstring): + elif ("CR" in checkstring): out_file.write(",CR=0x0" + line[pos+6:pos+14]) checkstring = '' pos += 1 diff --git a/cpu/ppc/test/ppcfloattests.csv b/cpu/ppc/test/ppcfloattests.csv index ecb8596..780c0a1 100644 --- a/cpu/ppc/test/ppcfloattests.csv +++ b/cpu/ppc/test/ppcfloattests.csv @@ -1,2030 +1,2030 @@ FADD,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002000,CR=0x00000000 FADD,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002003,CR=0x00000002 FADD,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002080,CR=0x00000000 FADD,0xFC63202A,round=RTN,frD=0x3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004000,CR=0x00000000 FADD,0xFC63202A,round=RTZ,frD=0x3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0x3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0x3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0x3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004003,CR=0x00000002 FADD,0xFC63202A,round=VEN,frD=0x3FF0000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00004080,CR=0x00000000 FADD,0xFC63202A,round=RTN,frD=0x4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004000,CR=0x00000000 FADD,0xFC63202A,round=RTZ,frD=0x4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0x4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0x4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0x4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004003,CR=0x00000002 FADD,0xFC63202A,round=VEN,frD=0x4000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004080,CR=0x00000000 FADD,0xFC63202A,round=RTN,frD=0x401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004000,CR=0x00000000 FADD,0xFC63202A,round=RTZ,frD=0x401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0x401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0x401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0x401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004003,CR=0x00000002 FADD,0xFC63202A,round=VEN,frD=0x401C000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00004080,CR=0x00000000 FADD,0xFC63202A,round=RTN,frD=0x36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004000,CR=0x00000000 FADD,0xFC63202A,round=RTZ,frD=0x36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0x36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0x36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0x36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004003,CR=0x00000002 FADD,0xFC63202A,round=VEN,frD=0x36FC000202CF42BF,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00004080,CR=0x00000000 FADD,0xFC63202A,round=RTN,frD=0x7FF0000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92025000,CR=0x00000000 FADD,0xFC63202A,round=RTZ,frD=0x7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92024001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0x7FF0000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92025002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0x7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92024003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0x7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92024003,CR=0x00000002 FADD,0xFC63202A,round=VEN,frD=0x7FF0000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x92025080,CR=0x00000000 FADD,0xFC63202A,round=RTN,frD=0xFFF0000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x92029000,CR=0x00000000 FADD,0xFC63202A,round=RTZ,frD=0xFFEFFFFFFFFFFFFF,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x92028001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0xFFEFFFFFFFFFFFFF,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x92028002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0xFFF0000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x92029003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0xFFF0000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x92029003,CR=0x00000002 FADD,0xFC63202A,round=VEN,frD=0xFFF0000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x92029080,CR=0x00000000 FADD,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002000,CR=0x00000000 FADD,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0x8000000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x00012003,CR=0x00000002 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FADD,0xFC63202A,round=RTZ,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011003,CR=0x00000002 FADD,0xFC63202A,round=VEN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011080,CR=0x00000000 FADD,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011000,CR=0x00000000 FADD,0xFC63202A,round=RTZ,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011003,CR=0x00000002 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-FADD,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011003,CR=0x00000002 FADD,0xFC63202A,round=VEN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011080,CR=0x00000000 FADD,0xFC63202A,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=inf,FPSCR=0x00005000,CR=0x00000000 FADD,0xFC63202A,round=RTZ,frD=0x7FF0000000000000,frA=inf,frB=inf,FPSCR=0x00005001,CR=0x00000002 FADD,0xFC63202A,round=RPI,frD=0x7FF0000000000000,frA=inf,frB=inf,FPSCR=0x00005002,CR=0x00000002 -FADD,0xFC63202A,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=inf,FPSCR=0x00005003,CR=0x00000002 +FADD,0xFC63202A,round=RNI,frD=0x7FF0000000000000,frA=inf,frB=inf,FPSCR=0x00005003,CR=0x00000002 FADD,0xFC63202A,round=VEN,frD=0x7FF0000000000000,frA=inf,frB=inf,FPSCR=0x00005080,CR=0x00000000 FADD,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=-inf,FPSCR=0xA0811000,CR=0x00000000 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FMADD,0xFC63217A,round=RTZ,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009001,CR=0x00000002 FMADD,0xFC63217A,round=RPI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009002,CR=0x00000002 -FMADD,0xFC63217A,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009003,CR=0x00000002 +FMADD,0xFC63217A,round=RNI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009003,CR=0x00000002 FMADD,0xFC63217A,round=VEN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009080,CR=0x00000000 FMADD.,0xFC63217B,round=RTN,frD=0x4000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004000,CR=0x00000000 FMADD.,0xFC63217B,round=RTZ,frD=0x4000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004001,CR=0x00000002 FMADD.,0xFC63217B,round=RPI,frD=0x4000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004002,CR=0x00000002 -FMADD.,0xFC63217B,round=RTN,frD=0x4000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004003,CR=0x00000002 +FMADD.,0xFC63217B,round=RNI,frD=0x4000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004003,CR=0x00000002 FMADD.,0xFC63217B,round=VEN,frD=0x4000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00004080,CR=0x00000000 FMADD.,0xFC63217B,round=RTN,frD=0x4041E00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00004000,CR=0x00000000 FMADD.,0xFC63217B,round=RTZ,frD=0x4041E00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00004001,CR=0x00000002 FMADD.,0xFC63217B,round=RPI,frD=0x4041E00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00004002,CR=0x00000002 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FMADD.,0xFC63217B,round=VEN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82024080,CR=0x08000000 FMADD.,0xFC63217B,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011000,CR=0x00000000 FMADD.,0xFC63217B,round=RTZ,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011001,CR=0x00000002 FMADD.,0xFC63217B,round=RPI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011002,CR=0x00000002 -FMADD.,0xFC63217B,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 +FMADD.,0xFC63217B,round=RNI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 FMADD.,0xFC63217B,round=VEN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011080,CR=0x00000000 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FMSUB,0xFC632178,round=VEN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00005080,CR=0x00000000 FMSUB.,0xFC632179,round=RTN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002000,CR=0x00000000 FMSUB.,0xFC632179,round=RTZ,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002001,CR=0x00000002 FMSUB.,0xFC632179,round=RPI,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002002,CR=0x00000002 -FMSUB.,0xFC632179,round=RTN,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012003,CR=0x00000002 +FMSUB.,0xFC632179,round=RNI,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012003,CR=0x00000002 FMSUB.,0xFC632179,round=VEN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002080,CR=0x00000000 FMSUB.,0xFC632179,round=RTN,frD=0x4038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00004000,CR=0x00000000 FMSUB.,0xFC632179,round=RTZ,frD=0x4038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00004001,CR=0x00000002 FMSUB.,0xFC632179,round=RPI,frD=0x4038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00004002,CR=0x00000002 -FMSUB.,0xFC632179,round=RTN,frD=0x4038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00004003,CR=0x00000002 +FMSUB.,0xFC632179,round=RNI,frD=0x4038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00004003,CR=0x00000002 FMSUB.,0xFC632179,round=VEN,frD=0x4038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00004080,CR=0x00000000 FMSUB.,0xFC632179,round=RTN,frD=0x404B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82064000,CR=0x08000000 FMSUB.,0xFC632179,round=RTZ,frD=0x404B8B1807E88E7B,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82024001,CR=0x08000002 FMSUB.,0xFC632179,round=RPI,frD=0x404B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82064002,CR=0x08000002 -FMSUB.,0xFC632179,round=RTN,frD=0x404B8B1807E88E7B,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82024003,CR=0x08000002 +FMSUB.,0xFC632179,round=RNI,frD=0x404B8B1807E88E7B,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82024003,CR=0x08000002 FMSUB.,0xFC632179,round=VEN,frD=0x404B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82064080,CR=0x08000000 FMSUB.,0xFC632179,round=RTN,frD=0xB6D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82068000,CR=0x08000000 FMSUB.,0xFC632179,round=RTZ,frD=0xB6D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82028001,CR=0x08000002 FMSUB.,0xFC632179,round=RPI,frD=0xB6D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82028002,CR=0x08000002 -FMSUB.,0xFC632179,round=RTN,frD=0xB6D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82068003,CR=0x08000002 +FMSUB.,0xFC632179,round=RNI,frD=0xB6D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82068003,CR=0x08000002 FMSUB.,0xFC632179,round=VEN,frD=0xB6D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82068080,CR=0x08000000 FMSUB.,0xFC632179,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011000,CR=0x00000000 FMSUB.,0xFC632179,round=RTZ,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011001,CR=0x00000002 FMSUB.,0xFC632179,round=RPI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011002,CR=0x00000002 -FMSUB.,0xFC632179,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 +FMSUB.,0xFC632179,round=RNI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 FMSUB.,0xFC632179,round=VEN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011080,CR=0x00000000 FMSUB.,0xFC632179,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011000,CR=0x0A000000 FMSUB.,0xFC632179,round=RTZ,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011001,CR=0x0A000002 FMSUB.,0xFC632179,round=RPI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011002,CR=0x0A000002 -FMSUB.,0xFC632179,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x0A000002 +FMSUB.,0xFC632179,round=RNI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x0A000002 FMSUB.,0xFC632179,round=VEN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xE1000080,CR=0x0E000000 FMSUB.,0xFC632179,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00009000,CR=0x00000000 FMSUB.,0xFC632179,round=RTZ,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00009001,CR=0x00000002 FMSUB.,0xFC632179,round=RPI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00009002,CR=0x00000002 -FMSUB.,0xFC632179,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00009003,CR=0x00000002 +FMSUB.,0xFC632179,round=RNI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00009003,CR=0x00000002 FMSUB.,0xFC632179,round=VEN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00009080,CR=0x00000000 FMSUB.,0xFC632179,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00005000,CR=0x00000000 FMSUB.,0xFC632179,round=RTZ,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00005001,CR=0x00000002 FMSUB.,0xFC632179,round=RPI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00005002,CR=0x00000002 -FMSUB.,0xFC632179,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00005003,CR=0x00000002 +FMSUB.,0xFC632179,round=RNI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00005003,CR=0x00000002 FMSUB.,0xFC632179,round=VEN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00005080,CR=0x00000000 FMSUBS,0xFC632178,round=RTN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002000,CR=0x00000000 FMSUBS,0xFC632178,round=RTZ,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002001,CR=0x00000002 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+FNMSUB,0xFC632178,round=RNI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 FNMSUB,0xFC632178,round=VEN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011080,CR=0x00000000 FNMSUB,0xFC632178,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011000,CR=0x00000000 FNMSUB,0xFC632178,round=RTZ,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011001,CR=0x00000002 FNMSUB,0xFC632178,round=RPI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011002,CR=0x00000002 -FNMSUB,0xFC632178,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x00000002 +FNMSUB,0xFC632178,round=RNI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x00000002 FNMSUB,0xFC632178,round=VEN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xE1000080,CR=0x00000000 FNMSUB,0xFC632178,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005000,CR=0x00000000 FNMSUB,0xFC632178,round=RTZ,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005001,CR=0x00000002 FNMSUB,0xFC632178,round=RPI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005002,CR=0x00000002 -FNMSUB,0xFC632178,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005003,CR=0x00000002 +FNMSUB,0xFC632178,round=RNI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005003,CR=0x00000002 FNMSUB,0xFC632178,round=VEN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005080,CR=0x00000000 FNMSUB,0xFC632178,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009000,CR=0x00000000 FNMSUB,0xFC632178,round=RTZ,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009001,CR=0x00000002 FNMSUB,0xFC632178,round=RPI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009002,CR=0x00000002 -FNMSUB,0xFC632178,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009003,CR=0x00000002 +FNMSUB,0xFC632178,round=RNI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009003,CR=0x00000002 FNMSUB,0xFC632178,round=VEN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009080,CR=0x00000000 FNMSUB.,0xFC632179,round=RTN,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012000,CR=0x00000000 FNMSUB.,0xFC632179,round=RTZ,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012001,CR=0x00000002 FNMSUB.,0xFC632179,round=RPI,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012002,CR=0x00000002 -FNMSUB.,0xFC632179,round=RTN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002003,CR=0x00000002 +FNMSUB.,0xFC632179,round=RNI,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002003,CR=0x00000002 FNMSUB.,0xFC632179,round=VEN,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012080,CR=0x00000000 FNMSUB.,0xFC632179,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008000,CR=0x00000000 FNMSUB.,0xFC632179,round=RTZ,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008001,CR=0x00000002 FNMSUB.,0xFC632179,round=RPI,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008002,CR=0x00000002 -FNMSUB.,0xFC632179,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008003,CR=0x00000002 +FNMSUB.,0xFC632179,round=RNI,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008003,CR=0x00000002 FNMSUB.,0xFC632179,round=VEN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008080,CR=0x00000000 FNMSUB.,0xFC632179,round=RTN,frD=0xC04B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068000,CR=0x08000000 FNMSUB.,0xFC632179,round=RTZ,frD=0xC04B8B1807E88E7B,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028001,CR=0x08000002 FNMSUB.,0xFC632179,round=RPI,frD=0xC04B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068002,CR=0x08000002 -FNMSUB.,0xFC632179,round=RTN,frD=0xC04B8B1807E88E7B,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028003,CR=0x08000002 +FNMSUB.,0xFC632179,round=RNI,frD=0xC04B8B1807E88E7B,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028003,CR=0x08000002 FNMSUB.,0xFC632179,round=VEN,frD=0xC04B8B1807E88E7C,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068080,CR=0x08000000 FNMSUB.,0xFC632179,round=RTN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064000,CR=0x08000000 FNMSUB.,0xFC632179,round=RTZ,frD=0x36D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82024001,CR=0x08000002 FNMSUB.,0xFC632179,round=RPI,frD=0x36D60001947E46B9,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82024002,CR=0x08000002 -FNMSUB.,0xFC632179,round=RTN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064003,CR=0x08000002 +FNMSUB.,0xFC632179,round=RNI,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064003,CR=0x08000002 FNMSUB.,0xFC632179,round=VEN,frD=0x36D60001947E46BA,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x82064080,CR=0x08000000 FNMSUB.,0xFC632179,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011000,CR=0x00000000 FNMSUB.,0xFC632179,round=RTZ,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011001,CR=0x00000002 FNMSUB.,0xFC632179,round=RPI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011002,CR=0x00000002 -FNMSUB.,0xFC632179,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 +FNMSUB.,0xFC632179,round=RNI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 FNMSUB.,0xFC632179,round=VEN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011080,CR=0x00000000 FNMSUB.,0xFC632179,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011000,CR=0x0A000000 FNMSUB.,0xFC632179,round=RTZ,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011001,CR=0x0A000002 FNMSUB.,0xFC632179,round=RPI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011002,CR=0x0A000002 -FNMSUB.,0xFC632179,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x0A000002 +FNMSUB.,0xFC632179,round=RNI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x0A000002 FNMSUB.,0xFC632179,round=VEN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xE1000080,CR=0x0E000000 FNMSUB.,0xFC632179,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005000,CR=0x00000000 FNMSUB.,0xFC632179,round=RTZ,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005001,CR=0x00000002 FNMSUB.,0xFC632179,round=RPI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005002,CR=0x00000002 -FNMSUB.,0xFC632179,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005003,CR=0x00000002 +FNMSUB.,0xFC632179,round=RNI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005003,CR=0x00000002 FNMSUB.,0xFC632179,round=VEN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005080,CR=0x00000000 FNMSUB.,0xFC632179,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009000,CR=0x00000000 FNMSUB.,0xFC632179,round=RTZ,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009001,CR=0x00000002 FNMSUB.,0xFC632179,round=RPI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009002,CR=0x00000002 -FNMSUB.,0xFC632179,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009003,CR=0x00000002 +FNMSUB.,0xFC632179,round=RNI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009003,CR=0x00000002 FNMSUB.,0xFC632179,round=VEN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009080,CR=0x00000000 FNMSUBS,0xFC632178,round=RTN,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012000,CR=0x00000000 FNMSUBS,0xFC632178,round=RTZ,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012001,CR=0x00000002 FNMSUBS,0xFC632178,round=RPI,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012002,CR=0x00000002 -FNMSUBS,0xFC632178,round=RTN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002003,CR=0x00000002 +FNMSUBS,0xFC632178,round=RNI,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002003,CR=0x00000002 FNMSUBS,0xFC632178,round=VEN,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012080,CR=0x00000000 FNMSUBS,0xFC632178,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008000,CR=0x00000000 FNMSUBS,0xFC632178,round=RTZ,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008001,CR=0x00000002 FNMSUBS,0xFC632178,round=RPI,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008002,CR=0x00000002 -FNMSUBS,0xFC632178,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008003,CR=0x00000002 +FNMSUBS,0xFC632178,round=RNI,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008003,CR=0x00000002 FNMSUBS,0xFC632178,round=VEN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008080,CR=0x00000000 FNMSUBS,0xFC632178,round=RTN,frD=0xC04B8B1800000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028000,CR=0x00000000 FNMSUBS,0xFC632178,round=RTZ,frD=0xC04B8B1800000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028001,CR=0x00000002 FNMSUBS,0xFC632178,round=RPI,frD=0xC04B8B1820000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068002,CR=0x00000002 -FNMSUBS,0xFC632178,round=RTN,frD=0xC04B8B1800000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028003,CR=0x00000002 +FNMSUBS,0xFC632178,round=RNI,frD=0xC04B8B1800000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028003,CR=0x00000002 FNMSUBS,0xFC632178,round=VEN,frD=0xC04B8B1800000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028080,CR=0x00000000 FNMSUBS,0xFC632178,round=RTN,frD=0x36D6000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A034000,CR=0x00000000 FNMSUBS,0xFC632178,round=RTZ,frD=0x36D6000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A034001,CR=0x00000002 FNMSUBS,0xFC632178,round=RPI,frD=0x36D6000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A034002,CR=0x00000002 -FNMSUBS,0xFC632178,round=RTN,frD=0x36D8000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A074003,CR=0x00000002 +FNMSUBS,0xFC632178,round=RNI,frD=0x36D8000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A074003,CR=0x00000002 FNMSUBS,0xFC632178,round=VEN,frD=0x36D6000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A034080,CR=0x00000000 FNMSUBS,0xFC632178,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011000,CR=0x00000000 FNMSUBS,0xFC632178,round=RTZ,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011001,CR=0x00000002 FNMSUBS,0xFC632178,round=RPI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011002,CR=0x00000002 -FNMSUBS,0xFC632178,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 +FNMSUBS,0xFC632178,round=RNI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 FNMSUBS,0xFC632178,round=VEN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011080,CR=0x00000000 FNMSUBS,0xFC632178,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011000,CR=0x00000000 FNMSUBS,0xFC632178,round=RTZ,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011001,CR=0x00000002 FNMSUBS,0xFC632178,round=RPI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011002,CR=0x00000002 -FNMSUBS,0xFC632178,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x00000002 +FNMSUBS,0xFC632178,round=RNI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x00000002 FNMSUBS,0xFC632178,round=VEN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xE1000080,CR=0x00000000 FNMSUBS,0xFC632178,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005000,CR=0x00000000 FNMSUBS,0xFC632178,round=RTZ,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005001,CR=0x00000002 FNMSUBS,0xFC632178,round=RPI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005002,CR=0x00000002 -FNMSUBS,0xFC632178,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005003,CR=0x00000002 +FNMSUBS,0xFC632178,round=RNI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005003,CR=0x00000002 FNMSUBS,0xFC632178,round=VEN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005080,CR=0x00000000 FNMSUBS,0xFC632178,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009000,CR=0x00000000 FNMSUBS,0xFC632178,round=RTZ,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009001,CR=0x00000002 FNMSUBS,0xFC632178,round=RPI,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009002,CR=0x00000002 -FNMSUBS,0xFC632178,round=RTN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009003,CR=0x00000002 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FNMSUBS.,0xFC632179,round=VEN,frD=0x8000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012080,CR=0x00000000 FNMSUBS.,0xFC632179,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008000,CR=0x00000000 FNMSUBS.,0xFC632179,round=RTZ,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008001,CR=0x00000002 FNMSUBS.,0xFC632179,round=RPI,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008002,CR=0x00000002 -FNMSUBS.,0xFC632179,round=RTN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008003,CR=0x00000002 +FNMSUBS.,0xFC632179,round=RNI,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008003,CR=0x00000002 FNMSUBS.,0xFC632179,round=VEN,frD=0xC038C00000000000,frA=5.500000e+00,frC=5.500000e+00,frB=5.500000e+00,FPSCR=0x00008080,CR=0x00000000 FNMSUBS.,0xFC632179,round=RTN,frD=0xC04B8B1800000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028000,CR=0x08000000 FNMSUBS.,0xFC632179,round=RTZ,frD=0xC04B8B1800000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028001,CR=0x08000002 FNMSUBS.,0xFC632179,round=RPI,frD=0xC04B8B1820000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82068002,CR=0x08000002 -FNMSUBS.,0xFC632179,round=RTN,frD=0xC04B8B1800000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028003,CR=0x08000002 +FNMSUBS.,0xFC632179,round=RNI,frD=0xC04B8B1800000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028003,CR=0x08000002 FNMSUBS.,0xFC632179,round=VEN,frD=0xC04B8B1800000000,frA=7.323334e+00,frC=8.000000e+00,frB=3.500000e+00,FPSCR=0x82028080,CR=0x08000000 FNMSUBS.,0xFC632179,round=RTN,frD=0x36D6000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A034000,CR=0x08000000 FNMSUBS.,0xFC632179,round=RTZ,frD=0x36D6000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A034001,CR=0x08000002 FNMSUBS.,0xFC632179,round=RPI,frD=0x36D6000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A034002,CR=0x08000002 -FNMSUBS.,0xFC632179,round=RTN,frD=0x36D8000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A074003,CR=0x08000002 +FNMSUBS.,0xFC632179,round=RNI,frD=0x36D8000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A074003,CR=0x08000002 FNMSUBS.,0xFC632179,round=VEN,frD=0x36D6000000000000,frA=6.305840e-44,frC=3.082860e-44,frB=1.541430e-44,FPSCR=0x8A034080,CR=0x08000000 FNMSUBS.,0xFC632179,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011000,CR=0x00000000 FNMSUBS.,0xFC632179,round=RTZ,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011001,CR=0x00000002 FNMSUBS.,0xFC632179,round=RPI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011002,CR=0x00000002 -FNMSUBS.,0xFC632179,round=RTN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 +FNMSUBS.,0xFC632179,round=RNI,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011003,CR=0x00000002 FNMSUBS.,0xFC632179,round=VEN,frD=0x7FF8000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0x00011080,CR=0x00000000 FNMSUBS.,0xFC632179,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011000,CR=0x0A000000 FNMSUBS.,0xFC632179,round=RTZ,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011001,CR=0x0A000002 FNMSUBS.,0xFC632179,round=RPI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011002,CR=0x0A000002 -FNMSUBS.,0xFC632179,round=RTN,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x0A000002 +FNMSUBS.,0xFC632179,round=RNI,frD=0x7FFC000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xA1011003,CR=0x0A000002 FNMSUBS.,0xFC632179,round=VEN,frD=0x0000000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=nan,FPSCR=0xE1000080,CR=0x0E000000 FNMSUBS.,0xFC632179,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005000,CR=0x00000000 FNMSUBS.,0xFC632179,round=RTZ,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005001,CR=0x00000002 FNMSUBS.,0xFC632179,round=RPI,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005002,CR=0x00000002 -FNMSUBS.,0xFC632179,round=RTN,frD=0x7FF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=inf,FPSCR=0x00005003,CR=0x00000002 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FNMSUBS.,0xFC632179,round=VEN,frD=0xFFF0000000000000,frA=1.000000e+00,frC=1.000000e+00,frB=-inf,FPSCR=0x00009080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x8000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00012003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x8000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00012003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00002000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00002001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00002002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x8000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00012003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x8000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00012003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00002080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x8000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x8000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00002000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00002001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00002002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x8000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00012003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x8000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00012003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00002080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00002000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00002001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00002002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x8000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00012003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x8000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00012003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00002080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x8000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00012003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x8000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00012003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x8000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00012003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x8000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00012003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x7FF0000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92025000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92024001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x7FF0000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92025002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92024003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92024003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x7FF0000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92025080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x7FFC000000000000,frA=nan,frB=inf,FPSCR=0xA1011000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x7FFC000000000000,frA=nan,frB=inf,FPSCR=0xA1011001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x7FFC000000000000,frA=nan,frB=inf,FPSCR=0xA1011002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x7FFC000000000000,frA=nan,frB=inf,FPSCR=0xA1011003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x7FFC000000000000,frA=nan,frB=inf,FPSCR=0xA1011003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=nan,frB=inf,FPSCR=0xE1000080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x7FF8000000000000,frA=inf,frB=nan,FPSCR=0x00011080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=inf,frB=inf,FPSCR=0xE0800080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009080,CR=0x00000000 FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811000,CR=0x00000000 FSUB,0xFC63202A,round=RTZ,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811001,CR=0x00000002 FSUB,0xFC63202A,round=RPI,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811002,CR=0x00000002 -FSUB,0xFC63202A,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811003,CR=0x00000002 +FSUB,0xFC63202A,round=RNI,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811003,CR=0x00000002 FSUB,0xFC63202A,round=VEN,frD=0x0000000000000000,frA=-inf,frB=-inf,FPSCR=0xE0800080,CR=0x00000000 FSUB.,0xFC63202B,round=RTN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002000,CR=0x00000000 FSUB.,0xFC63202B,round=RTZ,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002001,CR=0x00000002 FSUB.,0xFC63202B,round=RPI,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002002,CR=0x00000002 -FSUB.,0xFC63202B,round=RTN,frD=0x8000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00012003,CR=0x00000002 +FSUB.,0xFC63202B,round=RNI,frD=0x8000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00012003,CR=0x00000002 FSUB.,0xFC63202B,round=VEN,frD=0x0000000000000000,frA=0.000000e+00,frB=0.000000e+00,FPSCR=0x00002080,CR=0x00000000 FSUB.,0xFC63202B,round=RTN,frD=0x0000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00002000,CR=0x00000000 FSUB.,0xFC63202B,round=RTZ,frD=0x0000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00002001,CR=0x00000002 FSUB.,0xFC63202B,round=RPI,frD=0x0000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00002002,CR=0x00000002 -FSUB.,0xFC63202B,round=RTN,frD=0x8000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00012003,CR=0x00000002 +FSUB.,0xFC63202B,round=RNI,frD=0x8000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00012003,CR=0x00000002 FSUB.,0xFC63202B,round=VEN,frD=0x0000000000000000,frA=5.000000e-01,frB=5.000000e-01,FPSCR=0x00002080,CR=0x00000000 FSUB.,0xFC63202B,round=RTN,frD=0x0000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002000,CR=0x00000000 FSUB.,0xFC63202B,round=RTZ,frD=0x0000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002001,CR=0x00000002 FSUB.,0xFC63202B,round=RPI,frD=0x0000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002002,CR=0x00000002 -FSUB.,0xFC63202B,round=RTN,frD=0x8000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012003,CR=0x00000002 +FSUB.,0xFC63202B,round=RNI,frD=0x8000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00012003,CR=0x00000002 FSUB.,0xFC63202B,round=VEN,frD=0x0000000000000000,frA=1.000000e+00,frB=1.000000e+00,FPSCR=0x00002080,CR=0x00000000 FSUB.,0xFC63202B,round=RTN,frD=0x0000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00002000,CR=0x00000000 FSUB.,0xFC63202B,round=RTZ,frD=0x0000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00002001,CR=0x00000002 FSUB.,0xFC63202B,round=RPI,frD=0x0000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00002002,CR=0x00000002 -FSUB.,0xFC63202B,round=RTN,frD=0x8000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00012003,CR=0x00000002 +FSUB.,0xFC63202B,round=RNI,frD=0x8000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00012003,CR=0x00000002 FSUB.,0xFC63202B,round=VEN,frD=0x0000000000000000,frA=3.500000e+00,frB=3.500000e+00,FPSCR=0x00002080,CR=0x00000000 FSUB.,0xFC63202B,round=RTN,frD=0x0000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00002000,CR=0x00000000 FSUB.,0xFC63202B,round=RTZ,frD=0x0000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00002001,CR=0x00000002 FSUB.,0xFC63202B,round=RPI,frD=0x0000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00002002,CR=0x00000002 -FSUB.,0xFC63202B,round=RTN,frD=0x8000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00012003,CR=0x00000002 +FSUB.,0xFC63202B,round=RNI,frD=0x8000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00012003,CR=0x00000002 FSUB.,0xFC63202B,round=VEN,frD=0x0000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00002080,CR=0x00000000 FSUB.,0xFC63202B,round=RTN,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002000,CR=0x00000000 FSUB.,0xFC63202B,round=RTZ,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002001,CR=0x00000002 FSUB.,0xFC63202B,round=RPI,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002002,CR=0x00000002 -FSUB.,0xFC63202B,round=RTN,frD=0x8000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00012003,CR=0x00000002 +FSUB.,0xFC63202B,round=RNI,frD=0x8000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00012003,CR=0x00000002 FSUB.,0xFC63202B,round=VEN,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002080,CR=0x00000000 FSUB.,0xFC63202B,round=RTN,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002000,CR=0x00000000 FSUB.,0xFC63202B,round=RTZ,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002001,CR=0x00000002 FSUB.,0xFC63202B,round=RPI,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002002,CR=0x00000002 -FSUB.,0xFC63202B,round=RTN,frD=0x8000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00012003,CR=0x00000002 +FSUB.,0xFC63202B,round=RNI,frD=0x8000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00012003,CR=0x00000002 FSUB.,0xFC63202B,round=VEN,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002080,CR=0x00000000 FSUB.,0xFC63202B,round=RTN,frD=0x7FF0000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92025000,CR=0x09000000 FSUB.,0xFC63202B,round=RTZ,frD=0x7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92024001,CR=0x09000002 FSUB.,0xFC63202B,round=RPI,frD=0x7FF0000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92025002,CR=0x09000002 -FSUB.,0xFC63202B,round=RTN,frD=0x7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92024003,CR=0x09000002 +FSUB.,0xFC63202B,round=RNI,frD=0x7FEFFFFFFFFFFFFF,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92024003,CR=0x09000002 FSUB.,0xFC63202B,round=VEN,frD=0x7FF0000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92025080,CR=0x09000000 FSUB.,0xFC63202B,round=RTN,frD=0x7FFC000000000000,frA=nan,frB=inf,FPSCR=0xA1011000,CR=0x0A000000 FSUB.,0xFC63202B,round=RTZ,frD=0x7FFC000000000000,frA=nan,frB=inf,FPSCR=0xA1011001,CR=0x0A000002 FSUB.,0xFC63202B,round=RPI,frD=0x7FFC000000000000,frA=nan,frB=inf,FPSCR=0xA1011002,CR=0x0A000002 -FSUB.,0xFC63202B,round=RTN,frD=0x7FFC000000000000,frA=nan,frB=inf,FPSCR=0xA1011003,CR=0x0A000002 +FSUB.,0xFC63202B,round=RNI,frD=0x7FFC000000000000,frA=nan,frB=inf,FPSCR=0xA1011003,CR=0x0A000002 FSUB.,0xFC63202B,round=VEN,frD=0x0000000000000000,frA=nan,frB=inf,FPSCR=0xE1000080,CR=0x0E000000 FSUB.,0xFC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011000,CR=0x00000000 FSUB.,0xFC63202B,round=RTZ,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011001,CR=0x00000002 FSUB.,0xFC63202B,round=RPI,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011002,CR=0x00000002 -FSUB.,0xFC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011003,CR=0x00000002 +FSUB.,0xFC63202B,round=RNI,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011003,CR=0x00000002 FSUB.,0xFC63202B,round=VEN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011080,CR=0x00000000 FSUB.,0xFC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011000,CR=0x00000000 FSUB.,0xFC63202B,round=RTZ,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011001,CR=0x00000002 FSUB.,0xFC63202B,round=RPI,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011002,CR=0x00000002 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FSUBS.,0xEC63202B,round=VEN,frD=0x0000000000000000,frA=3.923640e-44,frB=3.923640e-44,FPSCR=0x00002080,CR=0x00000000 FSUBS.,0xEC63202B,round=RTN,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002000,CR=0x00000000 FSUBS.,0xEC63202B,round=RTZ,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002001,CR=0x00000002 FSUBS.,0xEC63202B,round=RPI,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002002,CR=0x00000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x8000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00012003,CR=0x00000002 +FSUBS.,0xEC63202B,round=RNI,frD=0x8000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00012003,CR=0x00000002 FSUBS.,0xEC63202B,round=VEN,frD=0x0000000000000000,frA=1.797693e+308,frB=1.797693e+308,FPSCR=0x00002080,CR=0x00000000 FSUBS.,0xEC63202B,round=RTN,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002000,CR=0x00000000 FSUBS.,0xEC63202B,round=RTZ,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002001,CR=0x00000002 FSUBS.,0xEC63202B,round=RPI,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002002,CR=0x00000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x8000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00012003,CR=0x00000002 +FSUBS.,0xEC63202B,round=RNI,frD=0x8000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00012003,CR=0x00000002 FSUBS.,0xEC63202B,round=VEN,frD=0x0000000000000000,frA=-1.797693e+308,frB=-1.797693e+308,FPSCR=0x00002080,CR=0x00000000 FSUBS.,0xEC63202B,round=RTN,frD=0x7FF0000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92065000,CR=0x09000000 FSUBS.,0xEC63202B,round=RTZ,frD=0x47EFFFFFE0000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92024001,CR=0x09000002 FSUBS.,0xEC63202B,round=RPI,frD=0x7FF0000000000000,frA=1.797693e+308,frB=-1.797693e+308,FPSCR=0x92065002,CR=0x09000002 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FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011000,CR=0x00000000 FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011001,CR=0x00000002 FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011002,CR=0x00000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011003,CR=0x00000002 +FSUBS.,0xEC63202B,round=RNI,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011003,CR=0x00000002 FSUBS.,0xEC63202B,round=VEN,frD=0x7FF8000000000000,frA=nan,frB=inf,FPSCR=0x00011080,CR=0x00000000 FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011000,CR=0x00000000 FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011001,CR=0x00000002 FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011002,CR=0x00000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=nan,frB=-inf,FPSCR=0x00011003,CR=0x00000002 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FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011002,CR=0x00000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011003,CR=0x00000002 +FSUBS.,0xEC63202B,round=RNI,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011003,CR=0x00000002 FSUBS.,0xEC63202B,round=VEN,frD=0x7FF8000000000000,frA=-inf,frB=nan,FPSCR=0x00011080,CR=0x00000000 FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811000,CR=0x0A000000 FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811001,CR=0x0A000002 FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811002,CR=0x0A000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811003,CR=0x0A000002 +FSUBS.,0xEC63202B,round=RNI,frD=0x7FF8000000000000,frA=inf,frB=inf,FPSCR=0xA0811003,CR=0x0A000002 FSUBS.,0xEC63202B,round=VEN,frD=0x0000000000000000,frA=inf,frB=inf,FPSCR=0xE0800080,CR=0x0E000000 FSUBS.,0xEC63202B,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005000,CR=0x00000000 FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005001,CR=0x00000002 FSUBS.,0xEC63202B,round=RPI,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005002,CR=0x00000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005003,CR=0x00000002 +FSUBS.,0xEC63202B,round=RNI,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005003,CR=0x00000002 FSUBS.,0xEC63202B,round=VEN,frD=0x7FF0000000000000,frA=inf,frB=-inf,FPSCR=0x00005080,CR=0x00000000 FSUBS.,0xEC63202B,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009000,CR=0x00000000 FSUBS.,0xEC63202B,round=RTZ,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009001,CR=0x00000002 FSUBS.,0xEC63202B,round=RPI,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009002,CR=0x00000002 -FSUBS.,0xEC63202B,round=RTN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009003,CR=0x00000002 +FSUBS.,0xEC63202B,round=RNI,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009003,CR=0x00000002 FSUBS.,0xEC63202B,round=VEN,frD=0xFFF0000000000000,frA=-inf,frB=inf,FPSCR=0x00009080,CR=0x00000000 FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811000,CR=0x0A000000 FSUBS.,0xEC63202B,round=RTZ,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811001,CR=0x0A000002 FSUBS.,0xEC63202B,round=RPI,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811002,CR=0x0A000002 -FSUBS.,0xEC63202B,round=RTN,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811003,CR=0x0A000002 +FSUBS.,0xEC63202B,round=RNI,frD=0x7FF8000000000000,frA=-inf,frB=-inf,FPSCR=0xA0811003,CR=0x0A000002 FSUBS.,0xEC63202B,round=VEN,frD=0x0000000000000000,frA=-inf,frB=-inf,FPSCR=0xE0800080,CR=0x0E000000 diff --git a/cpu/ppc/test/ppctests.cpp b/cpu/ppc/test/ppctests.cpp index 8f99562..ae90453 100644 --- a/cpu/ppc/test/ppctests.cpp +++ b/cpu/ppc/test/ppctests.cpp @@ -148,7 +148,7 @@ static void read_test_float_data() { int i, lineno; uint32_t opcode, dest, src1, src2, check_xer, check_cr, check_fpscr; - //uint64_t dest_64, src1_64, src2_64; + uint64_t dest_64, src1_64, src2_64; //float sfp_dest, sfp_src1, sfp_src2, sfp_src3; double dfp_dest, dfp_src1, dfp_src2, dfp_src3; string rounding_mode; @@ -195,10 +195,11 @@ static void read_test_float_data() { dfp_src1 = 0.0; dfp_src2 = 0.0; dfp_src3 = 0.0; + dest_64 = 0; for (i = 2; i < tokens.size(); i++) { if (tokens[i].rfind("frD=", 0) == 0) { - dfp_dest = stoull(tokens[i].substr(4), NULL, 16); + dest_64 = stoull(tokens[i].substr(4), NULL, 16); } else if (tokens[i].rfind("frA=", 0) == 0) { dfp_src1 = stod(tokens[i].substr(4), NULL); } else if (tokens[i].rfind("frB=", 0) == 0) { @@ -209,15 +210,15 @@ static void read_test_float_data() { rounding_mode = tokens[i].substr(6, 3); ppc_state.fpscr &= 0xFFFFFFFC; if (rounding_mode.compare("RTN") == 0) { - ppc_state.fpscr |= 0x0; + ppc_state.fpscr = 0x0; } else if (rounding_mode.compare("RTZ") == 0) { - ppc_state.fpscr |= 0x1; + ppc_state.fpscr = 0x1; } else if (rounding_mode.compare("RPI") == 0) { - ppc_state.fpscr |= 0x2; + ppc_state.fpscr = 0x2; } else if (rounding_mode.compare("RNI") == 0) { - ppc_state.fpscr |= 0x3; + ppc_state.fpscr = 0x3; } else if (rounding_mode.compare("VEN") == 0) { - ppc_state.fpscr |= FPSCR::VE; + ppc_state.fpscr = FPSCR::VE; } else { cout << "ILLEGAL ROUNDING METHOD: " << tokens[i] << " in line " << lineno << ". Exiting..." << endl; @@ -249,14 +250,14 @@ static void read_test_float_data() { ntested++; - if ((tokens[0].rfind("FCMP") && (ppc_state.fpr[3].dbl64_r != dfp_dest)) || + if ((tokens[0].rfind("FCMP") && (ppc_state.fpr[3].int64_r != dest_64)) || (ppc_state.fpscr != check_fpscr) || (ppc_state.cr != check_cr)) { cout << "Mismatch: instr=" << tokens[0] << ", src1=" << scientific << dfp_src1 << ", src2=" << scientific << dfp_src2 << ", src3=" << scientific << dfp_src3 << endl; - cout << "expected: dest=0x" << hex << dfp_dest << ", FPSCR=0x" << hex << check_fpscr + cout << "expected: dest=0x" << hex << dest_64 << ", FPSCR=0x" << hex << check_fpscr << ", CR=0x" << hex << check_cr << endl; - cout << "got: dest=0x" << hex << ppc_state.fpr[3].dbl64_r << ", FPSCR=0x" << hex + cout << "got: dest=0x" << hex << ppc_state.fpr[3].int64_r << ", FPSCR=0x" << hex << ppc_state.fpscr << ", CR=0x" << hex << ppc_state.cr << endl; cout << "Test file line #: " << dec << lineno << endl << endl;