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Fix SRR0 setting in exception handler.

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This commit is contained in:
Maxim Poliakovski 2020-03-01 17:24:16 +01:00
parent 1e06f724af
commit 7978d9d59f
1 changed files with 9 additions and 9 deletions
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18
cpu/ppc/ppcexceptions.cpp
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@ -39,7 +39,7 @@ jmp_buf exc_env; /* Global exception environment. */
switch(exception_type) { switch(exception_type) {
case Except_Type::EXC_SYSTEM_RESET: case Except_Type::EXC_SYSTEM_RESET:
ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC; ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0100; ppc_next_instruction_address = 0x0100;
break; break;
@ -47,12 +47,12 @@ jmp_buf exc_env; /* Global exception environment. */
if (!(ppc_state.ppc_msr & 0x1000)) { if (!(ppc_state.ppc_msr & 0x1000)) {
/* TODO: handle internal checkstop */ /* TODO: handle internal checkstop */
} }
ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC; ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0200; ppc_next_instruction_address = 0x0200;
break; break;
case Except_Type::EXC_DSI: case Except_Type::EXC_DSI:
ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC; ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0300; ppc_next_instruction_address = 0x0300;
break; break;
@ -67,32 +67,32 @@ jmp_buf exc_env; /* Global exception environment. */
break; break;
case Except_Type::EXC_ALIGNMENT: case Except_Type::EXC_ALIGNMENT:
ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC; ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0600; ppc_next_instruction_address = 0x0600;
break; break;
case Except_Type::EXC_PROGRAM: case Except_Type::EXC_PROGRAM:
ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC; ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0700; ppc_next_instruction_address = 0x0700;
break; break;
case Except_Type::EXC_NO_FPU: case Except_Type::EXC_NO_FPU:
ppc_state.ppc_spr[SPR::SRR0] = ppc_cur_instruction & 0xFFFFFFFC; ppc_state.ppc_spr[SPR::SRR0] = ppc_state.ppc_pc & 0xFFFFFFFC;
ppc_next_instruction_address = 0x0800; ppc_next_instruction_address = 0x0800;
break; break;
case Except_Type::EXC_DECR: case Except_Type::EXC_DECR:
ppc_state.ppc_spr[SPR::SRR0] = (ppc_cur_instruction & 0xFFFFFFFC) + 4; ppc_state.ppc_spr[SPR::SRR0] = (ppc_state.ppc_pc & 0xFFFFFFFC) + 4;
ppc_next_instruction_address = 0x0900; ppc_next_instruction_address = 0x0900;
break; break;
case Except_Type::EXC_SYSCALL: case Except_Type::EXC_SYSCALL:
ppc_state.ppc_spr[SPR::SRR0] = (ppc_cur_instruction & 0xFFFFFFFC) + 4; ppc_state.ppc_spr[SPR::SRR0] = (ppc_state.ppc_pc & 0xFFFFFFFC) + 4;
ppc_next_instruction_address = 0x0C00; ppc_next_instruction_address = 0x0C00;
break; break;
case Except_Type::EXC_TRACE: case Except_Type::EXC_TRACE:
ppc_state.ppc_spr[SPR::SRR0] = (ppc_cur_instruction & 0xFFFFFFFC) + 4; ppc_state.ppc_spr[SPR::SRR0] = (ppc_state.ppc_pc & 0xFFFFFFFC) + 4;
ppc_next_instruction_address = 0x0D00; ppc_next_instruction_address = 0x0D00;
break; break;