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ppcopcodes: Fix lswx for MPC601.
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35919802f3
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@ -1837,28 +1837,26 @@ void dppc_interpreter::ppc_lswx(uint32_t opcode) {
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*/
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uint32_t ea = ppc_result_b + (reg_a ? ppc_result_a : 0);
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uint32_t grab_inb = ppc_state.spr[SPR::XER] & 0x7F;
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int grab_inb = ppc_state.spr[SPR::XER] & 0x7F;
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for (;;) {
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while (grab_inb > 0) {
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if (is_601 && (reg_d == reg_b || (reg_a != 0 && reg_d == reg_a))) {
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// UNTESTED! MPC601 manual is inconsistant on whether reg_b is skipped or not
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reg_d = (reg_d + 1) & 0x1F; // wrap around through GPR0
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/* skip loading reg_b for MPC601 */
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} else {
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switch (grab_inb) {
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case 1:
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ppc_state.gpr[reg_d] = mmu_read_vmem<uint8_t>(opcode, ea) << 24;
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return;
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case 2:
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ppc_state.gpr[reg_d] = mmu_read_vmem<uint16_t>(opcode, ea) << 16;
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return;
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case 3:
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ppc_state.gpr[reg_d] = (mmu_read_vmem<uint16_t>(opcode, ea) << 16)
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| (mmu_read_vmem<uint8_t>(opcode, ea + 2) << 8);
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return;
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}
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ppc_state.gpr[reg_d] = mmu_read_vmem<uint32_t>(opcode, ea);
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}
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switch (grab_inb) {
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case 0:
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return;
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case 1:
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ppc_state.gpr[reg_d] = mmu_read_vmem<uint8_t>(opcode, ea) << 24;
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return;
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case 2:
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ppc_state.gpr[reg_d] = mmu_read_vmem<uint16_t>(opcode, ea) << 16;
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return;
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case 3:
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ppc_state.gpr[reg_d] = (mmu_read_vmem<uint16_t>(opcode, ea) << 16)
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| (mmu_read_vmem<uint8_t>(opcode, ea + 2) << 8);
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return;
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}
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ppc_state.gpr[reg_d] = mmu_read_vmem<uint32_t>(opcode, ea);
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reg_d = (reg_d + 1) & 0x1F; // wrap around through GPR0
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ea += 4;
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grab_inb -= 4;
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