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poweropcodes: Fix srlq.
Test bit 26 of rB instead of testing for >= 0x20 to determine which operation to perform.
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@ -642,10 +642,9 @@ void dppc_interpreter::power_srlq() {
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uint32_t r = (ppc_result_d >> rot_sh) | (ppc_result_d << (32 - rot_sh));
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unsigned mask = power_rot_mask(rot_sh, 31);
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if (ppc_result_b >= 0x20) {
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if (ppc_result_b & 0x20) {
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ppc_result_a = (ppc_state.spr[SPR::MQ] & mask);
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}
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else {
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} else {
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ppc_result_a = ((r & mask) | (ppc_state.spr[SPR::MQ] & ~mask));
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}
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