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GrandCentral: fix access to NVRAM subdevice.

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This commit is contained in:
Maxim Poliakovski 2022-03-21 15:07:58 +01:00
parent 9317719814
commit 934f794d20
1 changed files with 10 additions and 1 deletions
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11
devices/ioctrl/grandcentral.cpp
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@ -148,7 +148,16 @@ void GrandCentral::write(uint32_t reg_start, uint32_t offset, uint32_t value, in
this->viacuda->write((offset >> 9) & 0xF, value); this->viacuda->write((offset >> 9) & 0xF, value);
break; break;
case 0xD: // NVRAM High Address (IOBus dev #4) case 0xD: // NVRAM High Address (IOBus dev #4)
this->nvram_addr_hi = BYTESWAP_32(value); switch (size) {
case 4:
this->nvram_addr_hi = BYTESWAP_32(value);
break;
case 2:
this->nvram_addr_hi = BYTESWAP_16(value);
break;
default:
this->nvram_addr_hi = value;
}
break; break;
case 0xF: // NVRAM Data (IOBus dev #6) case 0xF: // NVRAM Data (IOBus dev #6)
this->nvram->write_byte( this->nvram->write_byte(