atirage: replace raw pointers with unique_ptr.

This commit is contained in:
Maxim Poliakovski 2021-11-17 23:30:43 +01:00
parent cbf4e266e1
commit 99f5aba12e
2 changed files with 15 additions and 22 deletions

View File

@ -29,6 +29,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#include <chrono> #include <chrono>
#include <cstdint> #include <cstdint>
#include <map> #include <map>
#include <memory>
/* Mach64 post dividers. */ /* Mach64 post dividers. */
static const int mach64_post_div[8] = { static const int mach64_post_div[8] = {
@ -94,7 +95,7 @@ ATIRage::ATIRage(uint16_t dev_id, uint32_t vmem_size_mb)
this->vram_size = vmem_size_mb << 20; // convert MBs to bytes this->vram_size = vmem_size_mb << 20; // convert MBs to bytes
/* allocate video RAM */ /* allocate video RAM */
this->vram_ptr = new uint8_t[this->vram_size]; this->vram_ptr = std::unique_ptr<uint8_t[]> (new uint8_t[this->vram_size]);
/* ATI Rage driver needs to know ASIC ID (manufacturer's internal chip code) /* ATI Rage driver needs to know ASIC ID (manufacturer's internal chip code)
to operate properly */ to operate properly */
@ -120,16 +121,7 @@ ATIRage::ATIRage(uint16_t dev_id, uint32_t vmem_size_mb)
(asic_id << 24) | dev_id); (asic_id << 24) | dev_id);
/* initialize display identification */ /* initialize display identification */
this->disp_id = new DisplayID(Disp_Id_Kind::DDC2B); this->disp_id = std::unique_ptr<DisplayID> (new DisplayID(Disp_Id_Kind::DDC2B));
}
ATIRage::~ATIRage()
{
if (this->vram_ptr) {
delete this->vram_ptr;
}
delete (this->disp_id);
} }
const char* ATIRage::get_reg_name(uint32_t reg_offset) { const char* ATIRage::get_reg_name(uint32_t reg_offset) {
@ -277,7 +269,7 @@ void ATIRage::write_reg(uint32_t offset, uint32_t value, uint32_t size) {
this->fb_pitch = ((READ_DWORD_LE_A(&this->mm_regs[ATI_CRTC_OFF_PITCH])) >> 19) & 0x1FF8; this->fb_pitch = ((READ_DWORD_LE_A(&this->mm_regs[ATI_CRTC_OFF_PITCH])) >> 19) & 0x1FF8;
this->fb_ptr = this->vram_ptr + src_offset; this->fb_ptr = &this->vram_ptr[src_offset];
this->update_screen(); this->update_screen();
} }
} }
@ -404,11 +396,11 @@ uint32_t ATIRage::read(uint32_t reg_start, uint32_t offset, int size)
if (offset < this->vram_size) { if (offset < this->vram_size) {
/* read from little-endian VRAM region */ /* read from little-endian VRAM region */
return read_mem(this->vram_ptr + offset, size); return read_mem(&this->vram_ptr[offset], size);
} }
else if (offset >= BE_FB_OFFSET) { else if (offset >= BE_FB_OFFSET) {
/* read from big-endian VRAM region */ /* read from big-endian VRAM region */
return read_mem_rev(this->vram_ptr + (offset - BE_FB_OFFSET), size); return read_mem_rev(&this->vram_ptr[offset - BE_FB_OFFSET], size);
} }
else if (offset >= MM_REGS_0_OFF) { else if (offset >= MM_REGS_0_OFF) {
/* read from memory-mapped registers, block 0 */ /* read from memory-mapped registers, block 0 */
@ -436,11 +428,11 @@ void ATIRage::write(uint32_t reg_start, uint32_t offset, uint32_t value, int siz
if (offset < this->vram_size) { if (offset < this->vram_size) {
/* write to little-endian VRAM region */ /* write to little-endian VRAM region */
write_mem(this->vram_ptr + offset, value, size); write_mem(&this->vram_ptr[offset], value, size);
} }
else if (offset >= BE_FB_OFFSET) { else if (offset >= BE_FB_OFFSET) {
/* write to big-endian VRAM region */ /* write to big-endian VRAM region */
write_mem_rev(this->vram_ptr + (offset - BE_FB_OFFSET), value, size); write_mem_rev(&this->vram_ptr[offset - BE_FB_OFFSET], value, size);
} }
else if (offset >= MM_REGS_0_OFF) { else if (offset >= MM_REGS_0_OFF) {
/* write to memory-mapped registers, block 0 */ /* write to memory-mapped registers, block 0 */
@ -554,7 +546,7 @@ void ATIRage::draw_hw_cursor(uint8_t *dst_buf, int dst_pitch) {
int horz_offset = READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_HORZ_VERT_OFF]) & 0x3F; int horz_offset = READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_HORZ_VERT_OFF]) & 0x3F;
int vert_offset = (READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_HORZ_VERT_OFF]) >> 16) & 0x3F; int vert_offset = (READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_HORZ_VERT_OFF]) >> 16) & 0x3F;
src_buf = this->vram_ptr + (READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_OFFSET]) * 8); src_buf = &this->vram_ptr[(READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_OFFSET]) * 8)];
int cur_height = 64 - vert_offset; int cur_height = 64 - vert_offset;

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@ -27,6 +27,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
#include <devices/video/videoctrl.h> #include <devices/video/videoctrl.h>
#include <cinttypes> #include <cinttypes>
#include <memory>
/* PCI related definitions. */ /* PCI related definitions. */
enum { enum {
@ -196,7 +197,7 @@ constexpr auto ATI_XTAL = 14318180.0f; // external crystal oscillator frequency
class ATIRage : public PCIDevice, public VideoCtrlBase { class ATIRage : public PCIDevice, public VideoCtrlBase {
public: public:
ATIRage(uint16_t dev_id, uint32_t vmem_size_mb); ATIRage(uint16_t dev_id, uint32_t vmem_size_mb);
~ATIRage(); ~ATIRage() = default;
/* MMIODevice methods */ /* MMIODevice methods */
uint32_t read(uint32_t reg_start, uint32_t offset, int size); uint32_t read(uint32_t reg_start, uint32_t offset, int size);
@ -229,19 +230,19 @@ protected:
void draw_hw_cursor(uint8_t *dst_buf, int dst_pitch); void draw_hw_cursor(uint8_t *dst_buf, int dst_pitch);
private: private:
uint8_t mm_regs[2048] = {0}; uint8_t mm_regs[2048] = {0}; // internal registers
uint8_t pci_cfg[256] = {0}; /* PCI configuration space */ uint8_t pci_cfg[256] = {0}; // PCI configuration space
uint8_t plls[64] = {0}; // internal PLL registers uint8_t plls[64] = {0}; // internal PLL registers
/* Video RAM variables */ /* Video RAM variables */
std::unique_ptr<uint8_t[]> vram_ptr;
uint32_t vram_size; uint32_t vram_size;
uint8_t* vram_ptr;
uint32_t aperture_base; uint32_t aperture_base;
DisplayID* disp_id; std::unique_ptr<DisplayID> disp_id;
int comp_index; /* color component index for DAC palette access */ int comp_index; /* color component index for DAC palette access */
}; };