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atirage: replace raw pointers with unique_ptr.
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cbf4e266e1
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@ -29,6 +29,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
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#include <chrono>
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#include <chrono>
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#include <cstdint>
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#include <cstdint>
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#include <map>
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#include <map>
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#include <memory>
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/* Mach64 post dividers. */
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/* Mach64 post dividers. */
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static const int mach64_post_div[8] = {
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static const int mach64_post_div[8] = {
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@ -94,7 +95,7 @@ ATIRage::ATIRage(uint16_t dev_id, uint32_t vmem_size_mb)
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this->vram_size = vmem_size_mb << 20; // convert MBs to bytes
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this->vram_size = vmem_size_mb << 20; // convert MBs to bytes
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/* allocate video RAM */
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/* allocate video RAM */
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this->vram_ptr = new uint8_t[this->vram_size];
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this->vram_ptr = std::unique_ptr<uint8_t[]> (new uint8_t[this->vram_size]);
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/* ATI Rage driver needs to know ASIC ID (manufacturer's internal chip code)
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/* ATI Rage driver needs to know ASIC ID (manufacturer's internal chip code)
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to operate properly */
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to operate properly */
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@ -120,16 +121,7 @@ ATIRage::ATIRage(uint16_t dev_id, uint32_t vmem_size_mb)
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(asic_id << 24) | dev_id);
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(asic_id << 24) | dev_id);
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/* initialize display identification */
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/* initialize display identification */
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this->disp_id = new DisplayID(Disp_Id_Kind::DDC2B);
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this->disp_id = std::unique_ptr<DisplayID> (new DisplayID(Disp_Id_Kind::DDC2B));
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}
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ATIRage::~ATIRage()
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{
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if (this->vram_ptr) {
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delete this->vram_ptr;
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}
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delete (this->disp_id);
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}
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}
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const char* ATIRage::get_reg_name(uint32_t reg_offset) {
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const char* ATIRage::get_reg_name(uint32_t reg_offset) {
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@ -277,7 +269,7 @@ void ATIRage::write_reg(uint32_t offset, uint32_t value, uint32_t size) {
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this->fb_pitch = ((READ_DWORD_LE_A(&this->mm_regs[ATI_CRTC_OFF_PITCH])) >> 19) & 0x1FF8;
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this->fb_pitch = ((READ_DWORD_LE_A(&this->mm_regs[ATI_CRTC_OFF_PITCH])) >> 19) & 0x1FF8;
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this->fb_ptr = this->vram_ptr + src_offset;
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this->fb_ptr = &this->vram_ptr[src_offset];
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this->update_screen();
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this->update_screen();
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}
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}
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}
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}
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@ -404,11 +396,11 @@ uint32_t ATIRage::read(uint32_t reg_start, uint32_t offset, int size)
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if (offset < this->vram_size) {
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if (offset < this->vram_size) {
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/* read from little-endian VRAM region */
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/* read from little-endian VRAM region */
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return read_mem(this->vram_ptr + offset, size);
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return read_mem(&this->vram_ptr[offset], size);
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}
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}
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else if (offset >= BE_FB_OFFSET) {
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else if (offset >= BE_FB_OFFSET) {
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/* read from big-endian VRAM region */
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/* read from big-endian VRAM region */
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return read_mem_rev(this->vram_ptr + (offset - BE_FB_OFFSET), size);
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return read_mem_rev(&this->vram_ptr[offset - BE_FB_OFFSET], size);
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}
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}
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else if (offset >= MM_REGS_0_OFF) {
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else if (offset >= MM_REGS_0_OFF) {
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/* read from memory-mapped registers, block 0 */
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/* read from memory-mapped registers, block 0 */
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@ -436,11 +428,11 @@ void ATIRage::write(uint32_t reg_start, uint32_t offset, uint32_t value, int siz
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if (offset < this->vram_size) {
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if (offset < this->vram_size) {
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/* write to little-endian VRAM region */
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/* write to little-endian VRAM region */
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write_mem(this->vram_ptr + offset, value, size);
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write_mem(&this->vram_ptr[offset], value, size);
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}
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}
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else if (offset >= BE_FB_OFFSET) {
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else if (offset >= BE_FB_OFFSET) {
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/* write to big-endian VRAM region */
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/* write to big-endian VRAM region */
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write_mem_rev(this->vram_ptr + (offset - BE_FB_OFFSET), value, size);
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write_mem_rev(&this->vram_ptr[offset - BE_FB_OFFSET], value, size);
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}
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}
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else if (offset >= MM_REGS_0_OFF) {
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else if (offset >= MM_REGS_0_OFF) {
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/* write to memory-mapped registers, block 0 */
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/* write to memory-mapped registers, block 0 */
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@ -554,7 +546,7 @@ void ATIRage::draw_hw_cursor(uint8_t *dst_buf, int dst_pitch) {
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int horz_offset = READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_HORZ_VERT_OFF]) & 0x3F;
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int horz_offset = READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_HORZ_VERT_OFF]) & 0x3F;
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int vert_offset = (READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_HORZ_VERT_OFF]) >> 16) & 0x3F;
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int vert_offset = (READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_HORZ_VERT_OFF]) >> 16) & 0x3F;
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src_buf = this->vram_ptr + (READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_OFFSET]) * 8);
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src_buf = &this->vram_ptr[(READ_DWORD_LE_A(&this->mm_regs[ATI_CUR_OFFSET]) * 8)];
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int cur_height = 64 - vert_offset;
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int cur_height = 64 - vert_offset;
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@ -27,6 +27,7 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
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#include <devices/video/videoctrl.h>
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#include <devices/video/videoctrl.h>
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#include <cinttypes>
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#include <cinttypes>
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#include <memory>
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/* PCI related definitions. */
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/* PCI related definitions. */
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enum {
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enum {
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@ -196,7 +197,7 @@ constexpr auto ATI_XTAL = 14318180.0f; // external crystal oscillator frequency
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class ATIRage : public PCIDevice, public VideoCtrlBase {
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class ATIRage : public PCIDevice, public VideoCtrlBase {
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public:
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public:
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ATIRage(uint16_t dev_id, uint32_t vmem_size_mb);
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ATIRage(uint16_t dev_id, uint32_t vmem_size_mb);
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~ATIRage();
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~ATIRage() = default;
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/* MMIODevice methods */
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/* MMIODevice methods */
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uint32_t read(uint32_t reg_start, uint32_t offset, int size);
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uint32_t read(uint32_t reg_start, uint32_t offset, int size);
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@ -229,19 +230,19 @@ protected:
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void draw_hw_cursor(uint8_t *dst_buf, int dst_pitch);
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void draw_hw_cursor(uint8_t *dst_buf, int dst_pitch);
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private:
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private:
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uint8_t mm_regs[2048] = {0};
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uint8_t mm_regs[2048] = {0}; // internal registers
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uint8_t pci_cfg[256] = {0}; /* PCI configuration space */
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uint8_t pci_cfg[256] = {0}; // PCI configuration space
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uint8_t plls[64] = {0}; // internal PLL registers
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uint8_t plls[64] = {0}; // internal PLL registers
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/* Video RAM variables */
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/* Video RAM variables */
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std::unique_ptr<uint8_t[]> vram_ptr;
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uint32_t vram_size;
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uint32_t vram_size;
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uint8_t* vram_ptr;
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uint32_t aperture_base;
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uint32_t aperture_base;
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DisplayID* disp_id;
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std::unique_ptr<DisplayID> disp_id;
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int comp_index; /* color component index for DAC palette access */
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int comp_index; /* color component index for DAC palette access */
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};
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};
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